Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This Office Action responds to the Election of Restriction Requirement filed on 12/23/2025 and IDS filed on 1/03/2023 and 6/30/2023.
Claims 1-21 are pending.
Election/Restrictions
3. Applicant's election with traverse of Group I (Claims 1, 2, 3, 4, 5, 6, 20, and 21) in the reply filed on 12/23/2025 is acknowledged. The traversal is on the ground(s) that claims 1, 2, 3, 4, 5, 6, 20 and 21 are generic claims, and claims 7-19 should be rejoin when claim 1 is found to be allowable.
Applicant’s remarks are persuasive, Examiner will consider for rejoin claims 7-19
which depend on independent claim, when independent claim 1 is allowable.
4. Claims 7-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Group, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/23/2025.
Claim Rejections - 35 USC § 112
5. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
6. Claims 1-6, 20, and 21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recited “a power ring disposed around the chip and electrically connected to the chip and the power wiring…wherein low self-impedance is maintained at any position of the power ring”, however it is not apparent how the power ring would maintain the low self-impedance at any position of the power ring. It is apparent that power ring would provide power to a chip, however it is not apparent how the power ring would maintain the low self-impedance at any position of the power ring.
As per claims 2-6, 20, and 21 are rejected to for incorporating the above limitations into the claims by dependency.
Claim Rejections - 35 USC § 102
7. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
8. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nojima et al. (U.S. Pub. No. 2015/0347668 A1).
As per claim 1, Nojima discloses:
A power design architecture (See Para [0002], i.e.verify bypass capacitor arrangement in order to suppress noise, which occurs from power source pins of the IC, within a printed circuit board, See Para [0008]), comprising:
a power supply circuit (See Figure 4B, i.e. 403 & Para [0054], i.e. power source wiring on the printed circuit board);
a power wiring connected to the power supply circuit (See Figure 4B, i.e. power ring 409);
at least one chip (See Figure 4B, i.e. center chip with power ring surrounded);
a power ring disposed around the chip and electrically connected to the chip and the power wiring (See Figure 4B, i.e. 409 connect to 407a & Para [0054]); and
a first reference conductor electrically connected to the chip (See Figure 4B, i.e. 406 – ground wiring & Para [0054]),
wherein low self-impedance is maintained at any position of the power ring (See Para [0002], i.e. suppress noise, which occurs from power source pins of the IC, See Para [0040]-[0088], See Para [0113], i.e. impedance of the path from the power source ring up to the bypass capacitor to be low, and therefore, the priorities are changed so that the bypass capacitors are arranged as sparsely as possible with respect to the power source ring –[prior art place bypass capacitor around power ring, reducing impedance is considered as the maintaining as cited above]).
Claim Rejections - 35 USC § 103
9. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
10. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nojima et al. (U.S. Pub. No. 2015/0347668 A1) in view of Chen et al. (U.S. Pub. No. 2013/0119449 A1).
As per claim 2, Nojima discloses all of the features of claim 1 as discloses above.
Nojima does not teach: a first substrate, wherein the power wiring, the chip, the power ring, and the first reference conductor are all disposed on the first substrate.
However, Chen teach: a first substrate, wherein the power wiring, the chip, the power ring, and the first reference conductor are all disposed on the first substrate (See Figure 1, Para [0021]-[0023], i.e. a chip on a semiconductor substrate, an integrated circuit disposed on the chip, a seal ring surrounding the integrated circuit and disposed on a periphery of the chip, and at least one decoupling capacitor embedded within the seal ring).
Therefore, it would have been obvious to a person of ordinary skill in the
art at the effective filing date of the invention to incorporate the teaching of Chen into
the teaching of Nojima because it would allow designer to reduce an amount of
decoupling capacitors in design of power circuit (See Para [0004]).
11. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nojima et al. (U.S. Pub. No. 2015/0347668 A1) in view of Jia (U.S. Pub. No. 2022/0173528 A1).
As per claim 3, Nojima discloses all of the features of claim 2 as discloses above.
Nojima does not disclose the limitations: wherein the first substrate is a dielectric plate.
However, Jia disclose the limitations: wherein the first substrate is a dielectric plate (See Para [0065], i.e. dielectric substrate 100 is formed by pressing multiple layers of dielectric plates).
Therefore, it would have been obvious to a person of ordinary skill in the
art at the effective filing date of the invention to incorporate the teaching of Jia into the
teaching of Nojima because would allow designer to reduce thickness of circuit module
in a circuit design (See Para [0065]).
12. Claim(s) 20 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nojima et al. (U.S. Pub. No. 2015/0347668 A1) in view of Li et al. (U.S. Pub. No. 2015/0123749 A1).
As per claim 20, Nojima discloses all of the features of claim 1 as discloses above.
Nojima does not teach the limitations: wherein a length of the power wiring is of ¼ wavelength.
However, Li teach the limitations: wherein a length of the power wiring is of ¼ wavelength (See Para [0045], i.e. common length of wire …signals via electromagnetic waves is equal to 1/2 or 1/4 of the wavelength).
Therefore, it would have been obvious to a person of ordinary skill in the
art at the effective filing date of the invention to incorporate the teaching of Li into the
teaching of Nojima because would allow designer to match impedance in a circuit
design (See Para [0045]).
As per claim 21, Nojima discloses all of the features of claim 1 as discloses above.
Nojima does not teach the limitations: wherein a length of the power ring is an odd multiple of ½ wavelength.
However, Li teach the limitations: wherein a length of the power ring is an odd multiple of ½ wavelength. (See Para [0045], i.e. common length of wire …signals via electromagnetic waves is equal to 1/2 or 1/4 of the wavelength).
Therefore, it would have been obvious to a person of ordinary skill in the
art at the effective filing date of the invention to incorporate the teaching of Li into the
teaching of Nojima because would allow designer to match impedance in a circuit
design (See Para [0045]).
Allowable Subject Matter
13. Claims 4-6 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
14. The following is a statement of reasons for the indication of allowable subject matter: The prior art does not teach the limitations of claim 4, wherein claims 5 and 6 depend on claim 4.
Conclusion
15. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NHA T NGUYEN whose telephone number is (571)270-1405. The examiner can normally be reached M-F 8:00AM-5:00PM.
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/NHA T NGUYEN/Primary Examiner, Art Unit 2851
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