DETAILED ACTION
Allowable Subject Matter
Claims 8-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 13-16 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hall et al. US 2019/0178992 hereinafter referred to as Hall in view of Hematy et al. US 2014/0354328 hereinafter referred to as Hematy.
In regards to claim 1, Hall teaches:
“A device, comprising: first circuitry that supplies a bias voltage to a photodetector array; and a ... interface comprising a serial interface and multiple ... ports”
Hall Figure 2 and paragraph [0054] teaches temperature sensor module 150 measures temperature where module 150 is located and communicates a digital signal 151 indicative of the measured temperature to master controller 144 (e.g., over a serial peripheral interface). In response to the measured temperature, master controller communicates a command signal 176 to local controller 190. Command signal 176 is indicative of a desired bias voltage provided to each APD of receive channels 130A-N.
“wherein each one of the multiple ... ports is configured as one of a digital-to-analog converter (DAC) output port, an analog-to-digital converter (ADC) input port, a digital output port, or a digital input port”
Hall Figure 2, inter alia, teaches multiple ports configured for outputting signals to DAC 191 via controller 190. Figure 2 also illustrates an input for ADC 143.
“wherein the serial interface is configured to receive program code defining a control voltage that causes the first circuitry to supply the bias voltage”
Hall Figure 2 and paragraph [0054] teaches module 150 is located and communicates a digital signal 151 indicative of the measured temperature to master controller 144 (e.g., over a serial peripheral interface). In response to the measured temperature, master controller communicates a command signal 176 to local controller 190. Command signal 176 is indicative of a desired bias voltage provided to each APD of receive channels 130A-N. Local controller 190, in turn, communicates bias voltage command signals 177A-N to APD bias power supplies 131A-D,
“and wherein a first ... port of the multiple ... ports is connected to the first circuitry and is configured as a first DAC output port that outputs the control voltage to the first circuitry”
Hall Figure 2 and paragraph [0054] teaches Command signal 176 is indicative of a desired bias voltage provided to each APD of receive channels 130A-N. Local controller 190, in turn, communicates bias voltage command signals 177A-N to APD bias power supplies 131A-D, respectively (via digital to analog converter 191).
Hall dos not explicitly teach:
“a programmable interface comprising a serial interface and multiple configurable ports” and “configurable [ports]”
Hematy paragraph [0029] teaches the DAC 106 and the ADC 108 are communicatively coupled to the plurality of ports 104. The ADC 108 and the DAC 106, in embodiments, are separately coupled to the individual ports configured by the port manager 102 and to the serial interface and digital control 112. Thus, each port is separately connected to both the DAC 106 and ADC 108. As illustrated, the DAC 106 is coupled by a single communication line per port, while the ADC 108 can be coupled by one or two lines per port depending on configuration. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall in view of Hematy to have included the features of “a programmable interface comprising a serial interface and multiple configurable ports” and “configurable [ports]” for providing highly integrated and configurable input/output (JO) ports for integrated circuits that can be individually configured for a variety of general purpose digital or analog functions, such as multiple channel analog-to-digital converters (ADC), multiple channel digital-to-analog converters (DAC), multiplexers, general purpose input/output devices (GPIO), analog switches, switches and multiplexers, digital logic level translators, comparators, temperature sensors and relays, and so forth (Hematy [0004]).
In regards to claim 2, Hall/Hematy teachers all the limitations of claim 1 and further teaches:
“wherein a second configurable port of the multiple configurable ports is configured as a first ADC input port that receives a first voltage representative of a temperature of the photodetector array and outputs a digital value representative of the temperature”
Hall paragraph [0054] and Figure 2 teaches temperature sensor may be located at any suitable distance from one or more receive channels. Temperature sensor module 150 measures temperature where module 150 is located and communicates a digital signal 151 indicative of the measured temperature to master controller 144 (e.g., over a serial peripheral interface). The Examiner interprets that the temperature signal must have been converted to a digital signal and in the sensor if the sensor outputs a digital signal to the mater controller. Therefore, the temperature sensor serves as an ADC.
In regards to claim 3, Hall/Hematy teachers all the limitations of claim 1 and further teaches:
“wherein a second configurable port of the multiple configurable ports is connected to an amplifier device that is connected to the photodetector array, the second configurable port being configured as a second DAC output port that outputs a control analog signal to set an operational attribute of the amplifier device”
Hall Figure 2 and paragraph [0051] teaches master controller 144 communicates a command signal 145 to local controller 190. Command signal 145 is indicative of a desired DC voltage offset at the output of each TIA of receive channels 130A-N.
In regards to claim 4, Hall/Hematy teachers all the limitations of claim 1 and further teaches:
“wherein the amplifier device comprises a transimpedance amplifier (TIA), and wherein the operational attribute is one of an offset of the TIA, a tilt of the TIA, or clamping level of the TIA”
Hall Figure 2 and paragraph [0051] teaches master controller 144 communicates a command signal 145 to local controller 190. Command signal 145 is indicative of a desired DC voltage offset at the output of each TIA of receive channels 130A-N.
In regards to claim 5, Hall/Hematy teachers all the limitations of claim 1 and further teaches:
“wherein the serial interface comprises a serial bus according to a serial peripheral interface (SPI) standard”
Temperature sensor module 150 measures temperature where module 150 is located and communicates a digital signal 151 indicative of the measured temperature to master controller 144 (e.g., over a serial peripheral interface).
In regards to claim 13, Hall/Hematy teaches all the limitations of claims 1-3 and claim 13 contains limitations in claims 1-3. Therefore, claim 13 is rejected for similar reasoning as applied to claims 1-3.
In regards to claim 14, Hall/Hematy teaches all the limitations of claims 13 and claim 14 contains limitations in claims 1-3. Therefore, claim 14 is rejected for similar reasoning as applied to claims 1-3.
In regards to claim 15, Hall/Hematy teaches all the limitations of claims 13 and claim 15 contains limitations in claims 1-3. Therefore, claim 15 is rejected for similar reasoning as applied to claims 1-3.
In regards to claim 16, Hall/Hematy teachers all the limitations of claim 15 and further teaches:
“further comprising an ADC coupled to the amplifier device”
Hall paragraph [0044] and Figure 2.
In regards to claim 19, Hall/Hematy teaches all the limitations of claims 1-3 and claim 19 contains limitations in claims 1-3. Therefore, claim 19 is rejected for similar reasoning as applied to claims 1-3.
Additionally, Hall teaches:
“An apparatus, comprising: dedicated hardware having a LiDAR subsystem that includes:”
Hall teaches in the Abstract, inter alia, methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. .
In regards to claim 20, Hall/Hematy teaches all the limitations of claims 19 and claim 20 contains limitations in claims 1-3. Therefore, claim 20 is rejected for similar reasoning as applied to claims 1-3.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hall in view of Hematy in view of Lemon et al. US 5,953,690 hereinafter referred to as Lemon.
In regards to claim 6, Hall/Hematy teaches all the limitations of claim 1 but does not explicitly teach:
“further comprising second circuitry configured to filter the bias voltage that is supplied”
Lemon teaches in column 16 lines 13-16 and Figure 6 the APD bias voltage from the output of photocurrent monitor 534 (from APD bias voltage regulator 528) is coupled to ADC input filters 636 through voltage divider/input amplifier 638. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall/Hematy in view of Lemon to have included the features of “further comprising second circuitry configured to filter the bias voltage that is supplied” because conventional fiberoptic receivers have tended to operate reliably over limited temperature and voltage ranges, while providing limited manual adjustments such as by way of potentiometers and the like. Additionally, such conventional receivers tend to have limited overcurrent protection, and in general do not provide user programmability, except by tedious adjustment of potentiometers and the like (Lemon column 1 lines 39-47).
Claim(s) 7, 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hall in view of Hematy in view of Lemon in view of Kim et al. US 2011/0133059 hereinafter referred to as Kim.
In regards to claim 7, Hall/Hematy/Lemon teaches all the limitations of claim 6 but does not explicitly teach:
“wherein the first circuitry comprises a negative boost converter configured to supply the bias voltage, the negative boost converter having a first pin configured to receive the control voltage”
Kim paragraph [0077] teaches In order to drive the APD in the Geiger mode, the reverse bias voltage .DELTA.VRB needs to exceed about 43 V. Accordingly, if an overdrive voltage Vod is provides as a pulse of a -4 V size (i.e., a negative pulse), the reverse bias voltage .DELTA.VRB boosts more than at least about 44 V due to a coupling effect. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall/Hematy/Lemon in view of Kim to have included the features of “wherein the first circuitry comprises a negative boost converter configured to supply the bias voltage, the negative boost converter having a first pin configured to receive the control voltage” because the number of photons returning to a detector array after being scattered from an object is reduced as their travelling distance is longer. As a result, its detected signal is weak. Thus, a photo detector array may operate in the Geiger mode in order to detect the weak signal (Kim [0007]).
In regards to claim 10, Hall/Hematy/Lemon/Kim teaches all the limitations of claim 7 and further teaches:
“further comprising a temperature indicator configured to output a voltage indicative of a temperature of the device”
Hall teaches in paragraph [0054] temperature sensor module 150 measures temperature where module 150 is located and communicates a digital signal 151 indicative of the measured temperature to master controller 144 (e.g., over a serial peripheral interface).
In regards to claim 12, Hall/Hematy/Lemon/Kim teaches all the limitations of claim 7 and further teaches:
“wherein the defined voltage has a value in a range from about 0 V to about -600 V”
Kim paragraph [0077] teaches In order to drive the APD in the Geiger mode, the reverse bias voltage .DELTA.VRB needs to exceed about 43 V. The Examiner interprets that a reverse bias is a negative voltage. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall/Hematy/Lemon in view of Kim to have included the features of “wherein the defined voltage has a value in a range from about 0 V to about -600 V” because the number of photons returning to a detector array after being scattered from an object is reduced as their travelling distance is longer. As a result, its detected signal is weak. Thus, a photo detector array may operate in the Geiger mode in order to detect the weak signal (Kim [0007]).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hall in view of Hematy in view of Lemon in view of Kim in view of Zhang et al. US 2012/0112083 hereinafter referred to as Zhang.
In regards to claim 11, Hall/Hematy/Lemon/Kim teaches all the limitations of claim 10 bout do not explicitly teach:
“assembled in a ball grid array (BGA) package”
Zhang teaches in paragraph [0027] Each APD in the APD array 120 reading light from the block of scintillation crystals 112, 114, 116 and 118 are read out independently through ball grid array (BGA) connections. The use of ball grid array package in electronic packaging is well-known as a conventional packaging type. Its use does not provide any unpredictable results as it merely results in a packaged chip with appropriate connections. It has been held that “[t]he combination of familiar elements according to known methods is likely to be obvious when it does not more than yield predictable results.” KSR., 127 S. Ct. at 1739, 82 USPQ2d at 1395 (2007) (Citing Graham, 383 U.S. at 12).
Claim(s) 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hall in view of Hematy in view of in view of Murakami US 2022/0262970 hereinafter referred to as Murakami.
In regards to claim 17, Hall/Hematy teaches all the limitations of claim 13 but does not explicitly teach:
“wherein the photodetector array comprises an array of avalanche photodiodes, and wherein supplying the bias voltage to the photodetector array comprises applying the bias voltage to each avalanche photodiode in the array of avalanche photodiodes”
Murakami paragraph [0054] and Figure 3 teaches By applying a large negative voltage V.sub.BD (e.g., in the order of −20 V) between an anode and a cathode, the SPAD element 22 can form an avalanche-multiplication region and avalanche-multiply electrons occurring at the incidence of one photon. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall/Hematy in view of Murakami to have included the features of “wherein the photodetector array comprises an array of avalanche photodiodes, and wherein supplying the bias voltage to the photodetector array comprises applying the bias voltage to each avalanche photodiode in the array of avalanche photodiodes” to achieve the relaxation of the electric field between the anode contact region and the cathode contact region while preventing the area of the light receiving element from expanding (Murakami [0010]).
In regards to claim 18, Hall/Hematy/Murakami teaches all the limitations of claim 17 and further teach:
“wherein each avalanche photodiode in the array of the avalanche photodiodes is a silicon-based monolithic device, and wherein the bias voltage is applied to a cathode of each avalanche photodiode”
Murakami paragraph [0067] teaches in the semiconductor layer 31, which is a layer obtained by thinly grinding a semiconductor substrate, such as single-crystal silicon, Murakami paragraph [0054] and Figure 3 teaches By applying a large negative voltage V.sub.BD (e.g., in the order of −20 V) between an anode and a cathode, the SPAD element 22 can form an avalanche-multiplication region and avalanche-multiply electrons occurring at the incidence of one photon. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Hall/Hematy in view of Murakami to have included the features of “wherein each avalanche photodiode in the array of the avalanche photodiodes is a silicon-based monolithic device, and wherein the bias voltage is applied to a cathode of each avalanche photodiode” to achieve the relaxation of the electric field between the anode contact region and the cathode contact region while preventing the area of the light receiving element from expanding (Murakami [0010]).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL E TEITELBAUM, Ph.D. whose telephone number is (571)270-5996. The examiner can normally be reached 8:30AM-5:00PM EST.
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/MICHAEL E TEITELBAUM, Ph.D./Primary Examiner, Art Unit 2422
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