DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/02/26 has been entered.
Response to Amendment
The Examiner acknowledges and accepts the amendment filed on 06/02/26.
Claim 11 is amended;
Claims 14-17 are newly added; and
Claims 11 and 14-17 are currently pending.
Response to Arguments
Applicant’s arguments, see paragraphs on bottom page 5 of Remarks, filed 06/02/26, with respect to the rejection(s) of claim 11 under 35 USC 102a1 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of a different interpretation of the previously applied reference WO’274. In particular, WO’271 in Figure 1 discloses forming a second reflector layer to directly contact the active light-emitting layer (a bottom layer of the upper mirror layer 104 is in direct contact with the active region 105, FIG. 1), wherein the current confinement layer is disposed within the second reflector layer (the phase-shifting current-blocking layer 101 is disposed within 104, FIG. 1), and the current confinement layer and the active light-emitting layer are spaced apart from each other in a vertical direction (the PSCB layer 101 and the active region 105 are spaced apart from each other by the bottom layer of the upper mirror layer 104 in a vertical direction, FIG. 1). Therefore, claim 11 is anticipated by WO’274.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 11 and 14-16 are rejected under 35 U.S.C. 102a1 as being anticipated by WO 2018208274 A2 (hereafter WO’274).
Regarding claim 11, WO’274 discloses a method for manufacturing a surface emitting laser apparatus (FIG. 1), comprising:
forming a first reflector layer (106, FIG. 1, col. 8 lines 6-7);
forming an active light-emitting layer (interpreted to comprise an active region 105 formed between 106/104, FIG. 1, col. 8 lines 8-9) on the first reflector layer;
forming a current confinement layer (101, FIG. 1, col. 8 lines 10-15), wherein the current confinement layer defines a confinement hole (102, FIG. 1, col. 8 lines 10-15) and includes an intrinsic semiconductor layer (101 may be undoped, col. 8 lines 18-20);
forming a second reflector layer (104, FIG. 1, col. 8 lines 6-7) to directly contact the active light-emitting layer (a bottom layer of 104 is in direct contact with the active region 105, see annotated FIG. 1 below), wherein the current confinement layer is disposed within the second reflector layer (101 is disposed above the bottom layer of 104 so that 101 is within 104, see annotated FIG. 1 below);
wherein the step of forming the current confinement laver includes:
forming an initial semiconductor layer above the active light-emitting layer (forming 101 on the active region 105, FIG. 1), wherein the current confinement layer and the active light-emitting laver are spaced apart from each other in a vertical direction (101 and 105 are spaced apart from each other by the bottom layer of 104 in a vertical direction, see annotated FIG. 1 below); and
forming the confinement hole in the initial semiconductor layer by an etching process (forming 102 by etching, FIG. 1, col. 8 lines 15-17), wherein a position of the confinement hole corresponds to a central portion of the active light-emitting layer (102 corresponds to a central portion of the active region 105, FIG. 1); and
wherein, after the step of forming the second reflector layer, a part of the second reflector layer is filled into the confinement hole (a part of 104 is filled into 102, FIG. 1).
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Regarding claim 14, WO’274 discloses a lattice mismatch between a material of the second reflector layer and the intrinsic semiconductor is less than 0.1% (104 and 101 both comprise GaAs and have zero lattice mismatch, col. 8 lines 28-32 and col. 9 lines 29-30).
Regarding claim 15, WO’274 discloses a thickness of the current confinement layer is at least 30 nm (101 may have a thickness of at least 30 nm, FIG. 8).
Regarding claim 16, WO’274 discloses a material of the current confinement layer is aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), gallium nitride (GaN), aluminum nitride (AIN), indium aluminum phosphide (AllnP), indium gallium phosphide (InGaP) (101 may comprise InGaP, col. 9 lines 29-30), aluminum gallium phosphide (AlGaP), aluminum gallium arsenide (AlGaAs), or aluminum arsenide (AlAs).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over WO’274 in view of Hashimoto (US PG Pub 2009/0116526 A1).
Regarding claim 17, WO’274 has disclosed the method outlined in the rejection to claim 11 above except the active light-emitting layer includes a plurality of trap layers and a plurality of barrier layers that are alternately stacked on each other, and an energy gap width of the trap layer is less than the energy gap width of the current confinement layer. Hashimoto discloses the active light-emitting layer includes a plurality of trap layers and a plurality of barrier layers that are alternately stacked on each other ("The active layer is further preferable to be configured with a multiple-quantum well structure of un-doped GalnNAs well layers and un-doped GaAs barrier layers," [0033]), and an energy gap width of the trap layer is less than the energy gap width of the current confinement layer (the current blocking layer 24 is made of un-doped GaInP or un-doped AlGaInP having a higher bandgap energy than that of the un-doped GalnNAs well layer, [0039]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of WO’274 with the active light-emitting layer including a plurality of trap layers and a plurality of barrier layers that are alternately stacked on each other and the energy gap width of the trap layer being less than that of the current confinement layer as taught by Hashimoto in order to maximize optical output by maximizing current confinement.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUANDA ZHANG whose telephone number is (571)270-1439. The examiner can normally be reached M-F 10:30 AM - 6:30 PM.
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/YUANDA ZHANG/Primary Examiner, Art Unit 2828