DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS’s) submitted on 06/08/2023 and 10/26/2023 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements have been considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1,9,10, 18 are rejected under 35 U.S.C. 103 as being unpatentable over Rothberg et al. (US 2017/0225196).
Regarding claim 1, Rothberg et al. disclose:
An ultrasound transducer device (abstract), comprising:
a first insulating layer (206, Fis 1-3B, paras 21, 35) formed on a first integrated circuit substrate (200, Figs 3A-B, para 30);
a second insulating layer (paras 21,29,35,40-42) formed on the first insulating layer (para 30 – multiple layers);
a third insulating layer (paras 21,29,35,40-42) formed on the second insulating layer (para 30-multiple layers),
wherein a first cavity (210a,b) is formed in the third insulating layer (212, Fig 3B); and
a second substrate (300) bonded to the first integrated circuit substrate (200) such that the first cavity (210a,b) is sealed (paras 46-47).
Rothberg et al. disclose the invention as discussed above, but in different embodiments.
However, a skilled artisan would readily recognize the benefits of combining Rothberg et al.’s teachings to make applicant’s claimed invention above, since it would depend on cost (paras 17,19,30).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to combine the teachings of Rothberg et al. to make applicant’s currently claimed invention.
The motivation to do so would be based on cost (paras 17,19,30).
Regarding claim 9/1, Rothberg et al. disclose, wherein the second substrate comprises a silicon-on-insulator (SOI) substrate (paras 22,25).
Regarding claim 10/1, Rothberg et al. disclose, wherein a thickness of the second insulating layer is between approximately 0.005 microns to 0.100 microns (paras 33,42).
Regarding claim 18, Rothberg et al. disclose:
An ultrasound transducer device (abstract), comprising:
a first substrate (200, Figs 3A-B, para 30);
a first insulating layer (206, Fis 1-3B, paras 21, 35) formed on the first substrate (200);
a second insulating layer (paras 21,29,35,40-42) formed on the first insulating layer (206);
a cavity (210a,b) formed in the second insulating layer (paras 21,29,35,40-42); and
a second substrate (300) bonded to the first substrate (200) such that the second substrate seals the cavity (paras 46-47),
wherein the second substrate (300) comprises integrated circuitry (para 30).
Rothberg et al. disclose the invention as discussed above, but in different embodiments.
However, a skilled artisan would readily recognize the benefits of combining Rothberg et al.’s teachings to make applicant’s claimed invention above, since it would depend on cost (paras 17,19,30).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to combine the teachings of Rothberg et al. to make applicant’s currently claimed invention.
The motivation to do so would be based on cost (paras 17,19,30).
Claim(s) 2,3,5,8,19,20 are rejected under 35 U.S.C. 103 as being unpatentable over Rothberg et al. (US 2017/0225196) in view of Langa et al. (US 20160173001).
Regarding claim 2/1, Rothberg et al. disclose the invention as discussed above, except wherein the second insulating layer comprises aluminum oxide.
Langa et al. teaches a device wherein an insulating layer comprises aluminum oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the second insulating layer comprises aluminum oxide, as Langa et al. teaches the use of aluminum oxide.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Regarding claim 3/1, Rothberg et al. disclose the invention as discussed above, except wherein the third insulating layer comprises silicon oxide.
Langa et al. teaches a device wherein the insulating layer comprises silicon oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the third insulating layer comprises silicon oxide, as Langa et al. teaches the use of silicon oxide.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Regarding claim 5/1, Rothberg et al. disclose the invention as discussed above, except further comprising a fourth insulating layer formed on the second substrate, wherein the fourth insulating layer comprises aluminum oxide.
However, since Rothberg et al. disclose multiple insulating layers (para 21), a skilled artisan would readily recognize the benefits of having Rothberg et al.’s device to further comprising a fourth insulating layer formed on the second substrate, as it would depend on cost (paras 17,19,30) an on desired level of flexibility (para 19).
Rothberg et al. do not teach wherein the fourth insulating layer comprises aluminum oxide.
Langa et al. teaches a device wherein the insulating layer comprises silicon oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. to further comprising a fourth insulating layer formed on the second substrate and wherein the fourth insulating layer comprises aluminum oxide, as taught by Langa et al.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Regarding claim 8/1, Rothberg et al. disclose the invention as discussed above, except wherein the first insulating layer comprises silicon oxide.
Langa et al. teaches a device wherein the first insulating layer comprises silicon oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the first insulating layer comprises silicon oxide, as Langa et al. teaches the use of silicon oxide.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Regarding claim 19/18, Rothberg et al. disclose the invention as discussed above, except wherein the first insulating layer comprises aluminum oxide.
Langa et al. teaches a device wherein the first insulating layer comprises aluminum oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the first insulating layer comprises aluminum oxide, as Langa et al. teaches the use of aluminum oxide.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Regarding claim 20/18, Rothberg et al. disclose the invention as discussed above, except wherein the second insulating layer comprises silicon oxide.
Langa et al. teaches a device wherein the second insulating layer comprises silicon oxide (claim 17).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the second insulating layer comprises silicon oxide, as Langa et al. teaches the use of silicon oxide.
The motivation to do so is it would permit it to be manufactured more easily and/or exhibit an improved operating behavior (para 8 of Langa et al.) and be based on cost.
Claim(s) 11,12 are rejected under 35 U.S.C. 103 as being unpatentable over Rothberg et al. (US 2017/0225196) in view of Feyh et al. (US 2014/0264900)
Regarding claim 11/1, Rothberg et al. disclose the invention as discussed above, except wherein the second insulating layer is formed using atomic layer deposition (ALD).
Feyh et al. teaches an apparatus wherein an insulating layer is formed using atomic layer deposition [ALD] (paras 13-14).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the second insulating layer is formed using atomic layer deposition (ALD), as Feyh et al. teaches.
The motivation to do so is it would permit one to drastically reduce the density between electrical interconnects (para 12 of Feyh et al.).
Regarding claim 12/1, Rothberg et al. disclose the invention as discussed above, except wherein the third insulating layer is formed using atomic layer deposition (ALD).
Feyh et al. teaches an apparatus wherein an insulating layer is formed using atomic layer deposition [ALD] (paras 13-14).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. wherein the third insulating layer is formed using atomic layer deposition (ALD), as Feyh et al. teaches.
The motivation to do so is it would permit one to drastically reduce the density between electrical interconnects (para 12 of Feyh et al.).
Claim(s) 13,14,16 are rejected under 35 U.S.C. 103 as being unpatentable over Rothberg et al. (US 2017/0225196) in view of Van Schaijk et al. (US 20100264498).
Regarding claim 13, Rothberg et al. disclose:
An ultrasound transducer device (abstract), comprising:
an integrated circuit substrate (200, Figs 3A-B, para 30);
an aluminum oxide layer formed on the integrated circuit substrate (paras 24,30,31);
an insulating layer formed on the aluminum oxide layer (206, Figs 1-3B, paras 21, 35;
a cavity (210a,b) formed in the insulating layer (206); and
a membrane substrate bonded to the integrated circuit substrate such that the membrane substrate seals the cavity (paras 38,44-46),
wherein the membrane substrate forms a top surface of the cavity (para 38).
Rothberg et al. disclose the invention as discussed above, but in different embodiments.
However, a skilled artisan would readily recognize the benefits of combining Rothberg et al.’s teachings to make applicant’s claimed invention above, since it would depend on cost (paras 17,19,30).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to combine the teachings of Rothberg et al. to make applicant’s currently claimed invention.
The motivation to do so would be based on cost (paras 17,19,30).
Rothberg et al. do not disclose the aluminum oxide layer forms a bottom surface of the cavity, such that the cavity is between the membrane substrate and the aluminum oxide layer.
Van Schaijk et al. teach a device where the aluminum oxide layer (8, Fig 4), para 29) forms a bottom surface of the cavity (16), such that the cavity is between the membrane substrate (1, 2) and the aluminum oxide layer (8).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. where the aluminum oxide layer forms a bottom surface of the cavity, such that the cavity is between the membrane substrate and the aluminum oxide layer, as Van Schaijk et al. teach.
The motivation to do so would permit one to make a moveable beam (para 29 of Van Schaijk et al.).
Regarding claim 14/13, Rothberg et al. disclose wherein the insulating layer comprises silicon oxide (para 33).
Regarding claim 16/13, Rothberg et al. disclose wherein a thickness of the aluminum oxide layer is between approximately 0.005 microns to 0.100 microns (paras 24,31).
Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over Rothberg et al. (US 2017/0225196) in view of Van Schaijk et al. (US 20100264498, further in view of Feyh et al. (US 2014/0264900).
Regarding claim 17/13, Rothberg et al.in view of Van Schaijk et al disclose the invention as discussed above, except wherein the aluminum oxide layer is formed using atomic layer deposition (ALD).
Feyh et al. teaches an apparatus wherein the aluminum oxide layer is formed using atomic layer deposition [ALD] (paras 13-14,32).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing of the invention to modify Rothberg et al. in view of Van Schaijk et al. wherein the aluminum oxide layer is formed using atomic layer deposition (ALD), as Feyh et al. teaches.
The motivation to do so is it would permit one to drastically reduce the density between electrical interconnects (para 12 of Feyh et al.).
Allowable Subject Matter
Claims 4,6,7 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: In claim 4/3 inter alia, the specific limitations of “…wherein the second substrate comprises a silicon oxide layer, and the second substrate is bonded to the first integrated circuit substrate with a silicon oxide—silicon oxide bond between the silicon oxide layer on the second substrate and the third insulating layer on the first integrated circuit substrate.”, in the combination as claimed are neither anticipated nor made obvious over the prior art made of record.
In claim 6/5 inter alia, the specific limitations of “…wherein the third insulating layer comprises silicon oxide, and the second substrate is bonded to the first integrated circuit substrate with an aluminum oxide—silicon oxide bond between the fourth insulating layer on the second substrate and the third insulating layer on the first integrated circuit substrate.”, in the combination as claimed are neither anticipated nor made obvious over the prior art made of record.
In claim 7/5 inter alia, the specific limitations of “…further comprising: a fifth insulating layer formed on the fourth insulating layer on the second substrate; and a second cavity formed in the fifth insulating layer, wherein the fifth insulating layer comprises silicon oxide, the second substrate is bonded to the first integrated circuit substrate with a silicon oxide—silicon oxide bond between the fifth insulating layer on the second substrate and the third insulating layer on the first integrated circuit substrate, and the first cavity is aligned with the second cavity.”, in the combination as claimed are neither anticipated nor made obvious over the prior art made of record.
In claim 15/14 inter alia, the specific limitations of “…wherein the membrane substrate comprises a silicon oxide layer, and the membrane substrate is bonded to the integrated circuit substrate with a silicon oxide—silicon oxide bond between the silicon oxide layer on the membrane substrate and the insulating layer on the integrated circuit substrate.”, in the combination as claimed are neither anticipated nor made obvious over the prior art made of record.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please see PTO-892 for details.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NAISHADH N DESAI whose telephone number is (571)270-3038. The examiner can normally be reached 9-5.
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NAISHADH N. DESAI
Primary Examiner
Art Unit 2834
/NAISHADH N DESAI/Primary Examiner, Art Unit 2834