DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Action is non-final and is in response to the claims filed 01/31/2023. Claims 1-30 are currently pending, of which claims 1-30 are currently rejected.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 30 is rejected under 35 U.S.C. 101 because a recording medium being a computer-readable medium storing computer executable code would normally be considered statutory unless the specification defines “readable medium being a computer-readable medium” as including transient media such as signals, carrier waves, transmissions, optical waves, transmission media or other media incapable of being touched or perceived absent the non-transitory medium through which they are conveyed.
Claim 30 is not limited to non-transitory embodiments. Specifically, in view of the specification (¶0113), the computer-readable medium is not limited to non-transitory embodiments. Instead, the specification explains the computer readable medium may correspond to: “(1) tangible computer-readable storage media, which is non-transitory; or (2) a communication medium such as a signal or carrier wave.” Therefore, the claim is not limited to statutory subject matter, hence Claim 30 is non-statutory.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-13, 15-19, and 21-30 are rejected under 35 U.S.C. 103 as being unpatentable over Kasimir Gabert in NPL “How do I use atomicMax on floating-point values in CUDA?” (cited in IDS on 07/19/2024), hereinafter “Gabert”, in view of Gautron (U.S. Patent Application No.: US 20220019573 A1), hereinafter “Gautron”.
Regarding Claim 1, Gabert teaches:
An [algorithm], comprising:
…
obtain a first indication of a floating point number associated with a floating point operation (Answer by Gabert, float atomic max algorithm, e.g., float value (indication of a floating point number) is used for atomicMinFloat an datomicMaxFloat operations)); and
select a signed atomic integer operation or an unsigned atomic integer operation based on at least one of the floating point number or the floating point operation, wherein the signed atomic integer operation is associated with a condition being met and the unsigned atomic integer operation is associated with a failure of the condition to be met (Answer by Gabert, float atomic max algorithm, e.g., algorithm selects and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met); same mapping can apply using the float atomic min algorithm using different functions for signed and unsigned integers).
Gabert does not teach:
An apparatus for data processing, comprising:
a memory; and
at least one processor coupled to the memory and, based at least in part on information stored in the memory, the at least one processor is configured to:
However, Gautron teaches:
An apparatus for data processing (¶0061), comprising:
a memory (¶0061, e.g., compute system includes memory); and
at least one processor coupled to the memory and, based at least in part on information stored in the memory, the at least one processor is configured to (¶0061, e.g., processor may execute instructions received by memory):
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to combine the computing system as taught by Gautron with the algorithm to perform atomic floating point operations as taught by Gabert. One would have been motivated to combine these references because both references disclose algorithms using atomic floating point and integer values, and Gautron enhances the model of Gabert by allowing for a computing system to run Gabert’s algorithm.
Regarding Claim 2, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the at least one processor is further configured to:
transmit a second indication of the selected signed atomic integer operation or the selected unsigned atomic integer operation (Gabert: Answer by Gabert, float atomic max algorithm, e.g., algorithm selects (second indication) and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects (second indication) and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met)).
Regarding Claim 3, Gabert in view of Gautron teach:
The apparatus of claim 2, wherein the at least one processor is further configured to:
perform the selected signed atomic integer operation or the selected unsigned atomic integer operation after the at least one processor is configured to transmit the second indication (Gabert: Answer by Gabert, float atomic max algorithm, e.g., algorithm selects (second indication) and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects (second indication) and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met)).
Regarding Claim 5, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the selected signed atomic integer operation or the selected unsigned atomic integer operation corresponds to a one-to-one replacement of the floating point operation (Gabert: Answer by Gaber, float atomic max algorithm, e.g., function is selected based on the condition of the floating point value being greater than or equal to 0, or not).
Regarding Claim 6, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the at least one processor is further configured to:
determine whether the condition is met based on the first indication of the floating point number (Gabert: Answer by Gaber, float atomic max algorithm, e.g., float value (indication of a floating point number) is used for atomicMinFloat an datomicMaxFloat operations)), wherein to select the signed atomic integer operation or the unsigned atomic integer operation, the at least one processor is configured to select the signed atomic integer operation or the unsigned atomic integer operation based on the determination (Gabert: Answer by Gaber, float atomic max algorithm, e.g., algorithm selects and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met)).
Regarding Claim 7, Gabert in view of Gautron teach:
The apparatus of claim 6, wherein the condition is met if the floating point number is less than 0.0, and wherein the condition fails to be met if the floating point number is greater than or equal to 0.0 (Gabert: Answer by Gabert, float atomic max algorithm, e.g., algorithm selects and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met)).
Regarding Claim 8, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the at least one processor is further configured to:
obtain a second indication of whether an atomic maximum operation or an atomic minimum operation is to be applied on the floating point number, wherein to select the signed atomic integer operation or the unsigned atomic integer operation, the at least one processor is configured to select the signed atomic integer operation or the unsigned atomic integer operation based on the second indication (Gabert: Answer by Gabert, float atomic max algorithm, e.g., algorithm selects and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 (condition), and selects and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 (condition is not met); same mapping can apply using the float atomic min algorithm using different functions for signed and unsigned integers).
Regarding Claim 9, Gabert in view of Gautron teach:
The apparatus of claim 8, wherein the second indication indicates that the atomic maximum operation is to be applied on the floating point number, wherein to select the signed atomic integer operation, the at least one processor is configured to apply a signed atomic integer maximum operation on the floating point number (Gabert: Answer by Gabert, float atomic max algorithm, e.g., algorithm selects (second indication) and performs atomicMax function using a signed integer if the floating point value is greater than or equal to 0 using the floating point value).
Regarding Claim 10, Gabert in view of Gautron teach:
The apparatus of claim 8, wherein the second indication indicates that the atomic maximum operation is to be applied on the floating point number, wherein to select the unsigned atomic integer operation, the at least one processor is configured to apply an unsigned atomic integer minimum operation on the floating point number (Gabert: Answer by Gabert, float atomic max algorithm, e.g., selects and performs atomicMin using an unsigned integer if the floating point value is not greater than or equal to 0 using the floating point value).
Regarding Claim 11, Gabert in view of Gautron teach:
The apparatus of claim 8, wherein the second indication indicates that the atomic minimum operation is to be applied on the floating point number, wherein to select the signed atomic integer operation, the at least one processor is configured to apply a signed atomic integer minimum operation on the floating point number (Gabert: Answer by Gabert, float atomic min algorithm, e.g., algorithm selects (second indication) and performs atomicMin function using a signed integer if the floating point value is greater than or equal to 0 using the floating point value).
Regarding Claim 12, Gabert in view of Gautron teach:
The apparatus of claim 8, wherein the second indication indicates that the atomic minimum operation is to be applied on the floating point number, wherein to select the unsigned atomic integer operation, the at least one processor is configured to apply an unsigned atomic integer maximum operation on the floating point number (Gabert: Answer by Gabert, float atomic min algorithm, e.g., selects and performs atomicMax using an unsigned integer if the floating point value is not greater than or equal to 0 using the floating point value).
Regarding Claim 13, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the signed atomic integer operation or the unsigned atomic integer operation is associated with shader code at a graphics processor (Gautron: ¶0035, e.g., graphics hardware uses GLSL shaders).
The motivation to combine provided with respect to claim 1 applies equally to claim 13.
Regarding Claim 15, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the signed atomic integer operation or the unsigned atomic integer operation is associated with at least one thread at a graphics processor (Gautron: ¶0083, e.g., graphics processor includes operating cores to perform multi-threaded processing).
The motivation to combine provided with respect to claim 1 applies equally to claim 15.
Regarding Claim 16, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the apparatus is a wireless communication device comprising at least one of a transceiver or an antenna coupled to the at least one processor, wherein to obtain the first indication, the at least one processor is configured to obtain the first indication via at least one of the transceiver or the antenna (Gautron: Fig. 8, e.g., shows computer system using a wireless transceiver coupled to the processor).
The motivation to combine provided with respect to claim 1 applies equally to claim 16.
Regarding Claims 17-19 and 21-29, they are method claims practiced by the apparatus of claims 1-3 and 5-13. They are rejected for the same reasons as claims 1-3 and 5-13.
Regarding Claim 30, it is a media claim practiced by the apparatus of claim 1. It is rejected for the same reasons as claim 1.
Claims 4 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gabert in view of Gautron, further in view of Vinograd47 in NPL “How do I use atomicMax on floating-point values in CUDA?” (cited in IDS on 07/19/2024), hereinafter “Vinograd”.
Regarding Claim 4, Gabert in view of Gautron teach the apparatus of claim 1. Gabert in view of Gautron do no teach:
wherein the selected signed atomic integer operation or the selected unsigned atomic integer operation is associated with at least one compare exchange operation.
However, in the same field of endeavor, Vinograd teaches the atomicMax function can be implemented via an atomicCAS. Vinograd explains “atomicMax is not available for float types. But you can implement it via atomicCAS” (Answer by Vinograd)
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to modify the atomicMax as taught by Gabert in view of Gautron to be implemented as an atomicCAS as taught by Vinograd. One would have been motivated to combine these references because both references disclose performing atomic floating point operations, and Vinograd enhances the model of Gabert in view of Gautron by allowing for the atomicMax function to be available for float types. See Answer by Vinograd.
Regarding Claim 20, it is a method claim practiced by the apparatus of claim 4. It is rejected for the same reasons as claim 4.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Gabert in view of Gautron, further in view of Bharamble et al. (U.S. Patent Application Publication No.: US 20220365750 A1), hereinafter “Bharamble”.
Regarding Claim 14, Gabert in view of Gautron teach:
The apparatus of claim 1, wherein the signed atomic integer operation or the unsigned atomic integer operation is associated … a graphics processor (Gautron: ¶0071 and Fig. 10, e.g., processor includes graphics processor).
The motivation to combine provided with respect to claim 1 applies equally to claim 14.
Gabert in view of Gautron do no teach the components inside of the graphics processor. However, Bharamble teaches a GPU that uses an L2 cache. Bharamble explains “In at least one embodiment, GPU 3792 includes, without limitation, any number of programmable processing units 3920, a command processor 3910, an L2 cache 3922, memory controllers 3970, DMA engines 3980(1), system memory controllers 3982, DMA engines 3980(2), and GPU controllers 3984.” See ¶0443 and Fig. 39.
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to modify the graphics processor taught by Gabert in view of Gautron to include the components inside the GPU, including an L2 cache, as taught by Bharamble. One would have been motivated to combine these references because both references disclose using graphics processors and performing atomic operations, and Bharamble enhances the model of Gabert in view of Gautron by providing structure, including an L2 cache, for the graphics processing unit.
Prior Art Made of Record
US 20210263739 A1 – teaches performing atomic floating-point reductions. See ¶0033 and 0112. This is pertinent to the floating point atomic operations disclosed in the instant application on at least ¶0025 of the specification.
Conclusion
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/C.H.D./
Carlos H. De La GarzaExaminer, Art Unit 2182
/EMILY E LAROCQUE/Primary Examiner, Art Unit 2182
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