DETAILED ACTION
Claims 1-20 have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 U.S.C. § 101
35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
The invention, as taught in Claims 1-20, is directed to “mental steps” and “mathematical steps” without significantly more.
The claims recite:
• token-shared Fourier neural operator (FNO) unit (i.e., mathematical calculation)
• token-wise convolution layer coupled to receive outputs of the FNO unit (i.e., mathematical calculation)
• token-wise convolutional layer is configured to implement local-global mixing (i.e., mathematical calculation)
Claim 1
Step 1 inquiry: Does this claim fall within a statutory category?
The preamble of the claim recites “1. A neural network comprising:…” Therefore, it is a “neural network,” which is NOT a statutory category of invention.
Under 35 U.S.C. § 101, an invention must be limited to one of four statutory categories to be eligible for a patent: A “process,” a “machine” (i.e., apparatus), a “manufacture” (i.e., product of manufacture), or a “composition of matter”. If a claimed invention fails to be limited to one of these statutory categories, it cannot be patented.
The preamble teaching a “neural network” is not limited to any of these categories.
Therefore, the answer to the inquiry is: “NO.” (Note also that dependent claims 2 through 8 are also rejected as not being under a statutory category of invention.)
Step 2A (Prong One) inquiry:
Are there limitations in Claim 1 that recite abstract ideas?
YES. The following limitations in Claim 1 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mathematical steps”:
• token-shared Fourier neural operator (FNO) unit (i.e., mathematical calculation)
• token-wise convolution layer coupled to receive outputs of the FNO unit (i.e., mathematical calculation)
• token-wise convolutional layer is configured to implement local-global mixing (i.e., mathematical calculation and, because of the “configured to” language, software, per se)
Step 2A (Prong Two) inquiry:
Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “neural network” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “unit” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “layer” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask generator” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application.
Step 2B inquiry:
Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
(1) A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application.
Claim 1 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 2
Claim 2 recites:
2. The neural network of claim 1, the token-wise convolutional layer comprising a kernel size 2s + 1, where s is a stride size of the convolution.
Applicant’s Claim 2 merely teaches an equation (i.e., a mathematical step). It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 2 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 3
Claim 3 recites:
3. The neural network of claim 2, comprising a plurality of embedding paths.
Applicant’s Claim 3 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 3 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 4
Claim 4 recites:
4. The neural network of claim 3, wherein the embedding paths are configured with a variety of different token sizes.
Applicant’s Claim 4 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 4 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 5
Claim 5 recites:
5. The neural network of claim 3, wherein a number of the embedding paths is four.
Applicant’s Claim 5 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 5 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 6
Claim 6 recites:
6. The neural network of claim 5, wherein three of the four embedding paths comprise token sizes different from one another.
Applicant’s Claim 6 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 6 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 7
Claim 7 recites:
7. The neural network of claim 1, wherein one of the embedding paths comprises a token size of one to compensate for boundary conditions in the circuit mask.
Applicant’s Claim 7 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 7 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 8
Claim 8 recites:
8. The neural network of claim 1, further comprising a concatenator disposed to receive outputs of the embedding paths.
Applicant’s Claim 8 merely teaches the mental step of concatenation. Applicant's Specification recites:
[0053] Each shared FNO, by its structural nature, truncates high frequency coefficients to focus the CFNO-based mask optimizer network500 on global information acquisition. These high frequency components are however important is mask learning, because pixel-level changes on masks will result in magnified changes to wafer images. The convolution path may therefore be designed to compensate for high frequency information loss. Once the token embedding from the four learning paths is established, an aggregation (e.g., concatenation operation508) is performed to gather learned information. This is followed in the example embodiment by a series of convolution layers504 and transposed convolution layers510 to generate masks.
It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 8 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 9
Step 1 inquiry: Does this claim fall within a statutory category?
The preamble of the claim recites “9. A circuit mask generator comprising:…” Therefore, it is a “circuit mask generator,” which is NOT a statutory category of invention.
Under 35 U.S.C. § 101, an invention must be limited to one of four statutory categories to be eligible for a patent: A “process,” a “machine” (i.e., apparatus), a “manufacture” (i.e., product of manufacture), or a “composition of matter”. If a claimed invention fails to be limited to one of these statutory categories, it cannot be patented.
The preamble teaching a “circuit mask generator” is not limited to any of these categories.
Therefore, the answer to the inquiry is: “NO.” (Note also that dependent claims 10 through 14 are also rejected as not being under a statutory category of invention.)
Step 2A (Prong One) inquiry:
Are there limitations in Claim 9 that recite abstract ideas?
YES. The following limitations in Claim 9 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mathematical steps”:
• token-shared Fourier neural operator (FNO) unit (i.e., mathematical calculation)
• plurality of distinct embedding paths (i.e., mathematical calculation)
• embedding paths configured to each input a same tensor (i.e., mathematical calculation)
• apply a plurality of different token sizes to an embedding (i.e., mathematical calculation)
• token-wise convolution layer (i.e., mathematical calculation)
• local-global mixing of the features (i.e., mathematical calculation)
Step 2A (Prong Two) inquiry:
Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “neural network” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “unit” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “layer” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask generator” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application.
Step 2B inquiry:
Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
(1) A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application.
Claim 9 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 10
Claim 10 recites:
10. The circuit mask generator of claim 9, the token-wise convolution layer comprising a kernel size 2s + 1, where s is a convolution stride size.
Applicant’s Claim 10 merely teaches an equation (i.e., a mathematical step). It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 10 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 11
Claim 11 recites:
11. The circuit mask generator of claim 9, wherein the FNO unit comprises four embedding paths.
Applicant’s Claim 11 merely mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 11 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 12
Claim 12 recites:
12. The circuit mask generator of claim 11, wherein three of the four embedding paths comprise token sizes different from one another.
Applicant’s Claim 12 mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 12 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 13
Claim 13 recites:
13. The circuit mask generator of claim 9, wherein one of the embedding paths comprises a token size of one.
Applicant’s Claim 13 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 13 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 14
Claim 14 recites:
14. The circuit mask generator of claim 9, further comprising logic disposed to receive and concatenate outputs of the embedding paths.
Applicant’s Claim 14 merely teaches the mental step of concatenation. Applicant's Specification recites:
[0053] Each shared FNO, by its structural nature, truncates high frequency coefficients to focus the CFNO-based mask optimizer network500 on global information acquisition. These high frequency components are however important is mask learning, because pixel-level changes on masks will result in magnified changes to wafer images. The convolution path may therefore be designed to compensate for high frequency information loss. Once the token embedding from the four learning paths is established, an aggregation (e.g., concatenation operation508) is performed to gather learned information. This is followed in the example embodiment by a series of convolution layers504 and transposed convolution layers510 to generate masks.
It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 14 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 15
Step 1 inquiry: Does this claim fall within a statutory category?
The preamble of the claim recites “15. A process for improving a circuit mask, the process comprising:…” Therefore, it is a “process,” (or, a “method”) which is a statutory category of invention. Therefore, the answer to the inquiry is: “YES.”
Step 2A (Prong One) inquiry:
Are there limitations in Claim 15 that recite abstract ideas?
YES. The following limitations in Claim 15 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mathematical steps”:
• applying features of the circuit mask to a token-shared Fourier neural operator (FNO) unit comprising a plurality of distinct embedding paths (i.e., mathematical calculation)
• embedding paths process the features with different token sizes (i.e., mathematical calculation)
• performing a token-wise convolution to implement local-global mixing of the features (i.e., mathematical calculation)
Step 2A (Prong Two) inquiry:
Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “neural network” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “unit” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “layer” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
This “circuit mask generator” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)).
The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application.
Step 2B inquiry:
Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim?
Applicant’s claims contain the following “additional elements”:
(1) A “neural network”
(2) A “unit”
(3) A “layer”
(4) A “circuit mask”
(5) A “circuit mask generator”
(1) A “neural network” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(2) A “unit” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(3) A “layer” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(4) A “circuit mask” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
(5) A “circuit mask generator” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f) recites in part:
2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]
Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer.
Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)).
Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application.
Claim 15 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 16
Claim 16 recites:
16. The process of claim 15, where the token-wise convolution operates with a kernel size 2s + 1, where s is a convolution stride size.
Applicant’s Claim 16 merely teaches an equation (i.e., a mathematical step). It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 16 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 17
Claim 17 recites:
17. The process of claim 15, wherein the FNO unit comprises four embedding paths.
Applicant’s Claim 17 merely mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 17 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 18
Claim 18 recites:
18. The process of claim 17, wherein at least three of the four embedding paths comprise token sizes different from one another.
Applicant’s Claim 18 merely mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 18 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 19
Claim 19 recites:
19. The process of claim 15, wherein one of the embedding paths comprises a token size of one.
Applicant’s Claim 19 merely teaches mathematical embedding steps. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 19 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Claim 20
Claim 20 recites:
20. The process of claim 15, further comprising: concatenating outputs of the embedding paths.
Applicant’s Claim 20 merely teaches the mental step of concatenation. Applicant's Specification recites:
[0053] Each shared FNO, by its structural nature, truncates high frequency coefficients to focus the CFNO-based mask optimizer network500 on global information acquisition. These high frequency components are however important is mask learning, because pixel-level changes on masks will result in magnified changes to wafer images. The convolution path may therefore be designed to compensate for high frequency information loss. Once the token embedding from the four learning paths is established, an aggregation (e.g., concatenation operation508) is performed to gather learned information. This is followed in the example embodiment by a series of convolution layers504 and transposed convolution layers510 to generate masks.
It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).)
Claim 20 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101.
Reasons for Not Rejecting the Clams Under Art
Claims 1-20 are not rejected since when reading the claims in light of the Specification, as per MPEP § 2111.01, none of the references of record, whether taken alone or in combination, discloses or suggests the combination of limitations specified in independent Claim 1. Specifically, the closest prior art of: Rao, et al., Global Filter Networks for Image Classification, arXiv:2107.00645v2 [cs.CV] 26 Oct 2021, 26 OCT 2021, pp. 1-19 fails to expressly teach:
Claim 1's "...a token-wise convolution layer coupled to receive outputs of the FNO unit..." The prior art performs the following:
We replace the self-attention sub-layer in vision transformers with three key operations: a 2D discrete Fourier transform to convert the input spatial features to the frequency domain, an element-wise multiplication between frequency-domain features and the global filters, and a 2D inverse Fourier transform to map the features back to the spatial domain.
Claim 1's "...the token-wise convolutional layer is configured to implement local-global mixing for circuit mask optimization..." The prior art performs the following:
Since the Fourier transform is used to mix the information of different tokens, the global filter is much more efficient compared to the self-attention and MLP thanks to the O(L log L) complexity of the fast Fourier transform algorithm (FFT).
Further, none of the references of record, whether taken alone or in combination, discloses or suggests the combination of limitations specified in independent Claim 9. Specifically, the closest prior art of: Rao, et al. fails to expressly teach:
Claim 9's "...embedding paths configured to each input a same tensor representing features of a circuit mask and to apply a plurality of different token sizes to an embedding of the circuit mask..."
Claim 9's "...the token-wise convolutional layer is configured to implement local-global mixing for circuit mask optimization..." The prior art performs the following:
Since the Fourier transform is used to mix the information of different tokens, the global filter is much more efficient compared to the self-attention and MLP thanks to the O(L log L) complexity of the fast Fourier transform algorithm (FFT).
Further, none of the references of record, whether taken alone or in combination, discloses or suggests the combination of limitations specified in independent Claim 15. Specifically, the closest prior art of: Rao, et al. fails to expressly teach:
Claim 15's "...applying features of the circuit mask to a token-shared Fourier neural operator (FNO) unit comprising a plurality of distinct embedding paths..."
Claim 15's "...the token-wise convolutional layer is configured to implement local-global mixing for circuit mask optimization..." The prior art performs the following:
Since the Fourier transform is used to mix the information of different tokens, the global filter is much more efficient compared to the self-attention and MLP thanks to the O(L log L) complexity of the fast Fourier transform algorithm (FFT).
Only to the extent that these limitations (specifically as defined above) are not found in the prior art of record is the present case not rejected over the prior art.
Response to Arguments
Applicant's arguments filed 13 APR 2026 have been fully considered but they are not persuasive. Specifically, Applicant argues:
Argument 1
Objections
Claims 2, 10, 15, and 16 are objected to because of informalities. These objections are believed to be addressed by the amendments to the Claims provided herein.
The claim objections are WITHDRAWN.
Argument 2
Artificial Neural Network Structures
Artificial neural networks are commonly deployed as components of data centers, desktop and laptop computers, mobile phones, and many other devices, and are useful in a wide range of practical applications. For example, artificial neural networks are commonly utilized as the basis of artificial intelligence (AI) systems. As is well known in the art, artificial neural networks comprise, at a high level, collections of nodes organized into layers that are coupled to one another through weighted activation paths.
A neural network's structure and layer configurations dictate physical memory access behaviors and electronic activation pathways through hardware computational circuits when executing workloads. In other words, neural networks implemented as computer instructions are highly engineered memory structures that determine the functioning of the computer system itself on particular tasks. The specific functioning of a computer system by execution of a particular neural network structure is inseparable from that neural network structure. A neural network structure is thus, in a physical and technological sense, far more than "math" in the abstract.
Far from reciting a mathematical formula in the abstract, novel and non-obvious neural network structures are machine-implemented computational architecture analogous to novel and non-obvious electronic circuits. A novel and non-obvious neural network structure is no more "just math" than a novel and nonobvious digital electronic circuit is "just Boolean logic." Both may be described to some extent using mathematical formalisms, but both exist as physical engineered artifacts.
The Patent Office and the Courts have long recognized that a novel and nonobvious configuration of components resulting in a technological improvement - even if some or all are software-defined - constitutes a patent-eligible machine, provided it is sufficiently embedded in a technological system and solution. This is especially the case when the technological improvement over convention is to the functioning of a computer system itself (e.g., more efficient computational resource utilization). A computer system comprising a novel and non-obvious artificial neural network layer structure constitutes "a particular machine," not a general-purpose computer.
Applicant’s neural network architecture is mathematical. Applicant’s Specification teaches the details of this. The c
Fourier Neural Operator -
Note that the claimed “Fourier Neural Operator (FNO)” is solely a mathematical step, as taught in Applicant's Specification:
[0040] A Fourier Neural Operator implements a kernel K integral at some token g:…
Local-Global Mixing -
Note that the claimed “mixing” is solely a mathematical function, as taught in Applicant's Specification:
[0031] The FNO component receives an embedding tensor input and performs a mixing function to learn global perception following Fourier Transform, frequency mixing, and inverse Fourier Transform.
[0040] … The global convolution kernel K may not be explicitly trained to preserve computing overhead. Instead, a frequency mixing weight W = F(K) E Chxw may be utilized and Equation (2) becomes…
[0048] Equation (7) defines how tokens at different spatial locations are mixed (via the token-wise convolution) and hence addresses the token boundary inconsistency issue and long-range dependency requirements.
Convolution Layer -
Note that the mathematical convolution layer is taught by equation (7) of the Specification, which is introduced in paragraph [0048], where it recites:
[0048] Equation (7) defines how tokens at different spatial locations are mixed (via the token-wise convolution) and hence addresses the token boundary inconsistency issue and long-range dependency requirements.
Further, Equation 7 is expressly presented in Applicant’s Specification, paragraph [0046]. Further Applicant’s equation 7 is discussed in Applicant’s Specification, paragraph [0048].
Embedding Paths -
Note that the claimed “embedding” solely is a mathematical step, as taught in Applicant's Specification:
[0031] The FNO component receives an embedding tensor input and performs a mixing function to learn global perception following Fourier Transform, frequency mixing, and inverse Fourier Transform.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 3
Convolutional Fourier Neural Operators (CFNOs)
The Claims describe a neural network structure (Convolutional Fourier Neural Operators, i.e., CFNOs) with improved properties for implementing large-scale lithography mask optimization tasks. Compared to conventional mechanisms, a CFNO neural network may generate an optimized large-scale lithography mask with timing that meets or exceeds industry turn-around requirements from design to production. The claimed CFNO structures improve the functioning of computer systems for this task by, among other things, eliminating the use of iterative numerical optimization and multiple Fourier Transforms in the processing pipeline. See for example Par. 28- 29 and 31 of the Specification. The claimed CFNO structures also improve the functioning of the computer by enabling efficient memory utilization for mask optimization tasks (Specification, Par. 48).
The Examiner asserts that some Claim features can be expressed individually as mathematical relationships and that therefor the Claims overall describe an abstraction that is ineligible for protection of the patent laws. The Applicant respectfully disagrees. Although some functional aspects of the claimed neural network structures may be expressed with math notation, the math per se is not what the claims are directed to. Any mathematical aspects of the claimed mechanisms are not claimed in a vacuum, but as fully integrated features of innovative neural network structures configured for a particular technical purpose.
Paragraph [0048] specifically recites: “This enables the CFNO to exhibit both computing and memory efficiency.” There is no assertion or measure of increased efficiency. Any program inside the computer memory exhibits some level of efficiency. Even an inoperative program exhibits an efficiency of zero.
Any argument of increased efficiency is conclusory and unsupported.
Regarding Applicant’s Last statement about neural network structures configured for a particular technical purpose, this does not argue that a particular technology was improved. Only that it was configured for a particular technical purpose which may include simply training the mathematical neural network for some unspecified practical application.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 4
Claims 1-8 describe aspects of a neural network (see FIG. 4) comprising a token-shared Fourier neural operator (FNO) unit, a token-wise convolution layer coupled to receive outputs of the FNO unit, in which the token-wise convolutional layer is configured to implement local-global mixing for circuit mask optimization. Taken as a whole, this is unambiguously an unconventional computerization control structure specifically configured to improve computerization of a technological task (lithography mask generation/optimization)
It is the mathematical Fourier neural operator (FNO) that is improved; not the process of lithography mask generation.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 5
Claims 9 - 14 describe a circuit mask generator (see FIG. 5) comprising a token-shared Fourier neural operator (FNO) unit comprising a plurality of distinct embedding paths configured to each input a same tensor representing features of a circuit mask, and to apply a plurality of different token sizes to an embedding of the circuit mask, and a token-wise convolution layer configured to implement local-global mixing of the features of the circuit mask. Taken as a whole, this is unambiguously an unconventional computerization control structure specifically configured to improve computerization of a technological task (lithography mask generation/optimization)
It is the mathematical Fourier neural operator (FNO) that is improved; not the process of lithography mask generation.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 6
Claims 15-20 recite a process for improving a circuit mask by applying features of the circuit mask to a token-shared Fourier neural operator (FNO) unit comprising a plurality of distinct embedding paths, wherein the embedding paths process the features with different token sizes to generate different embeddings of the circuit mask in a neural network, and performing a token- wise convolution to implement local-global mixing of the features of the circuit mask. In other words, Claims 15-20 describe operation of the concrete neural network structures recited in Claims 1-14 for the patent-eligible technological purpose of improving the structure of a lithography mask.
Note that the calculated result is never used to create an actual physical circuit mask. In Diamond v. Diehr, the calculated result is actually applied to automatically open a rubber kiln door.
In the present case, Applicant’s calculations are never similarly applied to create a physical circuit mask. No limitations on how this is performed are presented at all.
It is the mathematical Fourier neural operator (FNO) that is improved; not the process of lithography mask generation.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 7
Novel and Non-Obvious Neural Network Structures are Not Abstractions
Novel and non-obvious neural network structures specifically configured for a particular technological function are not abstractions ineligible for protection of the patent laws.
The recent Federal Circuit case Recentive Analytics V. Fox (Fed. Cir. Apr. 18, 2025) analyzed the eligibility of neural network structures under 35 U.S.C. 101. As noted by the Federal Circuit in that case, eligible claims on such models typically involve improvement to model architecture, especially improvements that lead to greater computational efficiency and/or system performance overall. Ineligible claims may typically be those that simply recite the use of generic machine learning to make better predictions or decisions, especially those that target business (not technological) problems.
Applicant does not argue that a particular technology was improved. Only that it was configured for a particular technical function which may include simply training the mathematical neural network for some unspecified practical application.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 8
The Claimed Structures are Improvements Rooted in a Specific Technological Field
The claims are directed to computerized structures for circuit mask optimization, a core step in photolithography and semiconductor fabrication. This is a physical, engineering-driven domain, not a business or organizational process. Like the patent-eligible claims in McRO, Inc. v. Bandai Namco Games America Inc., 837 F.3d 1299 (Fed. Cir. 2016), which improved the computerization of animation and were not abstract, the present Claims recite technological improvements to the computerization of lithography mask generation and are also not abstract. The claimed structures are directed to computerized structures that improve lithography mask pattern fidelity and manufacturability, not to abstract data processing.
Unlike the Claims in Recentive, the present Claims do not merely recite "applying machine learning to X". The Claims recite concrete architectural constraints on a neural network structure that enable improved computerization of the optimization of lithography masks: a token-shared Fourier neural operator (FNO) unit, a token-wise convolution layer, and a local-global mixing mechanism.
Applicant does not argue that a particular technology was improved.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 9
Claims Recite a Technical Solution to a Physical Problem
The technical problem, as noted in the Specification, is accounting for long-range interactions in lithography mask layouts (optical proximity effects, diffraction) when shaping the final mask.
The Claims recite novel features to address this problem: the FNO for global frequency- domain modeling, token-wise convolution for local spatial refinement, and joint local-global mixing. This novel and non-obvious structure for improved computerization of a technical problem is analogous to the improved database structure claimed in Enfish, LLC v. Microsoft Corp., 822 F.3d 1327 (Fed. Cir. 2016), which the Federal Circuit held to be patent-eligible. Also like the patent-eligible claims in DDR Holdings, LLC v. Hotels.com, L.P., 773 F.3d 1245 (Fed. Cir. 2014), the present Claims are a technical solution rooted in computer configuration. In other words, the present Claims recite a solution to a physics-driven layout optimization problem using a specific computational structures.
Applicant does not argue that a particular technology was improved.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 10
The Claims Recite an Unconventional Combination of Components
Fourier neural operators (FNOs) are not standard convolutional neural network or transformer blocks. The cooperative integration of token-sharing, FNOs, and token-wise convolution not conventional, not routine, and not a recitation of a generic machine learning structure or pipeline. In addition to not being directed to an abstraction, the claimed structures are also "significantly more" than any abstraction (e.g., math operators) that may be utilized to implement them.
It is the mathematical Fourier neural operator (FNO) that is improved; not the process of lithography mask generation.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Argument 11
The Claims Recite an Improvement in Computerization of a Technical Process
The technical features recited in the Claims enable the application of long-range spatial dependencies efficiently into the optimization of a lithography mask shape. As noted in the Specification, the claimed features enable greater computational efficiency and memory utilization vs conventional full attention mechanisms and the use of large convolution kernels.
Paragraph [0048] specifically recites: “This enables the CFNO to exhibit both computing and memory efficiency.” There is no assertion or measure of increased efficiency. Any program inside the computer memory exhibits some level of efficiency. Even an inoperative program exhibits an efficiency of zero.
Any argument of increased efficiency is conclusory and unsupported.
Regarding Applicant’s Last statement about neural network structures configured for a particular technical purpose, this does not argue that a particular technology was improved. Only that it was configured for a particular technical purpose which may include simply training the mathematical neural network for some unspecified practical application.
Applicant’s argument is unpersuasive.
The claim rejections stand.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiries concerning this communication or earlier communications from the examiner should be directed to Wilbert L. Starks, Jr., who may be reached Monday through Friday, between 8:00 a.m. and 5:00 p.m. EST. or via telephone at (571) 272-3691 or email: Wilbert.Starks@uspto.gov.
If you need to send an Official facsimile transmission, please send it to (571) 273-8300.
If attempts to reach the examiner are unsuccessful the Examiner’s Supervisor (SPE), Kakali Chaki, may be reached at (571) 272-3719.
Hand-delivered responses should be delivered to the Receptionist @ (Customer Service Window Randolph Building 401 Dulany Street, Alexandria, VA 22313), located on the first floor of the south side of the Randolph Building.
Finally, information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Moreover, status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have any questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) toll-free @ 1-866-217-9197.
/WILBERT L STARKS/
Primary Examiner, Art Unit 2122
WLS
03 AUG 2026
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