DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 1 is objected to because of the following informality: on line 15, “fills into the trench” should be “fills the trench”. Appropriate correction is required.
Claim 9 is objected to because of the following informalities:
on line 12, “completely overlay” should be “completely overlies”; and
on line 15, “wherein a part of the P-type GaN layer fills into the trench” should be “wherein a part of the P-type GaN layer fills the trench”.
Appropriate correction is required.
Claim 10 is objected to because of the following informality: on line 2, “comprising following step:” should be “comprising the following steps:”. Appropriate correction is required.
Claim 11 is objected to because of the following informalities:
on line 2, “further comprising:” should be “further comprising the following steps:”; and
on line 5, “AlGaN layer” should be “AlGaN layer; and”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7, 14, and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 7, lines 1-2, the recitation of “wherein the dielectric layer includes P-type GaN” is indefinite because, while GaN can be a dielectric layer, P-type GaN can’t be a dielectric layer due to the fact that it is doped which makes it a semiconductor that can conduct electricity. Correction and/or clarification are/is required. No new matter may be added. For purpose of examination, this recitation in lines 1-2 of claim 7 is interpreted as: “wherein the dielectric layer includes GaN”.
Regarding claim 14, lines 2-4, the recitation of “wherein the two insulation sidewalls include aluminum oxide (Al2O3), and wherein the two insulation sidewalls are formed via a self-alignment process step” is indefinite because “the two insulation sidewalls” were never claimed in the first place. Claim 14 depends from claim 9, lines 10-12 of which recite: “forming an insulation sidewall via a self-alignment process step, wherein the insulation sidewall is in contact with and completely overlay two inner sidewalls of the trench”. Correction and/or clarification are/is required. No new matter may be added. For purpose of examination, this recitation in lines 2-4 of claim 14 is interpreted as: “wherein the insulation sidewall includes aluminum oxide (Al2O3), an wherein the insulation sidewall is formed via a self-alignment process step”, in order to be consistent with claim 9.
Regarding claim 15, line 2, the recitation of “wherein the dielectric layer includes P-type GaN” is indefinite because, while GaN can be a dielectric layer, P-type GaN can’t be a dielectric layer due to the fact that it is doped which makes it a semiconductor that can conduct electricity. Correction and/or clarification are/is required. No new matter may be added. For purpose of examination, this recitation in line 2 of claim 15 is interpreted as: “wherein the dielectric layer includes GaN”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Influence of Traps on the Gate Reverse Characteristics of Normally-Off-High-Electron-Mobility Transistors with Regrown p-GaN Gate (Chen) in view of US 2023/0395670 A1 (Hardiman).
Regarding claim 1, Chen discloses, An enhancement high electron mobility transistor (HEMT) (FIG. 1(a); page 104005-1), comprising:
a substrate (FIG. 1(a); page 104005-1);
a first gallium nitride (GaN) layer (annotated FIG. 1(a), below; page 104005-1), which is formed on the substrate (annotated FIG. 1(a), below);
a first aluminum gallium nitride (AlGaN) layer (annotated FIG. 1(a), below; page 104005-1), which is formed on and in contact with the first GaN layer (annotated FIG. 1(a), below), wherein the first AlGaN layer has a trench (annotated FIG. 1(a), below), wherein the trench does not penetrate through the AlGaN layer (annotated FIG. 1(a), below);
PNG
media_image1.png
557
802
media_image1.png
Greyscale
a P-type GaN layer (annotated FIG. 1(a), above; page 104005-1), which is formed on and in contact with the first AlGaN layer (annotated FIG. 1(a), above), wherein a part of the P-type GaN layer fills into the trench (annotated FIG. 1(a), above);
a gate (annotated FIG. 1(a), above; page 104005-1), which is formed on and in contact with the P-type GaN layer (annotated FIG. 1(a), above), and is configured to receive a gate voltage, so as to turn ON or turn OFF the enhancement HEMT1; and
a source and a drain (source (S) and drain (D); annotated FIG. 1(a), above), which are located outside two sides of the gate (annotated FIG. 1(a), above), respectively, wherein the source (S) and the drain (D) penetrate through the first AlGaN layer (annotated FIG. 1(a), above), so that the source (S) and the drain (D) are in contact with the first GaN layer (annotated FIG. 1(a), above).
But Chen does not appear to explicitly disclose, two insulation sidewalls, which are in contact with and completely overlay two inner sidewalls of the trench, respectively.
However, in analogous art, Hardiman discloses that in a high electron mobility transistor (HEMT) (HEMT (100); FIG. 1A; [0066]) two insulation sidewalls (insulation sidewalls (160S; FIG. 5D; [0103]) can be predicably formed to be in contact with and completely overlaying two inner sidewalls of a trench (150op; annotated FIG. 5A, below; [0101]), respectively. Hardiman also discloses that insulation sidewalls (160S) define the desired length LG (FIG. 5D) of a second trench (second trench (126R); annotated FIG. 5D, below; [0103])) in aluminum gallium nitride (AlGaN) layer ((AlGaN layer (126); FIG. 1A; [0071])) ([0103]). Hardiman additionally discloses that second trench (126R) does not penetrate through AlGaN layer (126) (annotated FIG. 5D, below).
PNG
media_image2.png
382
418
media_image2.png
Greyscale
PNG
media_image3.png
317
502
media_image3.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen and Hardiman before him/her that the trench of Chen can include, two insulation sidewalls, which are in contact with and completely overlay two inner sidewalls of the trench, respectively, as taught by Hardiman, to define the desired length (LG) of the trench of Chen (annotated FIG. 1(a), above), as additionally taught by Hardiman. See also, MPEP 2144(IV) which states that “[t]he reason or motivation to modify the reference may often suggest what the inventor has done, but for a different purpose or to solve a different problem. It is not necessary that the prior art suggest the combination to achieve the same advantage or result discovered by the applicant.” See, e.g., In re Kahn, 441 F.3d 977, 987, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006).
Claims 2, 7, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman, as applied to claim 1, above, and further in view of US 2022/0102541 A1 (Lin).
Regarding claim 2, Chen in view of Hardiman discloses, The enhancement HEMT of claim 1, further comprising:
a dielectric layer (dielectric layer (SiNx); annotated FIG. 1(a), above), which is formed on and in contact with the first AlGaN layer (annotated FIG. 1(a), above), wherein the dielectric layer lies (SiNx) between the P-type GaN layer and the drain (D) in a channel direction (annotated FIG 1(a), above).
But Chen in view of Hardiman does not appear to explicitly disclose,
an adjustment drain, which is formed on and in contact with the dielectric layer;
wherein the dielectric layer and the adjustment drain entirely overlap each other, to form a stacked structure, and wherein a length of the stacked structure along the channel direction and a gap width between the stacked structure and the gate are determined according to a required operation reliability of the enhancement HEMT2.
However, in analogous art, Lin discloses, a HEMT semiconductor device (HEMT semiconductor device (100); FIG. 1; [0030]-[0031]) having a dielectric layer (dielectric layer (120); FIG. 1; [0042]) formed on and in contact with an aluminum gallium nitride (AlGaN) layer (AlGaN layer (116); FIG. 1; [0039]). Lin also discloses an adjustment drain (adjustment drain (170); FIG. 1; [0042]) which is formed on and in contact with the dielectric layer (120) and with the drain (drain (140); FIG. 1; [0056]-[0057]). Lin additionally discloses that dielectric layer (120) and adjustment drain (170) entirely overlap each other, to form a stack structure (FIG. 1). Lin further discloses that a length of the stacked structure along the channel direction (annotated FIG 1, above) and a gap width (gap width (180); FIG. 3; [0079) between the stacked structure and the gate (gate (150); FIG. 1; [0045]) are determined according to a required operation reliability of the enhancement HEMT (100) ([0079]).
PNG
media_image4.png
492
647
media_image4.png
Greyscale
Lin also further discloses that adjustment drain (170) “may modify the electric field distribution, and thus reduce the risk of the gate structure suffering from high electric fields. In addition, when the switch is off, the conductive path may be formed by the electric field modulation structure to guide the carriers (such as electrical charges) outside the device, thereby improving the performance of the semiconductor device. In addition, the semiconductor device provided by the present disclosure is particularly suitable for high electron mobility transistors (HEMT)” ([0030]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, and Lin before him/her that HEMT of Chen and Hardiman include an adjustment drain, which is formed on and in contact with the dielectric layer (SiNx) of Chen and Hardiman, as taught by Lin, wherein the dielectric layer (SiNx) and the adjustment drain entirely overlap each other, to form a stacked structure, as also taught by Lin, and wherein a length of the stacked structure along the channel direction and a gap width between the stacked structure and the gate are determined according to a required operation reliability of the enhancement HEMT of Chen and Hardiman, as additionally taught by Lin, to: (i) modify the electric field distribution and thus reduce the risk of the gate structure suffering from high electric fields and/or (ii) form a conductive path when the switch is off that guides carriers outside the device, thereby improving performance of the device, as further taught by Lin.
Regarding claim 7, Chen in view of Hardiman and further in view of Lin discloses, The enhancement HEMT of claim 2, wherein the dielectric layer (SiNx) includes P-type GaN ([0043] of Lin—dielectric layer (120) may include “other suitable dielectric materials” and GaN is a dielectric material3), and wherein the dielectric layer and P-type GaN layer are formed via a same process step because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that it is faster and more efficient to manufacture the dielectric layer and GaN layer of Chen in view of Hardiman and further in view of Lin in the same process step, rather than in separate process steps. See, MPEP 2143(G).4
Regarding claim 8, Chen in view of Hardiman and further in view of Lin discloses, The enhancement HEMT of claim 2, wherein the adjustment drain (170 of Lin) and the drain (140 of Lin) are electrically connected to each other ([0056]-[0057] of Lin).
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman, as applied to claim 1, above, and further in view of US 2017/0330944 A1 (Baines).
Regarding claim 3, Chen in view of Hardiman discloses, The enhancement HEMT of claim 1, further comprising:
a second AlGaN layer (annotated FIG. 1(a), above), which is formed below and in contact with the first GaN layer (annotated FIG. 1(a), above).
But Chen in view of Hardiman does not appear to explicitly disclose, a second GaN layer, which is formed below and in contact with the second AlGaN layer
However, in analogous art, Baines discloses a HEMT transistor (HEMT transistor (1); FIG. 1; [0033]) having a superlattice layer (superlattice layer (12); FIG. 1; [0036]) of AlxGa1-xN/GaN stacked materials ([0036]) beneath a gallium nitride (GaN) layer (GaN layer (13); FIG. 1; [0037]).
PNG
media_image5.png
422
800
media_image5.png
Greyscale
Baines also discloses that superlattice layer (12) manages mechanical stresses and contributes to the vertical electrical insulation of HEMT (1) ([0036]). Baines additionally discloses a drain (drain (21); FIG. 1; [0042]) and a source (source (22); FIG. 1; [0042]) which do not penetrate through superlattice layer (12).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, and Baines before him/her that HEMT of Chen in view of Hardiman include a second GaN layer, which is formed below and in contact with the second AlGaN layer of Chen in view of Hardiman in a superlattice structure, as taught by Baines, to manage mechanical stresses and to contribute to the vertical electrical insulation of the HEMT of Chen in view of Hardiman, as also taught by Baines. See also, MPEP 2144(IV), above.
Regarding claim 4, Chen in view of Hardiman and Baines discloses, The enhancement HEMT of claim 3, wherein the source (S; annotated FIG. 1(a), above) and the drain (D; annotated FIG. 1(a), above) do not penetrate through the second AlGaN layer (annotated FIG. 1(a), above) but stay in the first AlGaN layer (annotated FIG. 1(a), above), wherein a thickness of the second AlGaN layer is controlled so as to avoid generating a two-dimensional electron gas (2DEG) between the second AlGaN layer and the second GaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for the controlling a thickness of the second AlGaN layer, namely, either: (i) the thickness is controlled so as to avoid generating a two-dimensional electron gas (2DEG) or (ii) the thickness is controlled to generate a two-dimension electron gas (2DEG), and absent unexpected results, it would have been obvious to try each of these two possibilities, one of which is recited by claim 4. See MPEP 2143(E) —“Obvious To Try”—Choosing From a Finite Number of Identified, Predictable Solutions, With a Reasonable Expectation of Success.
Regarding claim 5, Chen in view of Hardiman and further in view of Baines discloses, The enhancement HEMT of claim 3, wherein the source (S) and drain (D) further penetrate through the second AlGaN layer (annotated FIG. 1(a), above), so that the source (S) and drain (D) are in contact with the second GaN layer, whereby a 2DEG is generated between the second AlGaN layer and the second GaN layer by controlling a thickness of the second AlGaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for the source (S) and (D) of Chen in view of Hardiman and further in view of Baines regarding the second AlGaN layer and second GaN, namely: (i) the source (S) and drain (D) penetrate through the second AlGaN layer so that they are in contact with the second GaN; (ii) the source (S) and drain (D) penetrate through the second AlGaN layer, but they are in contact with the second GaN; or (iii) the source (S) and drain (D) do not penetrate through the second AlGaN layer, and, absent unexpected results, it would have been obvious to try each of these three possibilities, one of which is recited by claim 5. See MPEP 2143(E), above.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman, as applied to claim 1, above, and further in view of US 2019/0371909 A1 (Banerjee) and US 2023/0033289 A1 (Huang).
Regarding claim 6, Chen in view of Hardiman does not appear to explicitly disclose, wherein the two insulation sidewalls include aluminum oxide (Al2O3), and wherein the two insulation sidewalls are formed via a self-alignment process step.
However, in analogous art, Banerjee discloses a HEMT (HEMT (100); FIG. 1; [0027]) that includes a substrate (substrate (102); FIG. 1; [0027]), a gallium nitride (GaN) layer (GaN layer (106); FIG. 1; [0027]; [0029]), and a layer (layer (408); FIG. 5; [0043]) that can be aluminum gallium nitride (AlGaN) when y = 0 ([0043]). Banerjee also discloses a trench (trench (510); FIG. 5; [0045]) in AlGaN layer (408) that includes an insulation layer (insulation layer (612); FIG. 6; [0047]) that completely overlays two inner sidewalls of trench (510) (annotated FIG. 6, below). Banerjee additionally discloses that it is well-known that insulation layer (612) may be predicably formed to include aluminum nitride (Al2O3) ([0047] and [0033]).
PNG
media_image6.png
501
661
media_image6.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, and Banerjee before him/her that the two insulation sidewalls of Chen in view of Hardiman can be predicably formed to include aluminum oxide (Al2O3), as taught by Banerjee, without a change in function in the two insulation sidewalls of Chen in view of Hardiman. See, MPEP 2143(A)—Combining Prior Art Elements According to Known Methods to Yield Predicable Results.
But Chen in view of Hardiman and Banerjee does not appear to explicitly disclose, wherein the two insulation sidewalls are formed via a self-alignment process step which, in paragraph [0042] of Applicant’s specification, is described as including “an anisotropic etching process step”.
However, in analogous art, Huang discloses that it is well-known that a semiconductor device having a trench (trench (91); FIG. 12B; [0040]) may be manufactured to include insulation sidewalls (insulation sidewalls (95); FIG. 12B; [0043]) that are predicably formed to be in contact with and completely overlay two inner sidewalls (annotated FIG. 12B, below) of trench (91) by utilizing an anisotropic etching process that removes lateral portions (lateral portions (93); FIG. 11B; [0042]) of an insulation sidewalls (95) ([0043]).
PNG
media_image7.png
495
311
media_image7.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, Banerjee, and Huang before him/her that it is well-known that the insulation sidewalls of Chen in view of Hardiman and Banerjee can be predicably formed via a self-alignment process step, as taught by Huang, without a change in function of the insulation sidewalls of Chen in view of Hardiman and Banerjee. See, MPEP 2143(A), above.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman and further in view of Huang.
Regarding claim 9, Chen discloses, A manufacturing method of an enhancement HEMT (FIG. 1a; page 104005-1), comprising steps of:
providing a substrate (FIG. 1(a); page 104005-1);
forming a first gallium nitride (GaN) layer (annotated FIG. 1(a), above; page 104005-1) on the substrate (annotated FIG. 1(a), above);
forming a first aluminum gallium nitride (AlGaN) layer (annotated FIG. 1(a), above; page 104005-1) on the first GaN layer (annotated FIG. 1(a), above), wherein the first AlGaN layer is in contact with the first GaN layer (annotated FIG. 1(a), above);
forming a trench (annotated FIG. 1(a), above) in the first AlGaN layer (annotated FIG. 1(a), above), wherein the trench (annotated FIG. 1(a), above) does not penetrate through the AlGaN layer (annotated FIG. 1(a), above);
forming a P-type GaN layer (annotated FIG. 1(a), above; page 104005-1) on the first AlGaN layer (annotated FIG. 1(a), above), wherein the P-type GaN layer is in contact with the first AlGaN layer (annotated FIG. 1(a), above), wherein a part of the P-type GaN layer fills into the trench (annotated FIG. 1(a), above);
forming a gate (annotated FIG. 1(a), above; page 104005-1) on the P-type GaN layer (annotated FIG. 1(a), above), wherein the gate is in contact with the P-type GaN layer (annotated FIG. 1(a), above), wherein the gate is configured to receive a gate voltage, so as to turn ON or turn OFF the enhancement HEMT (pages 104005-1 and 104005-2); and
forming a source and a drain (source (S) and drain (D); annotated FIG. 1(a), above) outside two sides of the gate (annotated FIG. 1(a), above), respectively, wherein the source (S) and the drain (D) penetrate through the first AlGaN layer (annotated FIG. 1(a), above), so that the source (S) and the drain (D) are in contact with the first GaN layer (annotated FIG. 1(a), above).
But Chen does not appear to explicitly disclose, forming an insulation sidewall via a self-alignment process step, wherein the insulation sidewall is in contact with and completely overlay two inner sidewalls of the trench.
However, in analogous art, Hardiman discloses, that in a high electron mobility transistor (HEMT) (HEMT (100); FIG. 1A; [0066]) two insulation sidewalls (insulation sidewalls (160S; FIG. 5D; [0103]) can be predicably formed to be in contact with and completely overlaying two inner sidewalls of a trench (150op; annotated FIG. 5A, above; [0101]), respectively. Hardiman also discloses that insulation sidewalls (160S) define the desired length LG (FIG. 5D) of a second trench (second trench (126R); annotated FIG. 5D, below; [0103])) in aluminum gallium nitride (AlGaN) layer ((AlGaN layer (126); FIG. 1A; [0071])) ([0103]). Hardiman additionally discloses that second trench (126R) does not penetrate through AlGaN layer (126) (annotated FIG. 5D, below).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen and Hardiman before him/her that the trench of Chen can include, forming an insulation sidewall, wherein the insulation sidewall is in contact with and completely overlay two inner sidewalls of the trench, as taught by Hardiman, to define the desired length LG of the trench of Chen (annotated FIG. 1(a), above), as additionally taught by Hardiman. See also, MPEP 2144(IV), above.
But Chen in view of Hardiman does not appear to explicitly disclose that the insulation sidewall is formed via a self-alignment process step which, in paragraph [0042] of Applicant’s specification, is described as including “an anisotropic etching process step”.
However, in analogous art, Huang discloses that it is well-known that a semiconductor device having a trench (trench (91); FIG. 12B; [0040]) may be manufactured to include insulation sidewalls (insulation sidewalls (95); FIG. 12B; [0043]) that are predicably formed to be in contact with and completely overlay two inner sidewalls (annotated FIG. 12B, above) of trench (91) by utilizing an anisotropic etching process that removes lateral portions (lateral portions (93); FIG. 11B; [0042]) of an insulation sidewalls (95) ([0043]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, and Huang before him/her that it is well-known that the insulation sidewall of Chen in view of Hardiman can be predicably formed via a self-alignment process step, as taught by Huang, without a change in function of the insulation sidewall of Chen in view of Hardiman. See, MPEP 2143(A), above.
Claims 10, 11, 15, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman and Huang, as applied to claim 9, above, and further in view of Lin.
Regarding claim 10, Chen in view Hardiman and Huang discloses, The manufacturing method of the enhancement HEMT of claim 9, further comprising following step:
forming a dielectric layer (dielectric layer (SiNx); annotated FIG. 1(a), above) on the first AlGaN layer (annotated FIG. 1(a), above), wherein the dielectric layer (SiNx) is in contact with the first AlGaN layer (annotated FIG. 1(a), above), wherein the dielectric layer (SiNx) lies between the P-type GaN layer (SiNx) and the drain (D) in a channel direction (annotated FIG. 1(a), above).
But Chen in view of Hardiman and Huang does not appear to explicitly disclose,
forming an adjustment drain on the dielectric layer, wherein the adjustment drain is in contact with the dielectric layer;
wherein the dielectric layer and the adjustment drain entirely overlap each other, to form a stacked structure, and wherein a length of the stacked structure along the channel direction and a gap width between the stacked structure and the gate are determined according to a required operation reliability of the enhancement HEMT.
However, in analogous art, Lin discloses, a HEMT semiconductor device (HEMT semiconductor device (100); FIG. 1; [0030]-[0031]) having a dielectric layer (dielectric layer (dielectric layer (120); FIG. 1; [0042]) formed on and in contact with a first aluminum gallium nitride (AlGaN) layer (first AlGaN layer (116); FIG. 1; [0039]), a second aluminum gallium nitride (AlGaN) layer (second AlGaN layer (114); FIG. 1; [0038]) below and in contact with first AlGaN layer (116), and a second gallium nitride (GaN) layer (second GaN layer (112); FIG. 1; [0037]) below and in contact with second AlGaN layer (114). Lin also discloses an adjustment drain (adjustment drain (170); FIG. 1; [0042]) which is formed on and in contact with dielectric layer (120) and with the drain (drain (140); FIG. 1; [0056]-[0057]). Lin additionally discloses that dielectric layer (120) and adjustment drain (170) entirely overlap each other, to form a stack structure (FIG. 1). Lin further discloses that a length of the stacked structure along the channel direction (annotated FIG 1, above) and a gap width (gap width (180); FIG. 3; [0079) between the stacked structure and the gate (gate (150); FIG. 1; [0045]) are determined according to a required operation reliability of the enhancement HEMT (100) ([0079]). Lin also further discloses that adjustment drain (170) “may modify the electric field distribution, and thus reduce the risk of the gate structure suffering from high electric fields. In addition, when the switch is off, the conductive path may be formed by the electric field modulation structure to guide the carriers (such as electrical charges) outside the device, thereby improving the performance of the semiconductor device. In addition, the semiconductor device provided by the present disclosure is particularly suitable for high electron mobility transistors (HEMT)” ([0030]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, Huang, and Lin before him/her that the HEMT of Chen in view of Hardiman and Huang be formed to include an adjustment drain, on the dielectric layer (SiNx) of Chen in view of Hardiman and Huang, as taught by Lin, wherein the adjustment drain is in contact with the dielectric layer (SiNx) of Chen in view of Hardiman and Huang, as also taught by Lin, wherein the dielectric layer (SiNx) and the adjustment drain entirely overlap each other, to form a stacked structure, as additionally taught by Lin, and wherein a length of the stacked structure along the channel direction (annotated FIG. 1, above of Chen), and a gap width between the stacked structure and the gate are determined according to a required operation reliability of the enhancement HEMT of Chen in view of Hardiman and Huang, as additionally taught by Lin, to: (i) modify the electric field distribution and thus reduce the risk of the gate structure suffering from high electric fields and/or (ii) form a conductive path when the switch is off that guides carriers outside the device, thereby improving performance of the device, as further taught by Lin.
Regarding claim 11, Chen in view of Hardiman and Huang, and further in view of Lin discloses, The manufacturing method of the enhancement HEMT of claim 9, further comprising:
forming a second AlGaN layer (114) below the first AlGaN layer (116), wherein the second AlGaN layer (114) is in contact with the first AlGaN layer (116)
forming a second GaN layer (112) below the second AlGaN layer (114), wherein the second GaN layer (112) is in contact with the second AlGaN layer (114).
Regarding claim 15, Chen in view of Hardiman and Huang, and further in view of Lin discloses, The manufacturing method of the enhancement HEMT of claim 10, wherein the dielectric layer includes P-type GaN5 ([0043] of Lin—dielectric layer (120) may include “other suitable dielectric materials” and GaN is a dielectric material6), and wherein the dielectric layer and P-type GaN layer are formed via a same process step because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that it is faster and more efficient to manufacture the dielectric layer and GaN layer of Chen in view of Hardiman and Huang, and further in view of Lin in the same process step, rather than in separate process steps. See, MPEP 2143(G).
Regarding claim 16, Chen in view of Hardiman and Huang, and further in view of Lin discloses, The manufacturing method of the enhancement HEMT of claim 10, wherein the adjustment drain (170 of Lin) and the drain (140 of Lin) are electrically connected to each other ([0056]-[0057] of Lin).
Claims 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman and Huang, and further in view of Lin, as applied to claim 11, above.
Regarding claim 12, Chen in view of Hardiman and Huang, and further in view of Lin discloses, The enhancement HEMT of claim 11, wherein the source (S) and drain (D) do not penetrate through the second AlGaN layer but stay in the first AlGaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for the source (S) and (D) of Chen in view of Hardiman and Huang, and further in view of Lin regarding the second AlGaN layer, namely, either: (i) the source (S) and drain (D) penetrate through the second AlGaN layer but stay in the first AlGaN layer or (ii) the source (S) and drain (D) do not penetrate through the second AlGaN layer but stay in the first AlGaN layer, and, absent unexpected results, it would have been obvious to try each of these two possibilities, one of which is recited by claim 12. See MPEP 2143(E), above.
Also regarding claim 12, Chen in view of Hardiman and Huang, and further in view of Lin discloses, wherein a thickness of the second AlGaN layer is controlled so as to avoid generating a two-dimensional electron gas (2DEG) between the second AlGaN layer and the second GaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for the controlling a thickness of the second AlGaN layer, namely, either: (i) the thickness is controlled so as to avoid generating a two-dimensional electron gas (2DEG) or (ii) the thickness is controlled to generate a two-dimension electron gas (2DEG), and absent unexpected results, it would have been obvious to try each of these two possibilities, one of which is recited by claim 12. See MPEP 2143(E), above.
Regarding claim 13, Chen in view of Hardiman and Huang, and further in view of Lin discloses, The enhancement HEMT of claim 11, wherein the source (S) and drain (D) further penetrate through the second AlGaN layer, so that the source (S) and drain (D) are in contact with the second AlGaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for the source (S) and (D) of Chen in view of Hardiman and Huang, and further in view of Lin regarding the second AlGaN layer, namely, either: (i) the source (S) and drain (D) penetrate through the second AlGaN layer or (ii) the source (S) and drain (D) do not penetrate through the second AlGaN layer, and, absent unexpected results, it would have been obvious to try each of these two possibilities, one of which is recited by claim 13. See MPEP 2143(E), above.
Also regarding claim 13, Chen in view of Hardiman and Huang, and further in view of Lin discloses, whereby a 2DEG is generated between the second AlGaN layer and the second GaN layer by controlling a thickness of the second AlGaN layer because one of ordinary skill in the art would have recognized before the effective filing date of the claimed invention that there are a finite number of predicable solutions for generating a 2DEG between the second AlGaN layer and the second GaN layer, namely: (i) the thickness of the second AlGaN layer is controlled, (ii) the thickness of the second GaN layer is controlled, or (iii) the thickness of both the AlGaN layer and the GaN layers are controlled, and absent unexpected results, it would have been obvious to try each of these three possibilities to control generation of a 2DEG, one of which is recited by claim 13. See MPEP 2143(E), above.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hardiman and Huang, as applied to claim 9, above, and further in view of Banerjee.
Regarding claim 14, Chen in view of Hardiman and Huang discloses, forming the two insulation sidewalls via a self-alignment process step7.
But Chen in view of Hardiman and Huang does not appear to explicitly disclose, wherein the insulation sidewall includes aluminum oxide (Al2O3).
However, in analogous art, Banerjee discloses a HEMT (HEMT (100); FIG. 1; [0027]) that includes a substrate (substrate (102); FIG. 1; [0027]), a gallium nitride (GaN) layer (GaN layer (106); FIG. 1; [0027]; [0029]), and a layer (layer (408); FIG. 5; [0043]) that can be aluminum gallium nitride (AlGaN) when y = 0 ([0043]). Banerjee also discloses a trench (trench (510); FIG. 5; [0045]) in AlGaN layer (408) that includes an insulation layer (insulation layer (612); FIG. 6; [0047]) that completely overlays two inner sidewalls of trench (510) (annotated FIG. 6, below). Banerjee additionally discloses that it is well-known that insulation layer (612) may be predicably formed to include aluminum nitride (Al2O3) ([0047] and [0033]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen, Hardiman, Huang, and Banerjee before him/her that the two insulation sidewalls of Chen in view of Hardiman and Huang can be predicably formed to include aluminum oxide (Al2O3), as taught by Banerjee, without a change in function in the insulation sidewall of Chen in view of Hardiman and Huang. See, MPEP 2143(A), above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2023/0083904 A1 (Yeh)—Discloses a high electron mobility transistor (HEMT) (100) having a substrate (10), a III-V layer (12), and a III-V layer (20). Yeh also discloses a trench (24) in layer (20) where trench (24) does not fully penetrate III-V layer (20) (e.g., “X” in FIG. 8) and a P-type gallium nitride (GaN) layer (28) in contact with layer (20) wherein a part of P-type GaN layer (28) fills trench (24).
US 10,896,981 (Tao)—Discloses a trench (120) that includes two insulation sidewalls (122) (FIG. 1).
US 2020/0027872 A1 (Boles)—Discloses that gallium nitride (GaN) is a dielectric material ([0251]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Erik A. Anderson whose telephone number is (703) 756-1217. The Examiner can normally be reached Monday-Friday 8:30 a.m.-4:30 p.m. (Pacific Time Zone).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the Examiner’s supervisor, William B. Partridge, can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at (866) 217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call (800) 786-9199 (IN USA OR CANADA) or (571) 272-1000.
/ERIK A. ANDERSON/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
1 The recitation of “and is configured to receive a gate voltage, so as to turn ON or turn OFF the enhancement HEMT” is a manner of operating the device of claim 1, rather than a structural limitation, that does not differentiate the recited structure of claim 1 from Chen. See, MPEP 2114(II)—Manner of Operating The Device Does Not Differentiate Apparatus Claim From The Prior Art. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original).
2 The recitation of “wherein a length of the stacked structure along the channel direction and a gap width between the stacked structure and the gate are determined according to a required operation reliability of the enhancement HEMT” is a manner of operating the device of claim 2, rather than a structural limitation, that does not differentiate the recited structure of claim 2 from Chen in view of Hardiman. See, MPEP 2114(II), above.
3 See, e.g., US 2020/0027872 A1 (Boles), below.
4 Please see the rejection of claim 7 under 35 U.S.C. 112(b), above, for how claim 7 is being interpreted for purpose of examination.
5 Please see the rejection of claim 15 under 35 U.S.C. 112(b), above, for how claim 15 is being interpreted for purpose of examination.
6 See, e.g., US 2020/0027872 A1 (Boles), below.
7 Please see the rejection of claim 14 under 35 U.S.C. 112(b), above, for how claim 14 is being interpreted for purpose of examination.