Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schultz et al. (US 10250197 B1), hereafter referred to as “Schultz”.
Regarding claims 1 and 19, in the embodiments of Figs. 1-6, discloses:
A semiconductor device (Figs. 4, 5, 6, column 22, lines 38-42, packaged RF amplifier device 600 includes a high-power semiconductor device package) comprising:
a first member (Fig. 5, substrate 406) having a first surface (surface between conductive layers 528,596);
a second member (Fig. 5, silicon substrate 580) having a second surface (surface between 580 and conductive layer 596) opposite to the first surface and including a radio-frequency amplifier circuit (Fig. 6, IC die 680 (e.g., GaN final stage IC die 180, 280, 380, 480) per column 22 lines 59-60, dies 410 and/or 480 are configured to receive and convey RF signals per column 19, lines 33-39,); and
an electrically conductive bonding member between the first surface and the second surface (conductive layer 596) and bonding the first member and the second member to each other, wherein
the radio-frequency amplifier circuit includes
at least one power stage transistor (Fig. 6, IC die 680 comprises of GaN power transistor 682),
an input wire (wirebonds 678) that is connected to the power stage transistor and that is configured to supply an input signal (via an input terminal 690 (e.g., input terminal 190, 290, 390, 490)) to the power stage transistor (RF signal provide by RF signal input lead 602 of silicon driver stage IC die 610 per column 24 lines 1-31), and
an input-side circuit element (Fig. 6, silicon driver stage IC die 610 (e.g., silicon driver stage IC die 110, 210, 310, 410)) connected to the input wire (678) and including at least one of a passive element (Fig. 6, input impedance matching circuit 630 (e.g., circuit 130, 230, 330, 430), column 5, lines 11-17, impedance matching circuits 130, 150 is associated with a plurality of passive components), an active element (Fig. 6, a silicon power transistor 640 (e.g., transistor 140, 240, 340-344, 440), column 5, lines 11-17 die 110 includes active devices (i.e. silicon transistor 140)), and an external connection terminal (Fig. 6, RF signal input lead 602 (e.g., input 102, 202, 302)),
the bonding member includes a first conductor pattern (Fig. 5, build-up layers 582, column 21, lines 64-67, build-up layers 512 may include, for example, a plurality of interleaved dielectric layers and patterned conductive layers) covering the power stage transistor in plan view (Fig. 5, 582 covers power transistor 482), and
the input-side circuit element (610 (e.g., silicon driver stage IC die 110, 210, 310, 410)) is outside the first conductor pattern in plan view (shown to be outside of a GaN power transistor 682 (e.g., transistor 182, 282, 382, 482) including build-up layers 582 in Fig. 5).
Allowable Subject Matter
Claims 14-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 14-17:
the cited prior art of record, Schultz et al. (US 10250197 B1), either singly or in proper combination, does not teach or make obvious, along with the other claimed features,
“an inter-member connection wire on a surface of the second member on an opposite side to the second surface and on the first surface, the inter-member connection wire extending from an inside of the second member, intersecting with an edge of the second surface, and reaching the first surface outside the second member in plan view, and the inter-member connection wire is connected to the input-side circuit element and outside the first conductor pattern in plan view” per claim 14,
“a terminal conductive protrusion that protrudes from a surface of the second member on an opposite side to the second surface as an external connection terminal, and the terminal conductive protrusion is at a location that does not overlap the bonding member in plan view” per claim 16, and
“a first member conductive protrusion that protrudes from the first surface of the first member outside the second member” per claim 17.
Claim 15 is objected to as being dependent on objected claim 14.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Baltzell can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Malane Lieng/ Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843
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