Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. It would be of great assistance to the office if all incoming papers pertaining to a filed application carried the following items:
i. Application number (checked for accuracy, including series code and serial no.).
ii. Group art unit number (copied from most recent Office communication).
iii. Filing date.
iv. Name of the examiner who prepared the most recent Office action.
v. Title of invention.
vi. Confirmation number (See MPEP § 503).
3. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/13/2026 has been entered.
Response to Arguments
4. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection.
5. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages, paragraph and figures may apply. Applicant, in preparing the response, should consider fully the entire reference as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
6. Claim interpretation: When multiple limitations are connected with “OR”, one of the limitations doesn’t have any patentable weight since both of the limitations are optional.
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-8, 10-11, 14-18, 20-27, 29-39 are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola et al (Pub No. 2019/0158046) and further in view of Kobayshi et al (Pub No. 2019/0238098).
Regarding claim 1, Lehtola et al discloses a load modulation amplifier (Fig. 1 & 4) comprising: a first power amplifier (PA) configured to amplify a first portion of a radio frequency (RF) signal below a threshold level (Para. 68-70: Carrier amplification stage class AB bias amplifier amplify signal which can be lower level signals); and a second PA comprising an N stack of transistor devices configured in a cascode configuration to amplify a second portion of an RF signal that is above the threshold level (Para. 66: Cascode configuration amplifier & Fig. 1 & 4 & Para. 67-70: Amplify portion of the RF signal that is above a threshold level-class C bias inherent threshold which is higher threshold than AB bias), wherein N is a counting number that is greater than one (Fig. 1& 4: 2 stack bipolar transistor within cascode amplifier-32).
Lehtola et al does not explicitly discloses amplify a radio frequency (RF) signal below a power threshold level or above the power threshold level and an output quadrature coupler configured to combine the first amplified portion and the second amplified portion of the RF signal, wherein an isolation port of the output quadrature coupler is terminated with an impedance that is substantially different from 50 ohms.
In a similar field of endeavor, Kobayshi et al disclose amplification system where the amplifier to amplify a first portion of a radio frequency (RF) signal below a threshold level and amplify a second portion of an RF signal that is above the threshold level (Para. 4: The load modulation amplifier amplifying a radio frequency signal below a predetermined power threshold value and a peak amplifier amplify the radio frequency signal when input power above the predetermined power threshold value) and an output quadrature coupler configured to combine the first amplified portion and the second amplified portion of the RF signal (Fig. 1: quadrature coupler-14 & abstract: quadrature coupler combine power from both the carrier amplifier and the peak amplifier) & (Para. 30), wherein an isolation port of the output quadrature coupler is terminated with an impedance that is substantially different from 50 ohms (Fig. 1: Isolation port-30 of the output quadrature coupler-14 is terminated with an impedance-Z greater than 50 ohms) & (Para. 30-31: Isolation network 30 is substantially greater than 50Ω, the fixed impedance of the isolation termination network 30 is 1000Ω).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the RF amplification system of Kobayshi’s disclosure with the amplification control system, as taught by Lehtola. Doing so would have resulted in effectively controlling the power in wireless system to generate the desire amplified signals to adjust optimum power for better quality signal.
Regarding claim 2 & 26, Lehtola et al is silent regarding first PA comprises transistor devices that are not stacked. Examiner taking official notice that in RF system transistor can be not stacked. (Vagher et al-Pat 7570111 disclose system using multiple transistors that are not stacked).
Therefore, it would have been obvious to one of the ordinary skilled in the art to use transistors that are not stacked to simplify the RF design.
Regarding claim 3 & 27, Lehtola et al is silent regarding first PA comprises transistor devices that are not stacked. Examiner taking official notice that in RF system transistor can be not stacked and are in common emitter configurations. (Vagher et al disclose system using multiple transistors that are not stacked).
Therefore, it would have been obvious to one of the ordinary skilled in the art to use transistors that are not stacked to simplify the RF design.
Regarding claim 5 & 29 & 36, Lehtola et al discloses the output quadrature coupler is terminated by a reflective short (Par. 15: Envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage & Para. 113).
Regarding claim 6 & 30 & 37, Lehtola et al is silent regarding the output quadrature coupler is terminated by a low complex impedance that is less than 50 ohms.
Kobayshi discloses the output quadrature coupler is terminated by a low complex impedance that is less than 50 ohms (Para. 43 & Fig. 2: Impedance range less than 50 ohms).
At the time of filling, it would have been obvious to use impedance control system to adjust proper impedance in the RF circuitry.
Regarding claim 8 & 32 & 39, Lehtola et al is silent regarding the output quadrature coupler is terminated by a high complex impedance that is greater than 50 ohms.
Kobayshi discloses the output quadrature coupler is terminated by a high complex impedance that is greater than 50 ohms (Para. 31 & Fig. 1: high complex impedance that is greater than 50 ohms).
At the time of filling, it would have been obvious to use impedance control system to adjust proper impedance in the RF circuitry.
Regarding claim 33, Lehtola et al is silent regarding the output quadrature coupler is terminated by substantially 50 ohms.
Kobayshi discloses the output quadrature coupler is terminated by substantially 50 ohms (Fig. 1-2).
At the time of filling, it would have been obvious to use impedance control system to adjust proper impedance in the RF circuitry.
Regarding claim 7 & 31 & 38, Lehtola et al discloses the output quadrature coupler is terminated by a reflective open (Fig. 27 & 28 & Par. 15: Envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage & Para. 113).
Regarding claim 10 & 34, Lehtola et al discloses ones of the N stack of transistor devices are cascode transistor devices coupled in common base configurations by way of base capacitances coupled to a fixed voltage node (Fig. 4 & Para. 9 & 98-99: Constant bias voltage).
Regarding claim 11, Lehtola et al discloses the fixed voltage node is ground (Fig. 4 & 27 & Para. 9 & 98-99: Constant bias voltage).
Regarding claim 14, Lehtola et al discloses the base capacitances have non-uniform capacitance values configured to maximize output power of the load modulation amplifier (Para. 99: Adjustable capacitance value & Para. 11 & 23 & 67 & 80: load modulation amplifier for max output power).
Regarding claim 15, Lehtola et al discloses the base capacitances have non-uniform capacitance values configured to maximize power-added efficiency of the load modulation amplifier (Para. 99: Adjustable capacitance value & Para. 11 & 23 & 67 & 80: load modulation amplifier for max output power).
Regarding claim 16, Lehtola et al discloses the base capacitances have non-uniform capacitance values configured to maximize linear gain of the load modulation amplifier (Para. 99: Adjustable capacitance value & Para. 33 & 115-116: linearity for the Doherty power amplifier).
Regarding claim 17, Lehtola et al discloses the first PA and the second PA are coupled in parallel (Fig. 4 & 25).
Regarding claim 18, Lehtola et al discloses the first PA is a carrier amplifier and the second PA is a peaker amplifier configured to operate as a Doherty amplifier (Para. 106: Doherty amplifier).
Regarding claim 20, Lehtola et al discloses a third PA coupled in parallel with the first PA and the second PA in a 3-way quadrature coupler configuration (Fig. 26).
Regarding claim 21, Lehtola et al discloses the third PA comprises an M stack of transistor devices configured in a cascode configuration to amplify a portion of the RF signal that is above the threshold level, wherein M is a counting number that is greater than one (Fig. 28-29 & Para. 67-70: Amplify portion of the RF signal that is above a threshold level-class C bias inherent threshold which is higher threshold than AB bias & stack bipolar transistor within cascode amplifier).
Regarding claim 22, Lehtola et al discloses the third PA is configured as a second peaker amplifier (Fig. 28-29).
Regarding claim 23, Lehtola et al the N stack of transistor devices is realized by a dual-gate field-effect transistor device (Para. 8).
Regarding claim 24, Lehtola et al the N stack of transistor devices is realized by a field-effect transistor device having a first field plate and a second field plate, wherein the second field plate is between a gate and a drain (Para. 8-10 & Fig. 28-29).
Regarding claim 25, Lehtola et al discloses a wireless communication device comprising: a baseband processor (Fig. 31: Baseband system-1405); transmit circuitry configured to receive encoded data from the baseband processor and to modulate a carrier signal with the encoded data (Para. 120-121: TX circuitry receive encoded data from the baseband processor and modulate a carrier signal & Para. 80: Load modulation of the carrier signals), wherein the transmit circuitry comprises: a first power amplifier (PA) configured to amplify a first portion of a radio frequency (RF) signal below a threshold level (Para. 68-70: Carrier amplification stage class AB bias amplifier amplify signal which can be lower level signals); and a second PA comprising an N stack of transistor devices configured in a cascode configuration to amplify a second portion of the RF signal that is above the threshold level (Para. 66: Cascode configuration amplifier & Fig. 1 & 4 & Para. 67-70: Amplify portion of the RF signal that is above a threshold level-class C bias inherent threshold which is higher threshold than AB bias), wherein N is a counting number that is greater than one (Fig. 1& 4: 2 stack bipolar transistor within cascode amplifier-32).
Lehtola et al does not explicitly discloses amplify a radio frequency (RF) signal below a threshold level or above the threshold level and an output quadrature coupler configured to combine the first amplified portion and the second amplified portion of the RF signal, wherein an isolation port of the output quadrature coupler is terminated with an impedance that is substantially different from 50 ohms.
In a similar field of endeavor, Kobayshi et al disclose amplification system where the amplifier to amplify a first portion of a radio frequency (RF) signal below a threshold level and amplify a second portion of an RF signal that is above the threshold level (Para. 4: The load modulation amplifier amplifying a radio frequency signal below a predetermined power threshold value and a peak amplifier amplify the radio frequency signal when power above the predetermined power threshold value) and an output quadrature coupler configured to combine the first amplified portion and the second amplified portion of the RF signal (Fig. 1: quadrature coupler-14 & abstract: quadrature coupler combine power from both the carrier amplifier and the peak amplifier) & (Para. 30), wherein an isolation port of the output quadrature coupler is terminated with an impedance that is substantially different from 50 ohms (Fig. 1: Isolation port-30 of the output quadrature coupler-14 is terminated with an impedance-Z greater than 50 ohms) & (Para. 30-31: Isolation network 30 is substantially greater than 50Ω, the fixed impedance of the isolation termination network 30 is 1000Ω).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the RF amplification system of Kobayshi’s disclosure with the amplification control system, as taught by Lehtola. Doing so would have resulted in effectively controlling the power in wireless system to generate the desire amplified signals to adjust optimum power for better quality signal.
Regarding claim 35, Claim 35 corresponds to claim 1 & 25 and is analyzed accordingly.
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola et al (Pub No. 2019/0158046), in view of Kobayshi et al (Pub No. 2019/0238098) and further in view of Pehlke David (Pub No. WO 02/054589).
Regarding claim 12, Lehtola et al discloses the base capacitances have non-uniform capacitance values configured of the load modulation amplifier (Para. 99: Adjustable capacitance value & Para. 11 & 23).
Lehtola et al is silent regarding maximize gain.
Pehlke discloses capacitance values configured to maximize gain of the load modulation amplifier (Page. 6: Dual gate FET implementation with a load modulation amplifier as a Doherty amplifier).
At the time of filling, it would have been obvious to use load modulation amplifier to control gain for better output of the system.
Regarding claim 13, Lehtola et al the base capacitances have non-uniform capacitance values configured to a mean time between failure rate of the load modulation amplifier (Para. 99: Adjustable capacitance value & Para. 11 & 23).
Lehtola et al is silent regarding maximize a mean time.
Pehlke discloses non-uniform capacitance values configured to maximize a mean time between failure rate of the load modulation amplifier (Page. 6: Dual gate FET implementation with a load modulation amplifier as a Doherty amplifier).
At the time of filling, it would have been obvious to use load modulation amplifier to control gain for better output of the system.
Claim 19 is/ are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola et al (Pub No. 2019/0158046), in view of Kobayshi et al (Pub No. 2019/0238098) and further in view of Burns et al (Pub No. 2006/0006945).
Regarding claim 19, Lehtola et al is silent regarding the first PA and the second PA are both configured as differential amplifiers.
Burns discloses the first PA and the second PA are both configured as differential amplifiers (Para. 47 & 28: differential amplifiers).
At the time of filing, it would have been obvious to use differential amplifier to control RF signals in the amplification stage for better quality signals.
Prior art do not rely upon/ Other Prior Art
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hitomi et al (US Pub 2020/0412307) discloses power amplifying circuit configured to amplify a first radio-frequency signal having a first channel bandwidth and a second radio-frequency signal having a second channel bandwidth greater than the first channel bandwidth. The power amplifying circuit is configured to amplify the first radio-frequency signal in an amplifying mode according to an average power tracking method.
Another prior art Banowetz et al (US Pub 2017/0187334) discloses a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals.
Conclusion
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/MD K TALUKDER/Primary Examiner, Art Unit 2648
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