Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
Claims 1-2, 8-13, 16-17, and 23-27 are rejected under 35 U.S.C. 103 as being unpatentable over Jung (PGPub No. 2022/0189916 A1) in further view of Berry (PGPub No. 2019/0348395 A1).
Regarding claim 1, Jung teaches an apparatus comprising: an interposer including a first metal layer, a second metal layer, and a plurality of vias configured to thermally and electrically couple the first metal layer and the second metal layer (Fig. 3B, [0021], and [0048] point to an interposer structure IPS comprising metal layers M3 (first metal layer) and M2 (second metal layer), which are connected by first and second vias VI1 and VI2.).
Jung fails to teach a plurality of solder resist posts disposed on a bottom surface portion of the second metal layer; a package substrate; a die electrically coupled to the package substrate on a first side of the die; and a thermal interface material (TIM) disposed on the die on a second side of the die opposite the first side, wherein the TIM is configured to thermally coupled the die and the bottom surface portion of the second metal layer of the interposer disposed above the second side of the die.
Berry teaches a plurality of solder resist posts disposed on a bottom surface portion of the second metal layer (Fig. 2 and [0023] point to a thin bonded interposer package comprising standoffs 123 (solder resist posts), which may comprise solder resist and may be formed on the bottom surface of the interposer 101 (bottom surface portion of the second metal layer).); a package substrate (Fig. 4A points to an alternative embodiment of a thin bonded interposer package comprising a bottom substrate 405 (package substrate).); a die electrically coupled to the package substrate on a first side of the die (Id. points to a die 403.); and a thermal interface material (TIM) disposed on a second side of the die opposite the first side, wherein the TIM is configured to thermally coupled the die and the bottom surface portion of the second metal layer of the interposer disposed above the second side of the die (Id. points to a bond line 407 (TIM) and an interposer 401.). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the die and interposer are thermally coupled via a bond line/TIM in order to provide sufficient heat dissipation, with the standoffs/solder resist posts ensuring a well-defined thickness.
Regarding claim 2, Berry teaches wherein the TIM is at least one of a thermal paste or thermal film (Fig. 2 and [0025] point to a bond line 105 used in combination with an embedded thermal element 125, which may comprise thermally conductive epoxy (thermal paste), to bond the interposer 101 and the die 115.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that bond line/TIM comprises a thermal paste which would allow for proper application, and by extension, provide sufficient heat dissipation.
Regarding claim 8, Berry teaches a plurality of interposer connectors configured to electrically couple the interposer to the package substrate (Fig. 1 and [0019] point to metal contacts 107A and 107B (a plurality of interposer connectors), which provide electrical connectivity between the interposer 101 and the substrate 109.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that interposer connectors are formed between the interposer and package substrate to reduce parasitic resistance and allow for efficient power distribution.
Regarding claim 9, Berry teaches wherein the plurality of interposer connectors is at least one of copper pillars, copper balls, solder, solder balls, or combinations thereof (Fig. 1 and [0019] point to metal contacts 107A and 107B (a plurality of interposer connectors), which may comprise conductive balls (e.g., solder balls).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the interposer and package substrate are connected via solder balls to provide a reliable, manufacturable, and electrically conductive interface.
Regarding claim 10, Berry teaches a mold compound disposed between the interposer and the package substrate (Fig. 1 and [0013] point to a mold material 119 (mold compound) between the interposer 101 and substrate 109.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that a mold compound is formed between the interposer and package substrate to provide mechanical support and protection from environmental elements.
Regarding claim 11, Berry teaches wherein the mold compound encapsulates the plurality of interposer connectors, the die, and the TIM (Fig. 2 and [0020] point to a mold material/encapsulant 119 (mold compound) surrounding the metal contacts 107A and 107B (interposer connectors), the die 115, and the bond line 105 (TIM) located directly above the die 115.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the mold compound acts as an encapsulant to provide further mechanical support and protection from environmental elements.
Regarding claim 12, Berry teaches a plurality of package connectors disposed on a bottom surface portion of the package substrate opposite the plurality of interposer connectors (Fig. 5B and [0042] point to metal contacts 413 (a plurality of package connectors) located on the bottom of the substrate 405A/405B, opposite of the metal contacts 409A/409B (interposer connectors), respectively.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that a plurality of package connectors is further formed on the bottom surface of the package substrate to allow for a higher bonding force to be applied to the interposers during bonding and allows for the use of a thermal compression bonding technique.
Regarding claim 13, Berry teaches wherein the plurality of package connectors is a ball grid array (BGA) (Fig. 5B and [0042] point to metal contacts 413 (a plurality of package connectors), which may comprise solder balls for a ball grid array.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the plurality of package connectors comprises a ball grid array in order to make use of its high I/O density and its ability to distribute mechanical stress.
Regarding claim 16, Jung teaches a method of manufacturing an apparatus, comprising: forming an interposer including a first metal layer, a second metal layer, and a plurality of vias configured to thermally and electrically couple the first metal layer and the second metal layer (Fig. 3B, [0021], and [0048] point to an interposer structure IPS comprising metal layers M3 (first metal layer) and M2 (second metal layer), which are connected by first and second vias VI1 and VI2.),
Jung fails to teach a plurality of solder resist posts disposed on a bottom surface portion of the second metal layer; providing a package substrate; providing a die electrically coupled to the package substrate on a first side of the die; and depositing a thermal interface material (TIM) disposed on the die on a second side of the die opposite the first side, wherein the TIM is configured to thermally coupled the die and the bottom surface portion of the second metal layer of the interposer disposed above the second side of the die.
Berry teaches a plurality of solder resist posts disposed on a bottom surface portion of the second metal layer (Fig. 2 and [0023] point to a thin bonded interposer package comprising standoffs 123 (solder resist posts), which may comprise solder resist and may be formed on the bottom surface of the interposer 101 (bottom surface portion of the second metal layer).); providing a package substrate (Fig. 4A points to an alternative embodiment of a thin bonded interposer package comprising a bottom substrate 405 (package substrate).); providing a die electrically coupled to the package substrate on a first side of the die (Id. points to a die 403.); and depositing a thermal interface material (TIM) disposed on the die on a second side of the die opposite the first side, wherein the TIM is configured to thermally coupled the die and the bottom surface portion of the second metal layer of the interposer disposed above the second side of the die (Id. points to a bond line 407 (TIM) and an interposer 401.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the die and interposer are thermally coupled via a bond line/TIM in order to provide sufficient heat dissipation, with the standoffs/solder resist posts ensuring a well-defined thickness.
Regarding claim 17, Berry teaches wherein the TIM is at least one of a thermal paste or thermal film (Fig. 2 and [0025] point to a bond line 105 used in combination with an embedded thermal element 125, which may comprise thermally conductive epoxy (thermal paste), to bond the interposer 101 and the die 115.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that bond line/TIM comprises a thermal paste which would allow for proper application, and by extension, provide sufficient heat dissipation.
Regarding claim 23, Berry teaches a plurality of interposer connectors configured to electrically couple the interposer to the package substrate (Fig. 1 and [0019] point to metal contacts 107A and 107B (a plurality of interposer connectors), which provide electrical connectivity between the interposer 101 and the substrate 109.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that interposer connectors are formed between the interposer and package substrate to reduce parasitic resistance and allow for efficient power distribution.
Regarding claim 24, Regarding claim 9, Berry teaches wherein the plurality of interposer connectors is at least one of copper pillars, copper balls, solder, solder balls, or combinations thereof (Fig. 1 and [0019] point to metal contacts 107A and 107B (a plurality of interposer connectors), which may comprise conductive balls (e.g., solder balls).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the interposer and package substrate are connected via solder balls to provide a reliable, manufacturable, and electrically conductive interface.
Regarding claim 25, Berry teaches a mold compound disposed between the interposer and the package substrate (Fig. 1 and [0013] point to a mold material 119 (mold compound) between the interposer 101 and substrate 109.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that a mold compound is formed between the interposer and package substrate to provide mechanical support and protection from environmental elements.
Regarding claim 26, Berry teaches wherein the mold compound encapsulates the plurality of interposer connectors, the die, and the TIM (Fig. 2 and [0020] point to a mold material/encapsulant 119 (mold compound) surrounding the metal contacts 107A and 107B (interposer connectors), the die 115, and the bond line 105 (TIM) located directly above the die 115.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the mold compound acts as an encapsulant to provide further mechanical support and protection from environmental elements.
Regarding claim 27, Berry teaches a plurality of package connectors disposed on a bottom surface portion of the package substrate opposite the plurality of interposer connectors (Fig. 5B and [0042] point to metal contacts 413 (a plurality of package connectors) located on the bottom of the substrate 405A/405B, opposite of the metal contacts 409A/409B (interposer connectors), respectively.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that a plurality of package connectors is further formed on the bottom surface of the package substrate to allow for a higher bonding force to be applied to the interposers during bonding and allows for the use of a thermal compression bonding technique.
Regarding claim 28, Berry teaches wherein the plurality of package connectors is a ball grid array (BGA) (Fig. 5B and [0042] point to metal contacts 413 (a plurality of package connectors), which may comprise solder balls for a ball grid array.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung and Berry, such that the plurality of package connectors comprises a ball grid array in order to make use of its high I/O density and its ability to distribute mechanical stress.
Claims 3 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in further view of Brun (PGPub No. 2021/0057381 A1).
Regarding claim 3, Brun teaches wherein the TIM is a polymer thermal interface material (PTIM) (Fig. 1 and [0031] point to a TIM 140 which may include one or more highly thermal conductivity materials, such as a polymer TIM (PTIM).) Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Brun, such that the type of TIM used was specified to be PTIM, which would result in similar or higher levels of heat dissipation.
Regarding claim 18, Brun teaches wherein the TIM is a polymer thermal interface material (PTIM) (Fig. 1 and [0031] point to a TIM 140 which may include one or more highly thermal conductivity materials, such as a polymer TIM (PTIM).) Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Brun, such that the type of TIM used was specified to be PTIM, which would result in similar or higher levels of heat dissipation.
Claims 4 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in further view of Ganesan (PGPub No. 2014/0217579 A1).
Regarding claim 4, Ganesan teaches wherein the plurality of solder resist posts is at least one of circular, oval, rectangular, triangular, irregular or combinations thereof ([0027] points to embodiments of solder connections (solder resist posts) with different morphologies, including, but not limited to, circular, elliptical, oval, rectangular, and triangular shaped bumps.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Ganesan, such that the solder resist posts are formed into specific shapes in order to properly balance the requirements that would arise from bonding the interposer and die; for example, a circular shape would allow for even distribution of stress, while a triangular shape would allow for accommodation of any special features.
Regarding claim 19, Ganesan teaches wherein the plurality of solder resist posts is at least one of circular, oval, rectangular, triangular, irregular or combinations thereof ([0027] points to embodiments of solder connections (solder resist posts) with different morphologies, including, but not limited to, circular, elliptical, oval, rectangular, and triangular shaped bumps.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Ganesan, such that the solder resist posts are formed into specific shapes in order to properly balance the requirements that would arise from bonding the interposer and die; for example, a circular shape would allow for even distribution of stress, while a triangular shape would allow for accommodation of any special features.
Claims 5-6 and 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in further view of Pan (PGPub No. 2022/0302003 A1).
Regarding claim 5, Pan teaches wherein the plurality of solder resist posts has a size of approximately 50 micrometers (µm) to 100 µm (Fig. 1 and [0037] point to an array of microbumps 416 which may be provided as an array of copper pillars (solder resist posts) having a height (size) in a range from 30 microns to 100 microns. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Pan, such that the dimensions of the solder resist posts are adjusted such that they allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Regarding claim 6, Pan teaches wherein the plurality of solder resist posts is an array (Fig. 1 and [0037] point to an array of microbumps 416 which may be provided as an array of copper pillars (solder resist posts).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Pan, such that the solder resist posts are formed an overall structure which would allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Regarding claim 20, Pan teaches wherein the plurality of solder resist posts has a size of approximately 50 micrometers (µm) to 100 µm (Fig. 1 and [0037] point to an array of microbumps 416 which may be provided as an array of copper pillars (solder resist posts) having a height (size) in a range from 30 microns to 100 microns. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Pan, such that the dimensions of the solder resist posts are adjusted such that they allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Regarding claim 21, Pan teaches wherein the plurality of solder resist posts is an array (Fig. 1 and [0037] point to an array of microbumps 416 which may be provided as an array of copper pillars (solder resist posts).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Pan, such that the solder resist posts are formed an overall structure which would allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Claims 7 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in further view of Olson (PGPub No. 2023/0005819 A1).
Regarding claim 7, Olson teaches wherein the plurality of solder resist posts has a pitch of approximately 100 micrometers (µm) to 200 µm (Fig. 2F and [0073] point to a surface mount structure (or copper pillar bump) 114 (solder resist posts). [0010] further points to said copper pillar bumps comprising a pitch being in a range of 50µm – 150µm. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Olson, such that the dimensions of the solder resist posts are adjusted such that they allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Regarding claim 22, Olson teaches wherein the plurality of solder resist posts has a pitch of approximately 100 micrometers (µm) to 200 µm (Fig. 2F and [0073] point to a surface mount structure (or copper pillar bump) 114 (solder resist posts). [0010] further points to said copper pillar bumps comprising a pitch being in a range of 50µm – 150µm. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Olson, such that the dimensions of the solder resist posts are adjusted such that they allow for proper application of the TIM, and by extension, proper bonding between the interposer and die.
Claims 14-15 and 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in further view of Kim (PGPub No. 2022/0013444 A1).
Regarding claim 14, Kim teaches wherein the apparatus comprises a package on a package (PoP) device (Figs. 2-8, 9A-9D, 10A-10B, 11A-11C, 12A-12D, 13-18, and [0130] point to the creation of devices and/or integrated devices which may include a die, a package-on-package (PoP) device, and/or an interposer.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Kim, such that a PoP device is further added in order to allow high-performance components to be integrated into a small vertical form factor.
Regarding claim 15, Kim teaches wherein the apparatus comprises at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, an access point, a base station, or a device in an automotive vehicle (Fig. 18 and [0129] point to various electronic devices that may be integrated, including, but not limited to, a group of devices (e.g., electronic devices) that includes mobile devices, hand-held personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set top boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, communications devices, smartphones, tablet computers, computers, wearable devices (e.g., watches, glasses), Internet of things (IoT) devices, servers, routers, electronic devices implemented in automotive vehicles (e.g., autonomous vehicles), or any other device that stores or retrieves data or computer instructions, or any combination thereof.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Kim, such that one or more various electronic devices are integrated in order to embed specific functions and further refine the overall efficiency and structure.
Regarding claim 29, Kim teaches wherein the apparatus comprises a package on a package (PoP) device (Figs. 2-8, 9A-9D, 10A-10B, 11A-11C, 12A-12D, 13-18, and [0130] point to the creation of devices and/or integrated devices which may include a die, a package-on-package (PoP) device, and/or an interposer.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Kim, such that a PoP device is further added in order to allow high-performance components to be integrated into a small vertical form factor.
Regarding claim 30, Kim teaches wherein the apparatus comprises at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, an access point, a base station, or a device in an automotive vehicle (Fig. 18 and [0129] point to various electronic devices that may be integrated, including, but not limited to, a group of devices (e.g., electronic devices) that includes mobile devices, hand-held personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set top boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, communications devices, smartphones, tablet computers, computers, wearable devices (e.g., watches, glasses), Internet of things (IoT) devices, servers, routers, electronic devices implemented in automotive vehicles (e.g., autonomous vehicles), or any other device that stores or retrieves data or computer instructions, or any combination thereof.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Jung et al. and Kim, such that one or more various electronic devices are integrated in order to embed specific functions and further refine the overall efficiency and structure.
Response to Arguments
Applicant’s arguments, see Remarks, filed 09/22/2025, with respect to the rejection(s) of claim(s) 1 and 16 (and by extension any dependent claims) under 35 U.S.C. §103 have been fully considered and are persuasive. In light of the newly amended claims, a new ground(s) of rejection is made in view of Jung in further view of Berry.
Applicant's arguments filed 09/22/2025 with regards to the motivation of combining Jung and Berry have been fully considered but they are not persuasive. Specifically, Applicant argues that one of ordinary skill in the art would not have been motivated to modify the disclosure of Jung and Berry to arrive at the Applicant’s claimed combinations absent impermissible hindsight. Examiner argues that the subject matter of both Jung and Berry are in fact close enough in scope for one of ordinary skill in the art prior to the filing date of the claimed invention to combine said references, primarily shown by the fact that both Jung and Berry share multiple CPC classifications, including but not limited to CPC H01L 24/73 and CPC H01L 2224/32225.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Patrick L Cullen whose telephone number is (703)756-1221. The examiner can normally be reached Monday - Friday, 8:30AM - 5PM EST.
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/PATRICK CULLEN/Assistant Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
