DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 20, 2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
The rejection of Claims 9 – 12 under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, for the limitation “wherein the first comparison relationship further comprises the first display data being identical to the second display data” is withdrawn in light of the amendment to at least Claim 9.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 5 and 8 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (U.S. PG Pub 2016/0140892) in view of Matsuzaki et al. (U.S. PG Pub 2020/0175942).
Regarding Claim 1, Park et al. teach a control method for a data driver (Figure 1, Element 140. Paragraphs 47 - 48) of a display panel (Figure 1, Element 110. Paragraphs 43 - 44), wherein the display panel (Figure 1, Element 110. Paragraphs 43 - 44) comprises a plurality of pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) sequentially arranged along a first direction (Figures 1 and 3, Element not labeled, but is top to bottom of the display.), each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) comprises a plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) sequentially arranged along a second direction (Figures 1 and 3, Element not labeled, but is left to right of the display.) and the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) are divided into m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) based on color arrangement order of the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) the second direction (Figures 1 and 3, Element not labeled, but is left to right of the display.) is different from the first direction (Figures 1 and 3, Element not labeled, but is top to bottom of the display.), and m is an integer greater than 1 (Seen in Figure 1);
the plurality of pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) comprise a first pixel row (Figure 3, Element L1. Paragraph 61) and a second pixel row (Figure 3, Element L2. Paragraph 61), and in time (Seen in Figure 4), the second pixel row (Figure 3, Element L2. Paragraph 61) is driven to display after (Seen in Figure 4) the first pixel row (Figure 3, Element L1. Paragraph 61) is driven to display; and
the control method comprises:
obtaining m data comparison signals respectively (Figure 5, Element S140. Paragraph 80), wherein among the m data comparison signals (Figure 5, Element S140. Paragraph 80), an i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, wherein i is an integer, and 0 < i ≤ m (Figure 5, Element i = m. Paragraph 80. Park et al. discloses that the first data line and the second data line are the same, therefore the data for each driver is the same as well.); and
wherein each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) comprises at least one first sub-pixel (Figure 1, Element 120. Paragraph 44) and at least one second sub-pixel (Figure 1, Element 120. Paragraph 44), a first data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, and a second data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display; and
controlling an operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals Figure 5, Element S140. Paragraph 80),
wherein controlling the operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals, comprises:
obtaining the second display data (Figure 3, Element L2DATA. Paragraph 61) based on the first display data (Figure 3, Element L1DATA. Paragraph 61) which has been cached by the data driver (Figure 1, Element 140. Paragraphs 47 - 48) in response to the i-th data comparison signal representing that first display data (Figure 3, Element L1DATA. Paragraph 61) and the second display data (Figure 3, Element L2DATA. Paragraph 61) have a first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81), wherein the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81)
Park et al. is silent with regards to wherein the first comparison relationship comprises the first display data being reverse to the second display data.
Matsuzaki et al. teach wherein the first comparison relationship comprises the first display data being reverse to the second display data (Figures 9A and 9B. Paragraph 74).
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display panel of Park et al. with the display data of Matsuzaki et al. The motivation to modify the teachings of Park et al. with the teachings of Matsuzaki et al. is to reduce the probability of maximum power consumption, as taught by Matsuzaki et al. (Paragraph 8).
Regarding Claim 2, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above). Park et al. teach wherein the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are (mxn) (Figures 1 and 2, Element not labeled, but each group of m is for one data driving circuit part (Element 200) with each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59) sub-pixels (Figure 1, Element 120. Paragraph 44), and n is an integer greater than 0 (Figure 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59);
an (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61), and an (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61), wherein j is an integer, and 0 ≤ j < n (Figure 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59); and
the i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) to display.
Regarding Claim 3, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 2 (See Above). Park et al. teach wherein the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) and the (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) share a same data line in the display panel (Figure 1, Element 110. Paragraphs 43 - 44), so as to apply a first display electrical signal corresponding to the first display data (Figure 3, Element L1DATA. Paragraph 61) to the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) and to apply a second display electrical signal corresponding to the second display data (Figure 3, Element L2DATA. Paragraph 61) to the (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) respectively through the same data line (Figure 1, Element DL. Paragraph 44).
Regarding Claim 4, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 3 (See Above). Park et al. teach wherein the (mxj+i)-th sub-pixel in the first pixel row and the (mxj+i)-th sub-pixel in the second pixel row are respectively located on both sides of the same data line in the second direction; or
the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) and the (mxj-+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) are both located on at least one side of the same data line (Figure 1, Element DL. Paragraph 44) in the second direction (Figures 1 and 3, Element not labeled, but is left to right of the display.).
Regarding Claim 5, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above). Park et al. teach wherein the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are (2xmxn) (Figures 1 and 2, Element not labeled, but each group of m is for one data driving circuit part (Element 200) with each data driving circuit part (Element 200) having k data lines. The examiner notes that (k/2) is being interpreted as n. Paragraphs 47 and 59) sub-pixels (Figure 1, Element 120. Paragraph 44), and n is an integer greater than 0 (Figures 1 and 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. The examiner notes that (k/2) is being interpreted as n. Paragraphs 47 and 59);
a (2xmxj+2xi-1)-th sub-pixel and a (2xmxj+2xi)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) belong to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61), and a (2xmxj+2xi-1)-th sub-pixel and a (2xmxj+2xi)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) belong to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61), wherein j is an integer, and 0 ≤ j < n (Figures 1 and 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. The examiner notes that (k/2) is being interpreted as n. Paragraphs 47 and 59); and
the i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) to display.
Regarding Claim 8, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above). Park et al. teach wherein the first pixel row (Figure 3, Element L1. Paragraph 61) and the second pixel row (Figure 3, Element L2. Paragraph 61) are two pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) arranged adjacent to each other (Seen in Figure 3) in the first direction (Figures 1 and 3, Element not labeled, but is top to bottom of the display.), and the first pixel row (Figure 3, Element L1. Paragraph 61) and the second pixel row (Figure 3, Element L2. Paragraph 61) are driven in an adjacent sequence in time (Seen in Figure 4) for display.
Regarding Claim 9, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above). Park et al. teach wherein the data driver (Figure 1, Element 140. Paragraphs 47 - 48) comprises a plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57), and the plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) are configured to receive an input data signal and obtain display data from the input data signal; and
controlling the operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals, comprises:
obtaining the second display data (Figure 3, Element L2DATA. Paragraph 61) based on an input data signal (Figure 5, Element 170. Paragraph 82) which is received by the data driver (Figure 1, Element 140. Paragraphs 47 - 48) and is used for the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61), in response to the i-th data comparison signal representing that the first display data (Figure 3, Element L1DATA. Paragraph 61) and the second display data (Figure 3, Element L2DATA. Paragraph 61) have a second comparison relationship (Figure 5, Element S140, Sub-Element No. Paragraphs 82 - 84) different from the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81).
Regarding Claim 10, Park et al. teach in view of Matsuzaki et al. the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 9 (See Above). Park et al. teach wherein controlling the operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals (Figure 5, Element S140. Paragraph 80), further comprises: determining whether the data driver (Figure 1, Element 140. Paragraphs 47 - 48) receives the input data signal in response to the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81).
Regarding Claim 11, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 9 (See Above). Park et al. teach wherein controlling the operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals, further comprises:
allowing at least some modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) of the plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) to be in a first operation state (Figure 5, Elements S150 and S160. Paragraph 81) in response to the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81); and
allowing each module (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) of the plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) to be in a second operation state (Figure 5, Elements S150 and S160. Paragraph 81) in response to the second comparison relationship (Figure 5, Element S140, Sub-Element No. Paragraphs 82 - 84),
wherein power consumption of each module (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) of the plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) in the first operation state (Figure 5, Elements S150 and S160. Paragraph 81) is less than power consumption (Paragraph 85) of the each module (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) in the second operation state (Figure 5, Elements S150 and S160. Paragraph 81).
Regarding Claim 12, Park et al. in view of Matsuzaki et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 11 (See Above). Park et al. teach wherein allowing the at least some modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) of the plurality of modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) to be in the first operation state (Figure 5, Elements S150 and S160. Paragraph 81), comprises: allowing the at least some modules (Figure 2, Elements 210 and 230. Paragraphs 53 - 57) to be in an inactive state (Paragraph 55. Park et al. discloses “When the shift register 210 receives the re-output signal ROS from the timing controlling part 150, the shift register 210 may not output enable signals En1, . . . , and Enk and may not store the parallel data DATA1, . . . , and DATAk in the latch 230.” The shift register not outputting enable signals is deemed as being inactive.).
Regarding Claim 13, Park et al. teach a control method for a timing controller (Figure 1, Element 150. Paragraphs 49 - 51), comprises:
determining a plurality of comparison relationships between a plurality of groups of first display data (Figure 3, Element L1DATA. Paragraph 61) and a plurality of groups of second display data (Figure 3, Element L2DATA. Paragraph 61) respectively according to source input data received from a data source(Figure 1, Element external source. Paragraph 49), and generating a plurality of data comparison signals for representing the plurality of comparison relationships (Figure 5, Element S140. Paragraph 80),
wherein the plurality of groups of first display data (Figure 3, Element L1DATA. Paragraph 61) are respectively used for enabling a plurality of groups of sub-pixels (Figure 1, Element 120. Paragraph 44) in a first pixel row (Figure 3, Element L1. Paragraph 61) to display, the plurality of groups of second display data (Figure 3, Element L2DATA. Paragraph 61) are respectively used for enabling a plurality of groups of sub-pixels (Figure 1, Element 120. Paragraph 44) in a second pixel row (Figure 3, Element L2. Paragraph 61) to display, and in time (Seen in Figure 4), the second pixel row (Figure 3, Element L2. Paragraph 61) is driven to display after (Seen in Figure 4) the first pixel row (Figure 3, Element L1. Paragraph 61) is driven to display; and
transmitting the plurality of data comparison signals to a data driver (Figure 1, Element 140. Paragraphs 47 - 48), to control an operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals Figure 5, Element S140. Paragraph 80),
wherein a plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are divided into m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) based on color arrangement order of the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44), the plurality of groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) are m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44), and the plurality of groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) are m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44), m being an integer greater than 1 (Seen in Figure 1);
the plurality of data comparison signals are m data comparison signals (Figure 5, Element S140. Paragraph 80), and among the m data comparison signals (Figure 5, Element S140. Paragraph 80), an i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, wherein i is an integer, and 0 < i ≤ m (Figure 5, Element i = m. Paragraph 80. Park et al. discloses that the first data line and the second data line are the same, therefore the data for each driver is the same as well.); and
each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) comprises at least one first sub-pixel (Figure 1, Element 120. Paragraph 44) and at least one second sub-pixel (Figure 1, Element 120. Paragraph 44), a first data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, and a second data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display; and
in response to the i-th data comparison signal representing that first display data (Figure 3, Element L1DATA. Paragraph 61) and the second display data (Figure 3, Element L2DATA. Paragraph 61) have a first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81), the second display data (Figure 3, Element L2DATA. Paragraph 61) is obtained based on the first display data (Figure 3, Element L1DATA. Paragraph 61) which has been cached by the data driver (Figure 1, Element 140. Paragraphs 47 - 48), wherein the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81)
Park et al. is silent with regards to wherein the first comparison relationship comprises the first display data being reverse to the second display data.
Matsuzaki et al. teach wherein the first comparison relationship comprises the first display data being reverse to the second display data (Figures 9A and 9B. Paragraph 74).
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display panel of Park et al. with the display data of Matsuzaki et al. The motivation to modify the teachings of Park et al. with the teachings of Matsuzaki et al. is to reduce the probability of maximum power consumption, as taught by Matsuzaki et al. (Paragraph 8).
Regarding Claim 14, Park et al. in view of Matsuzaki et al. teach the control method for the timing controller (Figure 1, Element 150. Paragraphs 49 - 51) according to claim 13 (See Above). Park et al. teach further comprising:
for each data comparison signal among the plurality of data comparison signals, disallowing to transmit an input data signal (Paragraph 57) corresponding to the second display data (Figure 3, Element L2DATA. Paragraph 61) to the data driver (Figure 1, Element 140. Paragraphs 47 - 48) in response to the data comparison signal representing that the first display data (Figure 3, Element L1DATA. Paragraph 61) and the second display data (Figure 3, Element L2DATA. Paragraph 61) have a first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81).
Regarding Claim 15, Park et al. teach a timing controller (Figure 1, Element 150. Paragraphs 49 - 51), comprising a processor (Paragraphs 158 – 159) and a non-transitory memory (Paragraph 160) with instructions thereon, wherein the instructions upon execution by the processor (Paragraphs 158 – 159), cause the processor to:
determine a plurality of comparison relationships between a plurality of groups of first display data (Figure 3, Element L1DATA. Paragraph 61) and a plurality of groups of second display data (Figure 3, Element L2DATA. Paragraph 61) respectively according to source input data received from a data source, and generate a plurality of data comparison signals (Figure 5, Element S140. Paragraph 80) for representing the plurality of comparison relationships (Figure 5, Element S140. Paragraph 80), wherein the plurality of groups of first display data (Figure 3, Element L1DATA. Paragraph 61) are respectively used for enabling a plurality of groups of sub-pixels (Figure 1, Element 120. Paragraph 44) in a first pixel row (Figure 3, Element L1. Paragraph 61) to display, the plurality of groups of second display data (Figure 3, Element L2DATA. Paragraph 61) are respectively used for enabling a plurality of groups of sub-pixels (Figure 1, Element 120. Paragraph 44) in a second pixel row (Figure 3, Element L2. Paragraph 61) to display, and in time(Seen in Figure 4), the second pixel row (Figure 3, Element L2. Paragraph 61) is driven to display after (Seen in Figure 4) the first pixel row (Figure 3, Element L1. Paragraph 61) is driven to display; and
transmit the plurality of data comparison signals (Figure 5, Element S140. Paragraph 80) to a data driver (Figure 1, Element 140. Paragraphs 47 - 48), to control an operation state (Figure 5, Elements S150 and S160. Paragraph 81) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each data comparison signal of the m data comparison signals Figure 5, Element S140. Paragraph 80),
wherein a plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are divided into m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) based on color arrangement order of the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44), the plurality of groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) are m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44), and the plurality of groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) are m groups (Figure 1, Element not labeled, but is the number of data driving circuit part (Element 200). Paragraph 47) of sub-pixels (Figure 1, Element 120. Paragraph 44), m being an integer greater than 1 (Seen in Figure 1);
the plurality of data comparison signals are m data comparison signals (Figure 5, Element S140. Paragraph 80), and among the m data comparison signals (Figure 5, Element S140. Paragraph 80), an i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling an i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, wherein i is an integer, and 0 < i ≤ m (Figure 5, Element i = m. Paragraph 80. Park et al. discloses that the first data line and the second data line are the same, therefore the data for each driver is the same as well.); and
each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) comprises at least one first sub-pixel (Figure 1, Element 120. Paragraph 44) and at least one second sub-pixel (Figure 1, Element 120. Paragraph 44), a first data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the first sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display, and a second data comparison signal (Figure 5, Element S140. Paragraph 80) among the m data comparison signals (Paragraph 61. Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110…For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same.” The data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same.) represents a comparison relationship (Figure 5, Element S140. Paragraph 80) between the first display data (Figure 3, Element L1. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and the second display data (Figure 3, Element L2. Paragraph 61) for enabling the second sub-pixel (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61) to display; and
in response to the i-th data comparison signal representing that first display data (Figure 3, Element L1DATA. Paragraph 61) and the second display data (Figure 3, Element L2DATA. Paragraph 61) have a first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81), the second display data (Figure 3, Element L2DATA. Paragraph 61) is obtained based on the first display data (Figure 3, Element L1DATA. Paragraph 61) which has been cached by the data driver (Figure 1, Element 140. Paragraphs 47 - 48), wherein the first comparison relationship (Figure 5, Element S140, Sub-Element Yes. Paragraph 81)
Park et al. is silent with regards to wherein the first comparison relationship comprises the first display data being reverse to the second display data.
Matsuzaki et al. teach wherein the first comparison relationship comprises the first display data being reverse to the second display data (Figures 9A and 9B. Paragraph 74).
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display panel of Park et al. with the display data of Matsuzaki et al. The motivation to modify the teachings of Park et al. with the teachings of Matsuzaki et al. is to reduce the probability of maximum power consumption, as taught by Matsuzaki et al. (Paragraph 8).
Regarding Claim 16, Park et al. in view of Matsuzaki et al. teach the timing controller (Figure 1, Element 150. Paragraphs 49 - 51) according to claim 15 (See Above). Park et al. teach the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are (mxn) sub-pixels (Figure 1, Element 120. Paragraph 44), and n is an integer greater than 0;
an (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61), and an (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61), wherein j is an integer, and 0 ≤ j < n (Figure 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59); and
the i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) to display.
Regarding Claim 17, Park et al. in view of Matsuzaki et al. teach an electronic device, comprising the timing controller (Figure 1, Element 150. Paragraphs 49 - 51) and the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 15 (See Above). Park et al. teach wherein the data driver (Figure 1, Element 140. Paragraphs 47 - 48) comprises a processor (Paragraphs 158 – 159) and a non-transitory memory (Paragraph 160) with instructions thereon, wherein the instructions upon execution by the processor (Paragraphs 158 – 159), cause the processor to:
obtain the plurality of data comparison signals (Figure 5, Element S140. Paragraph 80); and
control an operation state (Figure 5, Element S140, Sub-Elements Yes or No. Paragraphs 81 - 84) of the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to each of the data comparison signals (Figure 5, Element S140. Paragraph 80).
Regarding Claim 18, Park et al. in view of Matsuzaki et al. teach the electronic device according to claim 17 (See Above). Park et al. teach wherein the plurality of sub-pixels (Figure 1, Element 120. Paragraph 44) comprised in each of the pixel rows (Figure 3, Elements L1 - L7. Paragraph 61) are (mxn) (Figures 1 and 2, Element not labeled, but each group of m is for one data driving circuit part (Element 200) with each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59) sub-pixels (Figure 1, Element 120. Paragraph 44), and n is an integer greater than 0 (Figure 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59);
an (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the first pixel row (Figure 3, Element L1. Paragraph 61), and an (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) belongs to the i-th group of sub-pixels (Figure 1, Element 120. Paragraph 44) in the second pixel row (Figure 3, Element L2. Paragraph 61), wherein j is an integer, and 0 ≤ j < n (Figure 2, Element not labeled, but each data driving circuit part (Element 200) having k data lines. Paragraphs 47 and 59); and
the i-th data comparison signal represents a comparison relationship between first display data (Figure 3, Element L1DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the first pixel row (Figure 3, Element L1. Paragraph 61) to display and second display data (Figure 3, Element L2DATA. Paragraph 61) for enabling the (mxj+i)-th sub-pixel in the second pixel row (Figure 3, Element L2. Paragraph 61) to display.
Regarding Claim 19, Park et al. in view of Matsuzaki et al. teach an electronic device, comprising:
a memory (Park et al. Paragraph 160), configured to store computer-executable instructions in a non-transitory manner; and
a processor (Park et al. Paragraphs 158 – 160), configured to execute the computer-executable instructions, wherein the computer-executable instructions, upon execution by the processor, cause the processor (Park et al. Paragraphs 158 – 160) to implement the control method for the data driver (Park et al. Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above).
Regarding Claim 20, Park et al. in view of Matsuzaki et al. teach a non-transitory computer-readable storage medium (Paragraph 160). Park et al. teach wherein the non-transitory computer-readable storage medium (Paragraph 160) stores computer-executable instructions, and the computer-executable instructions, when executed by a processor (Paragraphs 158 – 160), cause the processor (Paragraphs 158 – 160) to implement the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 1 (See Above).
Claims 6 – 7 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (U.S. PG Pub 2016/0140892) in view of Matsuzaki et al. (U.S. PG Pub 2020/0175942) in view of Hsieh et al. (U.S. PG Pub 2014/0049619).
Regarding Claim 6, Park et al. in view of Matsuzaki et al. teach the control method for the data driver according to claim 5 (See Above). Park et al. is silent with regards to wherein the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row, and the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row share a same data line in the display panel, so as to apply a first display electrical signal corresponding to the first display data to the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row, and to apply a second display electrical signal corresponding to the second display data to the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row respectively through the same data line.
Hsieh et al. teach wherein the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i). Paragraph 47) in the first pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i) and SL2(i). Paragraph 51), and the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i+1). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i+1). Paragraph 47) in the second pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i+1) and SL2(i+1). Paragraph 53) share a same data line (Figure 3, Element DL1. Paragraph 42) in the display panel (Figure 1, Element 1000. Paragraph 40), so as to apply a first display electrical signal (Figure 4, Elements S1 and S2. Paragraphs 50 – 51) corresponding to the first display data to the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i). Paragraph 47) in the first pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i) and SL2(i). Paragraph 51), and to apply a second display electrical signal (Figure 4, Elements S3 and S4. Paragraphs 52 – 53) corresponding to the second display data to the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i+1). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i+1). Paragraph 47) in the second pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i+1) and SL2(i+1). Paragraph 53) respectively through the same data line (Figure 3, Element DL1. Paragraph 42).
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display panel of Park et al. and the display data of Matsuzaki et al. with the teachings of the shared data lines of Hsieh et al. The motivation to modify the teachings of Park et al. and Matsuzaki et al. with the teachings of Hsieh et al. is to reduce bright and dark lines in order to increase display quality, as taught by Hsieh et al. (Paragraph 10).
Regarding Claim 7, Park et al. in view of Matsuzaki et al. in view of Hsieh et al. teach the control method for the data driver (Figure 1, Element 140. Paragraphs 47 - 48) according to claim 6 (See Above). Park et al. is silent with regards to wherein the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row, and the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row are respectively located on both sides of the same data line in the second direction; or the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row, and the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row are all located on at least one side of the same data line in the second direction.
Hsieh et al. teach wherein the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i). Paragraph 47) in the first pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i) and SL2(i). Paragraph 51), and the (2xmxj+2xi-1)-th sub-pixel (Figure 3, Element P, Sub-Element the P connected to gate line SL1(i+1). Paragraph 47) and the (2xmxj+2xi)-th sub-pixel (Figure 3, Element N, Sub-Element the N connected to gate line SL2(i+1). Paragraph 47) in the second pixel row (Figure 3, Element not labeled, but is the first row with the pixels connected to gate lines SL1(i+1) and SL2(i+1). Paragraph 53) are respectively located on both sides of the same data line (Figure 3, Element DL1. Paragraph 42) in the second direction (Figures 2 and 3, Element not labeled, but is left to right of the display.); or
the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the first pixel row, and the (2xmxj+2xi-1)-th sub-pixel and the (2xmxj+2xi)-th sub-pixel in the second pixel row are all located on at least one side of the same data line in the second direction.
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display panel of Park et al. and the display data of Matsuzaki et al. with the teachings of the shared data lines of Hsieh et al. The motivation to modify the teachings of Park et al. and Matsuzaki et al. with the teachings of Hsieh et al. is to reduce bright and dark lines in order to increase display quality, as taught by Hsieh et al. (Paragraph 10).
Response to Arguments
Regarding the first argument, in which the applicant asserts that the prior art of record fails to teach at least the newly added limitation to at least Claim 1. The applicant argues that there is no disclosure in Park et al. of separate control on display data for enabling the first sub-pixel and the second sub-pixel in the pixel row. The examiner respectfully disagrees with the applicant’s assertion. Park et al. disclose “The display panel 110 includes gate lines GL, data lines DL, and a plurality of pixels 120. The gate lines GL extend in a first direction D1 and are arranged in a second direction D2 substantially perpendicular to the first direction D1. The data lines DL extend in the second direction D2 and are arranged in the first direction D1. Each of the pixels 120 includes a thin film transistor 121 electrically connected to the gate line GL and the data line DL, a liquid crystal capacitor 123, and a storage capacitor 125 connected to the thin film transistor 121 (Paragraph 44. Emphasis Added).” Park et al. further disclose “Referring to FIGS. 1 and 3, the image data DATA may include a first line data L1DATA displayed on a first line L1 of the display panel 110, a second line data L2DATA displayed on a second line L2 of the display panel 110, a third line data L3DATA displayed on a third line L3 of the display panel 110, a fourth line data L4DATA displayed on a fourth line L4 of the display panel 110, a fifth line data L5DATA displayed on a fifth line L5 of the display panel 110, a sixth line data L6DATA displayed on a sixth line L6 of the display panel 110, and a seventh line data L7DATA displayed on a seventh line L7 of the display panel 110. For example, the first line data L1DATA, the second line data L2DATA and the third line data L3DATA may be the same (Paragraph 61. Emphasis Added).” Given this disclosure along with Figure 1, a person of ordinary skill in the art would easily understand that each first line data is driven to a plurality of pixels in a given row. Furthermore, when the data of a given line (Element Lx) is the same as the data of another given line (Element Lx), that will include the data that is driven to the plurality of pixels of each line. In order for the data of one line to be the same as the data from another line, the data for each pixel is the same. The Office is unmoved by the applicant’s argument and the rejection is maintained.
All arguments are considered moot in light of the new grounds of rejection presented above, necessitated by the applicant’s amendment and/or the response to the first argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lee (U.S. PG Pub 2022/0415237) teaches a control circuit which tests data on the same row in order to reduce power consumption of the display device, similar to the instant invention.
Oh et al. (U.S. PG Pub 2014/0160186) teaches a liquid crystal display in which sub-pixels in the same row share one data line, similar to the instant invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW B SCHNIREL whose telephone number is (571)270-7690. The examiner can normally be reached Monday - Friday, 10 - 6 EST.
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/A.B.S/Examiner, Art Unit 2625
/WILLIAM BODDIE/Supervisory Patent Examiner, Art Unit 2625
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