DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The following addresses applicant’s remarks/amendments dated 5th May, 2026.
Claims 1, 3-4, 6-7 and 14-17 were amended; no claims were cancelled; no new Claims were added; therefore, claims 1-19 are pending in current application and are addressed below.
The objections to claim 14 has been withdrawn.
The rejections to claims 1-2, 5 and 8-19 under 35 U.S.C. 112(b) have been withdrawn. However, new rejections of claims 3-4 and 6-7 under 35 U.S.C. 112(a) and 112(b) are addressed below.
Response to Arguments
Applicant’s arguments filed on 5th May 2026 regarding the rejection of claim 1 under 35 U.S.C §102 as being anticipated by Druml have been fully considered and are not persuasive.
In response to applicant’s argument filed on 5th May 2026, page 11-14, that “Druml merely teaches that for each of th pixels, a corresponding select and sum circuit selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected subpixels current together to generate a pixel current for the corresponding pixel…, but no teaching or suggestion in about different settings for selection of the sub-pixels nor switching or shifting of settings to be applied”.
Examiner respectfully disagrees. The amended claim 1 of current case only teaches “…for the kth output end by shifting the combinations among the M consecutive input ends to set different combinations at a first setting to an Mth setting”. As disclosed in Druml Fig. 11A, all the Select and Sum circuit has n consecutive input, which satisfied the claim limitation of the M consecutive input ends. Even the claim mentions “by shifting the combination among the M consecutive input end”, it still does not mention how to combine the input end. By Broadest Reasonable interpretation (BRI), the shifting the combination can be any kind of shifting among the M consecutive input not only shifting by order as shown in Figs. 12 and 13. Therefore, Druml disclosed in Fig. 11A, paragraph [0108], “each select and sum circuits 31-1, 31-2, …, and 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel” satisfied the claim limitation.
Furthermore, even Druml didn’t mention the output of Pixel 1 to Pixel n data in Fig. 11A are different. The output of Pixel 1 to Pixel n data would be different due to the subpixel 1-n current pass different Select and Sum circuit 31-1 to 31-n. Therefore, the rejection is maintained.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 3-4 and 6-7 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 3, line 5, “the first selection circuit is configured to couple between the first input end and the second input end or between the third input end and the second input end” is amended in claim 3. This claim limitation is treated as a newly claimed subject matter.
The original claim 3 recited that “the first selection circuit is configured to couple between the third input end and the second input end or between the third input end and the fourth input end” which is described in Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115], therefore the first selection circuit is referred to switch SW2 which can couple between 2nd/3rd input or 3rd/4th input. However, the new amended claim 3 introduced a circuit which is configured to couple 1st/2nd input or 2nd/3rd input which is neither shown nor described in Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115]. Actually, there is no such circuit which can choose to couple between 1st/2nd input or 2nd/3rd input. To couple between 1st/2nd input would be referred to switch SW1 and couple between 2nd/3rd input would be referred to switch SW2. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 3, line 8, “the second selection circuit is configured to couple between the third input end and the fourth input end or between the fifth input end and the fourth input end” is amended in claim 3. This claim limitation is treated as a newly claimed subject matter.
The original claim 3 recited that “the second selection circuit is configured to couple between the fifth input end and the fourth input end or between the fifth input end and the sixth input end” which is described in Fig. 12, Fig. 13, [0097], [0111]-[0112], [0115], therefore the second selection circuit is referred to switch SW3 which can couple between 5th/4th input or 5th/6th input. However, the new amended claim 3 introduced a circuit which is configured to couple 3rd/4th input or 5th/4th input which is neither shown nor described in Fig. 12, Fig. 13, [0097], [0111]-[0112], [0115]. Actually, there is no such circuit which can choose to couple between 3rd/4th input or 5th/4th input. To couple between 3rd/4th input would be referred to switch SW2 and couple between 5th/4th input would be referred to switch SW3. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 4, line 6, “couple between the third input end and the second input end by controlling the first selection circuit and couple between the fifth input end the fourth input end by controlling the second selection circuit at the second setting” is amended in claim 4. This claim limitation is treated as a newly claimed subject matter.
As described above in claim 3, there is no such first selection circuit which can choose to couple between 1st/2nd input or 2nd/3rd input. To couple between 1st/2nd input would be referred to switch SW1 and couple between 2nd/3rd input would be referred to switch SW2 (Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115]). Furthermore, there is no such second selection circuit which can choose to couple between 3rd/4th input or 5th/4th input. To couple between 3rd/4th input would be referred to switch SW2 and couple between 5th/4th input would be referred to switch SW3. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 6, line 8, “the third selection circuit is configured to couple between the seventh input end and sixth input end or between the eighth input end and the ninth input end” is amended in claim 6. This claim limitation is treated as a newly claimed subject matter.
The original claim 6 recited that “the third selection circuit is configured to couple between the 7th input end and the 6th input end or between the 7th input end and the 9th input end” which is described in Fig. 26, Fig. 27, [0163], [0169]-[0170], [0174], therefore the first selection circuit is referred to switch SWa3 which can couple between 6th/7th input or 7th/9th input. However, the new amended claim 6 introduced a circuit which is configured to couple 6th/7th input or 8th /9th input which is neither shown nor described in Fig. 26, Fig. 27, [0163], [0169]-[0170], [0174]. Actually, there is no such circuit which can choose to couple between 6th/7th input or 8th /9th input. To couple between 6th/7th input would be referred to switch SWa3 and couple between 8th /9th input would be referred to switch SWb3. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 7, line 5, “couple between the seventh input end and the ninth input end by controlling the third selection circuit” is amended in claim 7. This claim limitation is treated as a newly claimed subject matter.
Claim 7 is depending on claim 6 where in third selection circuit does not have an ability to connect seventh input end and ninth input end. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 7, line 6, “couple between eighth input end and the ninth input end by controlling the fourth selection circuit at the first setting” is amended in claim 7. This claim limitation is treated as a newly claimed subject matter.
Claim 7 is depending on claim 6 where in fourth selection circuit does not have an ability to connect eighth input end and the ninth input end. Therefore, it is treated as a newly claimed subject matter.
Regarding claim 7, line 12, “couple between eighth input end and the ninth input end by controlling the fourth selection circuit at the second setting” is amended in claim 7. This claim limitation is treated as a newly claimed subject matter.
Claim 7 is depending on claim 6 where in fourth selection circuit does not have an ability to connect eighth input end and the ninth input end. Therefore, it is treated as a newly claimed subject matter.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4 and 6-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 3, line 5, the limitation of “the first selection circuit is configured to couple between the first input end and the second input end or between the third input end and the second input end” is indefinite.
The original claim 3 recited that “the first selection circuit is configured to couple between the third input end and the second input end or between the third input end and the fourth input end” which is described in Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115], therefore the first selection circuit is referred to switch SW2 which can couple between 2nd/3rd input or 3rd/4th input. However, the new amended claim 3 introduced a circuit which is configured to couple 1st/2nd input or 2nd/3rd input which is neither shown nor described in Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115]. Actually, there is no such circuit which can choose to couple between 1st/2nd input or 2nd/3rd input. To couple between 1st/2nd input would be referred to switch SW1 and couple between 2nd/3rd input would be referred to switch SW2. Therefore, the claim limitation is indefinite.
Regarding claim 3, line 8, the limitation of “the second selection circuit is configured to couple between the third input end and the fourth input end or between the fifth input end and the fourth input end” is indefinite.
The original claim 3 recited that “the second selection circuit is configured to couple between the fifth input end and the fourth input end or between the fifth input end and the sixth input end” which is described in Fig. 12, Fig. 13, [0097], [0111]-[0112], [0115], therefore the second selection circuit is referred to switch SW3 which can couple between 5th/4th input or 5th/6th input. However, the new amended claim 3 introduced a circuit which is configured to couple 3rd/4th input or 5th/4th input which is neither shown nor described in Fig. 12, Fig. 13, [0097], [0111]-[0112], [0115]. Actually, there is no such circuit which can choose to couple between 3rd/4th input or 5th/4th input. To couple between 3rd/4th input would be referred to switch SW2 and couple between 5th/4th input would be referred to switch SW3. Therefore, the claim limitation is indefinite.
Regarding claim 4, line 6, the limitation of “couple between the third input end and the second input end by controlling the first selection circuit and couple between the fifth input end the fourth input end by controlling the second selection circuit at the second setting” is indefinite.
As described above in claim 3, there is no such first selection circuit which can choose to couple between 1st/2nd input or 2nd/3rd input. To couple between 1st/2nd input would be referred to switch SW1 and couple between 2nd/3rd input would be referred to switch SW2 (Fig. 12, Fig. 13, [0096], [0111]-[0112], [0115]). Furthermore, there is no such second selection circuit which can choose to couple between 3rd/4th input or 5th/4th input. To couple between 3rd/4th input would be referred to switch SW2 and couple between 5th/4th input would be referred to switch SW3. Therefore, the claim limitation is indefinite..
Regarding claim 6, line 8, the limitation of “the third selection circuit is configured to couple between the seventh input end and sixth input end or between the eighth input end and the ninth input end” is indefinite.
The original claim 6 recited that “the third selection circuit is configured to couple between the 7th input end and the 6th input end or between the 7th input end and the 9th input end” which is described in Fig. 26, Fig. 27, [0163], [0169]-[0170], [0174], therefore the first selection circuit is referred to switch SWa3 which can couple between 6th/7th input or 7th /9th input. However, the new amended claim 6 introduced a circuit which is configured to couple 6th/7th input or 8th /9th input which is neither shown nor described in Fig. 26, Fig. 27, [0163], [0169]-[0170], [0174]. Actually, there is no such circuit which can choose to couple between 6th/7th input or 8th /9th input. To couple between 6th/7th input would be referred to switch SWa3 and couple between 8th /9th input would be referred to switch SWb3. Therefore, the claim limitation is indefinite.
Regarding claim 6, line 10, the fourth selection circuit is configured to couple between the eight input end and sixth input end or between the seventh input end and the ninth input end. However, refer to Fig. 27-Fig. 29, the fourth selection circuit (SWb3) is coupled to eighth input and sixth input or eighth input and ninth input. Therefore, the claim limitation is not clear.
For examining propose, examiner will treat the claims with selection of different input in circuit and add to the output with no specific input arrangement.
Regarding claim 7, line 5, the limitation of “couple between the seventh input end and the ninth input end by controlling the third selection circuit” is indefinite.
Claim 7 is depending on claim 6 where in third selection circuit does not have an ability to connect seventh input end and ninth input end. Therefore, the claim limitation is indefinite.
Regarding claim 7, line 6, the limitation of “couple between eighth input end and the ninth input end by controlling the fourth selection circuit at the first setting” is indefinite.
Claim 7 is depending on claim 6 where in fourth selection circuit does not have an ability to connect eighth input end and the ninth input end. Therefore, the claim limitation is indefinite.
Regarding claim 7, line 12, the limitation of “couple between eighth input end and the ninth input end by controlling the fourth selection circuit at the second setting” is indefinite.
Claim 7 is depending on claim 6 where in fourth selection circuit does not have an ability to connect eighth input end and the ninth input end. Therefore, the claim limitation is indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 8-13 and 15-17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Druml et al. (US 20220018941 A1, hereinafter “Druml”).
Regarding claim 1, Druml teaches a signal processing device (Druml; Fig. 11A, element 24) configured to process a plurality of intermittently input signals (Druml; Fig. 2, element 15), the signal processing device comprising:
a plurality of input ends configured to input the plurality of signals (Druml; Fig. 11A, [0106], the receiver circuit 24 is selectively coupled to sub-pixels 1 according to configuration control signals received from the system controller 23. The configuration control signals provide sub-sub-pixel and sub-pixel clustering information for selectively grouping sub-sub-pixels into sub-pixels and for selectively grouping sub-pixels into pixels; [0107], the sum of electrical signals (e.g. current) from each sub-sub-pixel of a respective sub-pixel is received as a sub-pixel current; subpixel 1 current to subpixels n current equivalent to a plurality of signals), respectively;
first to Nth output ends respectively associated with first to Nth groups (N is an integer of not less than two), each of the first to Nth groups including M (M is an integer of not less than two) consecutive input ends (Druml; Fig. 11A, [0108], each select and sum circuit 31-1 to 31-n selects which subpixel currents (subpixel 1 current to subpixel n current equivalent to M consecutive inputs ends) to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing; pixel 1 Data to pixel n Data equivalent to first to Nth output ends and obviously from Fig. 11A, n is equal or larger than 2); and
a control circuit configured to output, to a kth output end of the first to Nth output ends, a signal based on a signal obtained by adding a plurality of signals respectively input to the M consecutive input ends of a kth group of the first to Nth groups (k an integer of not less than 1 and not more than N), the control circuit being configured to switch combinations of input ends for the kth output end by shifting the combinations among the M consecutive input ends to set different combinations at a first setting to an Mth setting (Druml; Fig. 6, [0098]-[0101], illustrates pixel averaging of pixel A represented in Fig. 5A-5D. Pixel data average for each pixel over a plurality of frames can be generated; Fig. 11A, [0108], each select and sum circuits 31-1, 31-2, …., and 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixels; [0107], the sub-pixel currents are received at selected select and sum circuits 31-1 to 31-n, each corresponding to an assigned pixel based on sub-pixel clustering information. Thus, the sub-pixel currents are grouped into assigned pixels based on their assignment to a particular select and sum circuits; equivalent to the control circuit being configured to switch combinations of input ends as the M input ends to set different combinations).
Regarding claim 8, Druml teaches a light detector (Druml; Fig. 1-2, [0044], a schematic diagram of a Lidar scanning system with receiver path including segmented pixel sensor 15 and receiving circuit 24 (Fig. 11A, [0106])) comprising:
the signal processing device defined in claim 1 (please see above mapping of claim 1); and a plurality of light detection elements respectively coupled to the plurality of input ends (Druml; Fig. 2, Fig. 3A-3B, [0083], 12 microcells 2 are included. Thus, a SiPM 1 has 12 SPADs arranged in an array. The output of the pixel 5 formed by the 4x4 SiPM array is cumulative according to the electrical signals generated by the SPADs 3. The segmented pixels sensor is coupled to receiver circuit 24; Fig. 11A-11B, [0107], [0109], the sum of electrical signals form each sub-sub-pixel of a respective sub-pixel is received as a sub-pixel current (equivalent to a plurality of light detection elements respectively coupled to the plurality of input ends)).
Regarding claim 9, Druml teaches a light detector of claim 8, wherein each of the light detection elements include an avalanche photodiode (Druml; Fig. 2, Fig. 3A-3B, [0083], 12 microcells 2 are included. Thus, a SiPM 1 has 12 SPADs (avalanche photodiode [0035]) arranged in an array. The output of the pixel 5 formed by the 4x4 SiPM array is cumulative according to the electrical signals generated by the SPADs 3. The segmented pixels sensor is coupled to receiver circuit 24).
Regarding claim 10, Druml teaches a light detector of claim 9, wherein at each of the first setting to the Mth setting, a voltage higher than a voltage at an anode of the avalanche photodiode is applied to a cathode of the avalanche photodiode (Druml; [0048], SPADs, like avalanche photodiode (APDs), exploit the incident radiation triggered avalanche current of a p-n junction when reverse biased. The fundamental different between SPADs and APDs is that SPADs are specifically designed to operate with a reverse-bias voltage well above its breakdown voltage. This kind of operation is also called Geiger-mode).
Regarding claim 11, Druml teaches a light detector of claim 8, further comprising a column selector, wherein
the plurality of light detection elements respectively coupled to the plurality of input ends are classified into a plurality of cell units including at least one light detection element (Druml; Fig. 5A-5D, [0091], illustrate a dynamic formation of pixels that move across a segmented pixel sensor according to one or more embodiments; [0092], an illumination area 16 that is larger than the respective utilized sensor area of segment pixel sensor is used. Provided are activated pixel 5a (comprising a 4x4 area of sub-pixels are fully within the sensor arear), deactivated pixels 5b (only partially within the sensor area), and deactivated sub-pixels that are arranged between activated and/or deactivated pixels. The activated/deactivated area is equivalent to cell units which including 4x4 area of sub-pixel; Fig. 11A, [0107], the sum of electrical signal from each sub-sub-pixel of a respective subpixel is received as a sub-pixel current and are received at selected select and sum circuits 31-1 to 31-n, each corresponding to an assigned pixel based on sub-pixel clustering information. Additional multiplexers and summing circuit may be used for grouping and summing sub-sub-pixels into sub-pixel currents based on sub-sub-pixel clustering information and directing the sub-pixel current to assigned select and sum circuit according to the sub-pixel clustering information), and
the column selector is configured to selectively couple each of the plurality of input ends to at least one of the associated cell units (same as above).
Regarding claim 12, Druml teaches a light detector of claim 11, wherein the column selector is configured to switch combinations of the input ends (Druml; Fig. 5A-5D, [0091], illustrate a dynamic formation of pixels that move across a segmented pixel sensor (equivalent to switch combinations of the input ends) according to one or more embodiments; [0092], an illumination area 16 that is larger than the respective utilized sensor area of segment pixel sensor is used. Provided are activated pixel 5a (comprising a 4x4 area of sub-pixels are fully within the sensor arear), deactivated pixels 5b (only partially within the sensor area), and deactivated sub-pixels that are arranged between activated and/or deactivated pixels. The activated/deactivated area is equivalent to cell units which including 4x4 area of sub-pixel; Fig. 11A, [0107], the sum of electrical signal from each sub-sub-pixel of a respective subpixel is received as a sub-pixel current and are received at selected select and sum circuits 31-1 to 31-n, each corresponding to an assigned pixel based on sub-pixel clustering information. Additional multiplexers and summing circuit may be used for grouping and summing sub-sub-pixels into sub-pixel currents based on sub-sub-pixel clustering information and directing the sub-pixel current to assigned select and sum circuit according to the sub-pixel clustering information).
Regarding claim 13, Druml teaches a distance measuring device (Druml; Fig. 1-2, [0044], a schematic diagram of a Lidar scanning system with receiver path including segmented pixel sensor 15 and receiving circuit 24 (Fig. 11A, [0106])) comprising:
the light detector defined in claim 8 (please see above mapping of claim 8);
a light source configured to emit a light signal (Druml; Fig. 1-2, [0049], the illumination unit 10 includes multiple light sources transmit light for scanning the FOV for objects); and
a measurement circuit configured to detect reflected light of the light signal based on a signal output from the light detector, the detection circuit being configured to calculate a distance value by using a time at which the light source emits the light signal and a time at which the reflected light is detected (Druml; Fig. 2, [0044], the receiver may further include receiver circuitry, such as data acquisition/redout circuitry and data processing circuitry; [0057], multiple scans may be used to generate distance and depth maps, as well as 3D images by a processing unit; [0059], the segmented pixel sensor 15 generates digital measurement signal based on received light. The digital measurement signals may be used for generating a 3D map of the environment and/or other object data based on the reflected light (e.g., via TOF calculations and processing); [0061], the segmented pixel sensor 15 receives reflective light pulses as the receiving line RL and generates digital electrical signals in response thereto. A time-of-flight computation using the electrical signals can determine the distance of objects from the segmented pixel sensor; [0063], multiple time measurements are averages and calculates the distance to the target at that particular filed position).
Regarding claim 15, Druml teaches the distance measuring device of claim 13, wherein the image processing circuit generates N × M pixels based on data of a plurality of distance values corresponding to the first setting to the Mth setting (Druml; Fig. 13A, [0128], two consecutive laser shots 17 and 18 (correspond to any two consecutive steps) into the FOV; Fig. 13B-13C, [0129], different possible pixel positions at which laser shots 17 and 18 may be received on the segmented pixel sensor 15 based on a time-of-flight of each laser shot 17 and 18; [0063], multiple time measurements are averages and calculates the distance to the target at that particular filed position; [0040], differences in return times for each light pulse across multiple pixels of the pixel array can then be used to make digital 3D representation of an environment or to generate other sensor data. Since each shot has plurality of pixels (says N pixels) and two different shot (17 and 18; means M=2), the image processing circuit can generate NxM pixels as expected).
Regarding claim 16, Druml teaches the distance measuring device of claim 13, wherein the control circuit repeatedly executes processing at the first setting to the Mth setting and transmits, to the measurement circuit, information based on outputs from the first output end to the Nth output end at each of the first setting to the Mth setting for every processing at the Mth setting (Druml; Figs. 5A-5D, [0091], illustrate a dynamic formation of pixels that move across a segmented pixel sensor. Figs. 5A-5D represent a sequential order of laser shooting events (e.g., four steps of four consecutive laser transmission or laser shoots) of a Lissajous scanning operation; Fig. 6, [0098], illustrates pixels averaging of pixel A represented in Figs. 5A-5D. The system controller 23 receives the pixel measurement signal from pixel A in each of the sequential steps and applies an equally weighed averaging to generate an averaged pixel measurement signal. The same averaging can be applied to each of the pixels A-E to generate averaged pixel data for each of the pixels across multiple frames. Similar executing processing and readout can be seen in Fig. 7-10).
Regarding claim 17, Druml teaches the distance measuring device of claim 13, wherein
when calculating a distance value at a measurement point of a target at the first setting, the measurement circuit is configured to use measurement results at a plurality of measurement points included in a first range including the measurement point (Druml; [0059], the segmented pixel sensor 15 generates digital measurement signal based on received light. The digital measurement signals may be used for generating a 3D map of the environment and/or other object data based on the reflected light (e.g., via TOF calculations and processing)); and
when calculating a distance value of a measurement point of a target at the second setting, the measurement circuit is configured to use measurement results at a plurality of measurement points included in a second range shifted from the first range by at least half of a pixel in a vertical direction (same as above; Druml; Fig. 13A, [0128], two consecutive laser shots 17 and 18 (correspond to any two consecutive steps) into the FOV. The two consecutive laser shots 17 and 18 overlap by a pixel (equivalent to the second range shifted from the first range by at least half of a pixel, seen Fig. 13 A the illuminated area pixel A, B, C, D for shot 17, and pixel C, E, F, G for shot 18); Fig. 13B-13C, [0129], different possible pixel positions at which laser shots 17 and 18 may be received on the segmented pixel sensor 15 based on a time-of-flight of each laser shot 17 and 18. Equivalent to plurality of distance value related to different time; [0057], multiple scans may be used to generate distance and depth maps, as well as 3D images by a processing unit).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-7 are rejected under 35 U.S.C. 103 as being unpatentable over Druml alone.
Regarding claim 2, Druml teaches the signal processing device of claim 1, wherein if M = 2,
the plurality of input ends include first to (N × 2 + 1)th inputs (Druml; Fig. 11A, [0107], the sub-pixel currents are received at selected select and sum circuits 31-1 to 31-n. Subpixel 1 current to subpixel n current equivalent to the plurality of input ends; Fig. 3A-3B shows a SiPM sub-pixel 1 included in the pixel 5 of the segmented pixel sensor 15 (at least 16 subpixel 1 is showing in the sensor 15, equivalent to first to (Nx2+1)th inputs)), and
the control circuit is configured to (Druml; Fig. 11A, [0107], the sub-pixel currents are grouped into assigned pixels based on their assignment to a particular select and sum circuits 31-1 to 31-n (equivalent to control circuits)):
output a signal based on a signal obtained by adding a plurality of signals respectively input to the (k × 2 -1)th input end and the (k × 2)th input end to the kth output end at the first setting (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing; pixel 1 Data to pixel n Data equivalent to first to Nth groups and obviously from Fig. 11A, n is larger than 2); and
output a signal based on a signal obtained by adding a plurality of signals respectively input to the (k × 2)th input end and the (k × 2 + 1)th input end to the kth output end at the second setting (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Regarding claim 3, Druml teaches the signal processing device as recited in claim 2, further comprising a first selection circuit and a second selection circuit (Druml; Fig. 11A, [0108], each select and sum circuit 31-1 to 31-n (equivalent to a first selection circuit (31-1) and second selection circuit (31-2)) selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixel current together to generate a pixel current for the corresponding pixel), wherein
if M = 2,
the (k × 2)th input end is coupled to the kth output end (Druml; Fig. 11A, clearly see the subpixel 1 current to subpixel n current (equivalent to (k x 2)th input end) is coupled to pixel 1 data to pixel n data (equivalent to kth output end)),
the first selection circuit is configured to couple between the first input end and the second input end or between the third input end and the second input end (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing), and
the second selection circuit is configured to couple between the third input end and the fourth input end or between the fifth input end and the fourth input end (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Regarding claim 4, Druml teaches the signal processing device as recited in claim 3, wherein if M = 2,
the control circuit is configured to: couple between the first input end and the second input end by controlling the first selection circuit, and couple between the third input end and the fourth input end by controlling the second selection circuit at the first setting (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing); and
couple between the third input end and the second input end by controlling the first selection circuit and couple between the fifth input end and the fourth input end by controlling the second selection circuit at the second setting (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Regarding claim 5, Druml teaches the signal processing device as recited in claim 1, wherein if M = 3,
the plurality of input ends include first to (N × 3 + 2)th input ends (Druml; Fig. 11A, [0107], the sub-pixel currents are received at selected select and sum circuits 31-1 to 31-n. Subpixel 1 current to subpixel n current equivalent to the plurality of input ends; Fig. 3A-3B shows a SiPM sub-pixel 1 included in the pixel 5 of the segmented pixel sensor 15 (at least 16 subpixel 1 is showing in the sensor 15, equivalent to first to (Nx3+2)th input)) and
the control circuit is configured (Druml; Fig. 11A, [0107], the sub-pixel currents are grouped into assigned pixels based on their assignment to a particular select and sum circuits 31-1 to 31-n (equivalent to control circuits)) to:
output, to the kth output end, a signal based on a signal obtained by adding a plurality of signals respectively input to the (k × 3 – 2)th input end, the (k × 3 – 1)th input end, and the (k × 3)th input end at the first setting (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing);
output, to the kth output end, a signal based on a signal obtained by adding a plurality of signals respectively input to the (k × 3 - 1)th input end, the (k × 3)th input end, and the (k × 3 + 1)th input end at the second setting (same as above); and
output, to the kth output end, a signal based on a signal obtained by adding a plurality of signals respectively input to the (k × 3)th input end, the (k × 3 + 1)th input end, and the (k × 3 + 2)th input end at the third setting (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Regarding claim 6, Druml teaches the signal processing device as recited in claim 5, further comprising a first selection circuit to a fourth selection circuit (Druml; Fig. 11A, [0108], each select and sum circuit 31-1 to 31-n (equivalent to a first selection circuit (31-1) to nth selection circuit (31-n); because the subpixel is at least 16 (Fig. 3A-3B), the selection circuit would be expected to more than four selected circuit) selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixel current together to generate a pixel current for the corresponding pixel), wherein if M =3,
the (k × 3)th input end is coupled to the kth output end (Druml; Fig. 11A, clearly see the subpixel 1 current to subpixel n current (equivalent to (k x 3)th input end) is coupled to pixel 1 data to pixel n data (equivalent to kth output end)),
the first selection circuit is configured to couple between the fourth input end and third input end or between the fourth input end and the sixth input end (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing),
the second selection circuit is configured to couple between the fifth input end and third input end or between the fifth input end and the sixth input end (same as above),
the third selection circuit is configured to couple between the seventh input end and sixth input end or between the eighth input end and the ninth input end (same as above), and
the fourth selection circuit is configured to couple between the eighth input end and sixth input end or between the seventh input end and the ninth input end (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Regarding claim 7, Druml teaches the signal processing device as recited in claim 6, wherein if M = 3,
the control circuit is configured (Druml; Fig. 11A, [0107], the sub-pixel currents are grouped into assigned pixels based on their assignment to a particular select and sum circuits 31-1 to 31-n (equivalent to control circuits)) to:
couple between the fourth input end and the sixth input end by controlling the first selection circuit, couple between the fifth input end and the sixth input end by controlling the second selection circuit, couple between the seventh input end and the ninth input end by controlling the third selection circuit, and couple between the eighth input end and the ninth input end by controlling the fourth selection circuit at the first setting (Druml; Fig. 11A, [0108], each select and sum circuits 31-1 to 31-n selects which sub-pixel currents to add among those received and applies a summing algorithm to sum the selected sub-pixels current together to generate a pixel current for the corresponding pixel. The respective pixel currents are passing to TIA (converts the pixel current into a voltage signal) and ADC (converts the analog voltage signal into a digital signal) and then transmitted on a readout channel as pixel data from the receiver circuit 24 to the system controller 23 for further processing);
couple between the fourth input end and the third input end by controlling the first selection circuit, couple between the fifth input end and the sixth input end by controlling the second selection circuit, couple between the seventh input end and the sixth input end by controlling the third selection circuit, and couple between the eight input end and the ninth input end by controlling the fourth selection circuit at the second setting (same as above); and
couple between the fourth input end and the third input end by controlling the first selection circuit, couple between the fifth input end the third input end by controlling the second selection circuit, couple between the seventh input end and the sixth input end by controlling the third selection circuit, and couple between the eighth input end and the sixth input end by controlling the fourth selection circuit at the third setting (same as above).
Though the prior art does not specific the detail of how to select the subpixel current to the output pixel Data. The selection of the subpixel current with different combination would be obvious to try because (1) combing multiple signals is a recognized need to average multiple reading cycle to obtain a good signal-to-noise ratio; (2) there exits only a finite set of ways to connect multiple signals (for instance, the input pixel taught by Druml has finite pixels shown in Fig. 3A-3B and predictably only a finite set of ways combining multiple signals); (3) one of ordinary skill in the art would recognize that the selection of the subpixel current to combine would be obvious to try with known variations (like exploring different parameters in a range or substituting known equivalent) to arrive at the claimed invention, even if no single reference explicitly states it. MPEP § 2143 (E) “Obvious to try-choosing from a finite number of identified, predictable solutions with reasonable expectation of success”.
Claim(s) 14 is rejected under 35 U.S.C. 103 as being unpatentable over Druml, modified in view of Hattori (US 6570672 B1, hereinafter “Hattori”).
Regarding claim 14, Druml teaches the distance measuring device of claim 13, further comprising an image processing circuit (Druml; [0063], a comparator IC recognizes the pulse and sends a digital signal to the TDC to stop the timer. The TDC then sends the serial data of the differential time between the start and stop digital signals to the microcontroller to filters out any error reads, averages multiple time measurements and calculates the distance to the target at the at particular field position. [0057], two scans are used for each scanning period. Multiple scans may be used to generate the distance and depth maps, as well as 3D images by a processing unit. This implies a image processing circuit to process the signals data), wherein
the measurement circuit transmits, to the image processing circuit, a first packet including data of a plurality of distance values corresponding to a first time and a second packet including data of a plurality of distance values corresponding to a second time (Druml; Fig. 13A, [0128], two consecutive laser shots 17 and 18 (correspond to any two consecutive steps) into the FOV. Fig. 13B-13C, [0129], different possible pixel positions at which laser shots 17 and 18 may be received on the segmented pixel sensor 15 based on a time-of-flight of each laser shot 17 and 18. Equivalent to plurality of distance value related to different time), and
Druml does not teach,
the image processing circuit rearranges the data included in the first packet and the data included in the second packet so as to cause data output from the same output end to be consecutively arranged.
Hattori disclosed in Fig. 9, column 12, line 5, two consecutive lines of image data are rearranged into A0, B0, A1 and B1 in one line; Fig. 10, column 12, line 14, two consecutive lines of image data are retrieved from the original image data left, rearranged alternately in the sequence of RAM1, RAM2, RAM1, RAM2…, in one-and-the-same line.
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of this invention to modify the distance measuring device taught by Druml to include the image processing circuit rearranges data included in the first packet and data included in the second packet so as to cause data output from the same output end to be consecutively arranged taught by Hattori with a reasonable expectation of success. The reasoning for this is combining two set of image data from two different measurements to a single images data for further processing.
Claim(s) 18 is rejected under 35 U.S.C. 103 as being unpatentable over Druml, modified in view of Kubota et al. (US 20170363740 A1, hereinafter “Kubota”).
Regarding claim 18, Druml teaches the distance measuring device of claim 17.
Druml does not teach, wherein the measurement circuit is configured to:
accumulate measurement results at the plurality of measurement points included in the first range;
detect at least one peak of a signal included in the accumulated measurement results; and
decide a distance value at a measurement point of the target from at least one detected peak based on information of reliability.
Kubota disclosed in Fig. 27, paragraph [0177], an example of time-division integrated values saved in the plurality of buffers 354. As shown in Fig. 27, in a buffer n-11, outputs of the plurality of light receiving elements 314 corresponding to reflected light n-2, n-1 and n are accumulated. In a buffer n, outputs of the plurality of light receiving element 314 corresponding to reflected lights n-1, n, and n+1 are accumulated; [0179], the plurality of buffers 354 retain the time-division integration results at the plurality of point in time. Consequently, reliability of a measurement result is calculated. Therefore, it is possible to detect a plurality of peak position at different points in time from one light receiving element 314; [0169]-[0170], subsequently, the measurement processing circuitry 320 calculates, as reliability, a ratio of the magnitude of the peak calculated second and the magnitude of the peak calculated first. When the ratio, which is the reliability, is equal to or larger than a threshold, the measurement processing circuity 320 adopts, as a measured distance, the position of the peak calculated second. When the ratio is smaller than the threshold, the measurement processing circuitry 320 discards the position of the peak.
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of this invention to modify the distance measuring device taught by Druml to include accumulate measurement results at the plurality of measurement points included in the first range, detect at least one peak of a signal included in the accumulated measurement results; and decide a distance value at a measurement point of the target from at least one detected peak based on information of reliability taught by Kubota with a reasonable expectation of success. The reasoning for this is accumulating measurements result, calculating a ratio of the magnitude of the peak in between first and second peak. Compare the ratio of the peak with threshold value to determine if the measurement data is reliable or not for true distance measurement (Kubota; [0169]-[0170]; [0177]-[0179]).
Claim(s) 19 is rejected under 35 U.S.C. 103 as being unpatentable over Druml, modified in view of LaChapelle et al. (US 20180306926 A1, hereinafter “LaChapelle”).
Regarding claim 19, Druml teaches the distance measuring device of claim 13.
Druml does not teach,
further comprising a revolving mirror having two reflecting surfaces, wherein
the revolving mirror is configured to:
reflect a light signal emitted from the light source to an outside; and
reflects the light signal reflected from an external target object to the light detector.
LaChapelle teaches,
further comprising a revolving mirror having two reflecting surfaces (LaChapelle; Fig. 1, Fig. 2, [0086], the scanner 120/162 includes two mirrors 180-1, 180-2 which may be a flat mirror, a curved mirror, or a polygon mirror with two or more reflective surface; [0087], a polygon mirror may have two or more reflective surfaces, and may be continuously rotated in one direction so that the output beam 170 is reflected sequentially from each of the reflective surfaces), wherein
the revolving mirror (LaChapelle; Fig. 1, Fig. 2, [0086]-[0087], mirrors 180-1, 180-2) is configured to:
reflect a light signal emitted from the light source to an outside (LaChapelle; Fig. 1, [0039], the light source 110 emits an output beam of light 125 (passing through scanner 120) reaches the target 130, the target may reflect at least a portion of light (input beam 135) form the output beam 125 return back the lidar system 100. Input beam 135 passes through the scanner 120 and redetected to receiver 145); and
reflects the light signal reflected from an external target object to the light detector (same as above).
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of this invention to modify the distance measuring device taught by Druml to include further comprising a revolving mirror having two reflecting surfaces, wherein the revolving mirror is configured to: reflect a light signal emitted from the light source to an outside; and reflects the light signal reflected from an external target object to the light detector taught by LaChapelle with a reasonable expectation of success. The reasoning for this is using revolving mirror to reflect a light signal emitted from the light source to the target and reflects the light signal reflected back from the target for measuring the distance in between the Lidar sensor and the target (TOF measurement) (LaChapelle; [0039], [0048]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CHIA-LING CHEN/Examiner, Art Unit 3645
/YUQING XIAO/Supervisory Patent Examiner, Art Unit 3645
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