Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/4/2026 has been entered.
Remarks
This Office Action is responsive to Applicants' Amendment filed on June 4, 2026, in which claims 1, 3, 5-8, 10, 12-15, 17, and 19-20 are currently amended. Claims 2, 9, and 16 are canceled. Claims 1, 3-8, 10-15, and 17-20 are currently pending.
Specification
Applicant's amendments made to the specification are acknowledged. Examiner’s objection to the specification are hereby withdrawn, as necessitated by Applicant’s amendments made to the specification.
Response to Arguments
Applicant’s arguments with respect to rejection of claims 1, 3-8, 10-15, and 17-20 under 35 U.S.C. 101 based on amendment have been considered and are persuasive. The rejections to claims 1, 3-8, 10-15, and 17-20 under 35 U.S.C. § 101 are hereby withdrawn, as necessitated by applicant's amendments and remarks made to the rejections.
Applicant’s arguments with respect to rejection of claims 1, 3-8, 10-15, and 17-20 under 35 U.S.C. 102/103 based on amendment have been considered.
With respect to Applicant’s arguments on p. 16 of the Remarks submitted 6/4/2026 that “Gonzales is not directed to post-training verification of an already-trained neural network’s outputs against an STL specification”, Examiner respectfully notes that the instant claims similarly do not appear to be directed to this. In fact, the claim amendments explicitly recite beginning training if a constraint is not met (if the trajectory intersects an unsafe set). Similarly, the instant claims do not appear to be expressly limited to an STL specification.
The remaining arguments are moot in view of a new ground of rejection set forth below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-5, 8, 10-12, 15, and 17-19 are rejected under U.S.C. §103 as being unpatentable over the combination of Gonzalez (US20200379893A1) and Kislovskiy (US20180341571A1).
Regarding claim 1, Gonzalez teaches A testing system, comprising: at least one processor; and at least one memory having a set of instructions, which when executed by the at least one processor, causes the testing system to:([¶0006] "the present disclosure is directed to an apparatus for synthesizing parameters for control of a closed loop system based on a differentiable simulation model of the closed loop system. The apparatus having a memory and one or more processors coupled to the memory." [¶0007] "The program code is executed by a processor and includes program code to determine requirements/specifications for the closed loop system in signal temporal logic (STL)")
identify temporal logic that is associated with a controller of a physical system simulation, ([¶0006] "The processor(s) is configured to determine requirements/specifications for the closed loop system in signal temporal logic (STL)" [¶0024] "a simulation-driven framework to automatically synthesize parameters of control software, including but not limited to cars, airplanes, or robots, such that the overall system satisfies specifications given in signal temporal logic (STL)")
wherein the controller is a first neural network;([¶0026] "The parametric control law may be based on one of a variety of parametric templates including, […] neural networks")
wherein the temporal logic defines one or more of task objectives or safety constraints; and ([¶0044] "The inputs 206 to the closed loop system model 200 are exogenous inputs to the plant model 202 (such as ambient temperature, atmospheric pressure, driver input, pilot commands, etc.), and outputs of the plant model 202 generally include controlled signals of the plant model 202. In general, the closed loop model 200 also has a number of parameters including initial conditions of various state-carrying elements in the model. This includes initial values for memory elements in the controller model 204 and the initial configuration for the physical elements in the plant model 202")
generate a tree representation of the temporal logic, wherein the tree representation corresponds to a maximum and minimum number of computations associated with the temporal logic; ([¶0084] "STL can be represented using a parse tree where each node represents an operation" [¶0108] "This topological ordering of G given ϕ is precisely governed by Oϕ, the post-order traversal of the parse tree generated by ϕ." [¶0126] "the robustness trace can be computed for each term in the robustness formula and the appropriate max and min functions can be taken to obtain the robustness trace for the Until and Then operations. The outputs of the temporal graph are the elements of the robustness trace but in reverse" Gonzales explicitly reformulates STL into a parse tree representation that governs evaluation ordering for the constructed robustness computation graph. Gonzales also ties parse tree traversal into min/max robustness calculation formulas, where the trees operator structure (nodes as operators) corresponds to the number of computations)
generate a second neural network based on the tree representation, the second neural network being different from the first neural network; ([¶0112] "Computing the robustness of these operators rely only on elementary operations, so constructing Gφ (i) is straight-forward. To compute the robustness trace (e.g., construct the graph Gφ), Gφ (i) is repeated over the timed trace. Inspired by recurrent neural networks and their ability to effectively process sequential data, a recurrent computation graph model is used to compute the robustness, and robustness trace of the ⋄ (eventually) and □ (always) operators. This structure can be leveraged and extended to compute the U (Until) and T (Then) operator." [¶0137] "using G and the differentiable approximations. A built-in auto-differentiation functionality in many machine learning (ML) toolboxes can be used to backpropagate on the computation graph" Gonzales explicitly states that computation graph G is a trained recurrent computation graph propagation network inspired by recurrent neural networks such that G is interpreted as the second neural network)
generate a trajectory that is an evolution of states representing a sequence of control instructions generated by the first neural network to guide the physical system simulation over time;([¶0064] "Temporal logic and its many variants (e.g., linear temporal logic (LTL), bounded linear temporal logic (BLTL), linear temporal logic over finite traces (LTLf), metric temporal logic (MTL)) are formalisms for reasoning about timed traces" [¶0065] "A timed trace is a data structure that includes a time-series. Formally, a timed trace s is an ordered finite sequence of states and their associated time" Gonzales defines a timed trace as an "ordered finite sequence of states" over time, which is interpreted as a trajectory. Gonzales then says the closed-loop system includes a controller and plant, and that the "controller provides inputs to the plant" ([¶0051]). Those inputs are the practical control commands/instructions. Gonzales further states that the controller's differentiable control function can be a neural network. So functionally, Gonzales describes simulating a time-evolving sequence of system states, where a neural-network-capable controller generates the inputs that guide the simulated physical system over time.)
generate, with the second neural network, a robustness metric of the first neural network based on the trajectory ([¶0112] "Computing the robustness of these operators rely only on elementary operations, so constructing Gφ (i) is straight-forward. To compute the robustness trace (e.g., construct the graph Gφ), Gφ (i) is repeated over the timed trace. Inspired by recurrent neural networks and their ability to effectively process sequential data, a recurrent computation graph model is used to compute the robustness, and robustness trace of the ⋄ (eventually) and □ (always) operators. This structure can be leveraged and extended to compute the U (Until) and T (Then) operator." [¶0108] "This topological ordering of G given ϕ is precisely governed by Oϕ, the post-order traversal of the parse tree generated by ϕ." Gonzales explicitly uses second neural network G for generating a robustness metric and based on the trajectory (topological ordering governed by first neural network phi). See also FIG. 5C which is visually indistinguishable from a neural network.)
by determining if the trajectory intersects an unsafe set; ([¶0024] "directed to a simulation-driven framework to automatically synthesize parameters of control software, including but not limited to cars, airplanes, or robots, such that the overall system satisfies specifications given in signal temporal logic (STL). For example, signal temporal logic expresses properties, such as, “the system should always avoid bumping into obstacles,” or “the system should not perform action A until event B occurs,” and many others into syntax and semantics." [¶0061] "numerous random simulations are executed, and the backpropagation through time implementation is used to learn to satisfy the STL requirements." Gonzales uses STL rules to check whether the simulated trace satisfies safety requirements. Gonzales then computes a robustness measure at each time step of the simulation trace, where if the rule is violated the robustness measure indicates the violation.)
train the first neural network if the trajectory intersects the unsafe set; ([¶0062] "At block 412, a dynamic constraint solver (e.g., dReach) is used to provide a formal proof that the resulting controller satisfies its specification. At block 414, it is determined whether the proof succeeds. If the proof succeeds, the process is terminated. Otherwise, the process continues to block 406 to continue training the controller. For example, dReach provides an example of a violation, which is used as an example simulation to continue training the controller.").
However, Gonzalez does not explicitly teach and if the trajectory does not intersect the unsafe set, propagate the first neural network to a computing environment.
Kislovskiy, in the same field of endeavor, teaches and if the trajectory does not intersect the unsafe set, propagate the first neural network to a computing environment ([¶0035] "Verification of a software release corresponds to authorization of that software release for use on FAVs without the need for a safety driver. Thus, as described herein, FAVs would only operate using verified software versions [...] thresholds to achieve verification can be determined or adjusted based on simulation results for pre-certification and/or real-world testing, as described herein. In various examples, a given software release may be AV tested over a variety of driving conditions, or a defined set of conditions (e.g., on test tracks)." [¶0036] "Examples described herein may reference software training techniques that correspond to machine learning, neural networks, artificial intelligence, and the like.").
Gonzalez as well as Kislovskiy are directed towards automated control system simulation and safety validation. Therefore, Gonzalez as well as Kislovskiy are analogous art in the same field of endeavor. It would have been obvious before the effective filing date of the claimed invention to combine the teachings of Gonzalez with the teachings of Kislovskiy by deploying the controller after validation/determination of no violations. Kislovskiy provides as additional motivation for combination ([¶0035] “thresholds to achieve verification can be determined or adjusted based on simulation results for pre-certification and/or real-world testing, as described herein. In various examples, a given software release may be AV tested over a variety of driving conditions, or a defined set of conditions (e.g., on test tracks)."). This motivation for combination also applies to the remaining claims which depend on this combination.
Regarding claim 3, the combination of Gonzalez and Kislovskiy teaches The testing system of claim 1, wherein the instructions of the at least one memory, when executed, cause the testing system to: receive, with the second neural network, the trajectory from the first neural network(Gonzalez [¶0138] "Implementation two shows how G can be used to solve for pSTL parameters. This is a gradient descent algorithm where the termination criteria depends on the true value of ρ and the gradient, and the relaxation parameter w is annealed over each iteration so that towards the end of the optimization process, the approximation of the max and min functions are more exact. As the parameter w increases or becomes larger, the softmax function more closely approximates the max function.").
Regarding claim 4, the combination of Gonzalez and Kislovskiy teaches The testing system of claim 3, wherein the instructions of the at least one memory, when executed, cause the testing system to: control the physical system simulation with the first neural network.(Gonzalez [¶0026] "The parametric control law may be based on one of a variety of parametric templates including, […] neural networks" [¶0044] "The inputs 206 to the closed loop system model 200 are exogenous inputs to the plant model 202 (such as ambient temperature, atmospheric pressure, driver input, pilot commands, etc.), and outputs of the plant model 202 generally include controlled signals of the plant model 202. In general, the closed loop model 200 also has a number of parameters including initial conditions of various state-carrying elements in the model. This includes initial values for memory elements in the controller model 204 and the initial configuration for the physical elements in the plant model 202").
Regarding claim 5, the combination of Gonzalez and Kislovskiy teaches The testing system of claim 1, wherein the first neural network is a continuous time feedback control system.(Gonzalez [¶0027] "the differential simulation model is a continuous-time model" [¶0059] "it is assumed that the model of the physical component (e.g., the plant 416 and the controller illustrated in FIG. 4B) is available as a differentiable model. This is possible if either the plant model is a continuous-time model, x′=f(x, u) (as shown in FIG. 4B), or if it is given as a discrete update equation that is nonetheless differentiable.").
Regarding claims 8 and 10-12, claims 8 and 10-12 are substantially similar to claims 1 and 3-5. Therefore, the rejections to claims 1 and 3-5 also apply to claims 8 and 10-12.
Regarding claims 15 and 17-19, claims 15 and 17-19 are directed towards the method performed by claims 1 and 3-5. Therefore, the rejections applied to claims 1 and 3-5 also apply to claims 15 and 17-19.
Claims 6 and 13 are rejected under U.S.C. §103 as being unpatentable over the combination of Gonzalez and Kislovskiy and in further view of Akella (“Disturbance Bounds for Signal Temporal Logic Task Satisfaction: A Dynamics Perspective”, 2018).
Regarding claim 6, the combination of Gonzalez and Kislovskiy teaches The testing system of claim 1, wherein the instructions of the at least one memory, when executed, cause the testing system to: verify if the first neural network satisfies the temporal logic; and (Gonzalez [¶0023] "By using computation graphs, state-of-the-art machine learning tools are leveraged to create an efficient framework for evaluating the robustness of STL formulas." See also FIG. 4A. The robustness is a verification metric to verify the controller (the neural network) against the STL specification (temporal logic).).
However, the combination of Gonzalez and Kislovskiy doesn't explicitly teach if the first neural network does not satisfy the temporal logic, execute a Lipschitz constant analysis to verify whether the first neural network implements the temporal logic..
Akella, in the same field of endeavor, teaches if the first neural network does not satisfy the temporal logic, execute a Lipschitz constant analysis to verify whether the first neural network implements the temporal logic.([Abstract] "When these disturbances enter the dynamics linearly, however, our work determines a two-norm disturbance-bound rejectable by a system’s controller without requiring specific knowledge of these disturbances beforehand" [p. 1 §1] "Our contribution is twofold. First, we construct two optimization problems that each generate two-norm disturbance-bounds rejectable by a system’s controller while it steers its system to satisfy its specification. Each optimization problem focuses on a specific subset of Signal Temporal Logic, and we use their solutions to construct our system-level bound. Secondly, we show that our generated bound is accurate albeit conservative, as it depends on Lipschitz constants for the system dynamics and specification").
The combination of Gonzalez and Kislovskiy as well as Akella are directed towards improving robustness of STL controllers. Therefore, the combination of Gonzalez and Kislovskiy as well as Akella are analogous art in the same field of endeavor. It would have been obvious before the effective filing date of the claimed invention to combine the teachings of the combination of Gonzalez and Kislovskiy with the teachings of Akella by using a Lipschitz constant analysis to quantify and certify the maximum allowable disturbance under which the STL controller satisfies the specification. Akella provides as additional motivation for combination ([Abstract] “determination of such a disturbance bound offers a better understanding of the robustness with which a given controller achieves a specified task”). This motivation for combination also applies to the remaining claims which depend on this combination.
Regarding claim 13, claim 13 is substantially similar to claim 6. Therefore, the rejection applied to claim 6 also applies to claim 13.
Claims 7 and 14 are rejected under U.S.C. §103 as being unpatentable over the combination of Gonzalez and Kislovskiy and Ghosh (US11651227B2).
Regarding claim 7, the combination of Gonzalez and Kislovskiy teaches The testing system of claim 1.
However, the combination of Gonzalez and Kislovskiy doesn't explicitly teach, wherein: the first neural network is a deep neural network
the second neural network is a rectified linear activation function Feed Forward Neural Network.
Ghosh, in the same field of endeavor, teaches the first neural network is a deep neural network([Col. 10 l. 16-3] "CNN+DNN 242 may be made up of one or more ReLu-activated convolutional layers and one or more ReLu-activated dense layers" CNN and DNN with dense layers interpreted as feed forward neural networks)
the second neural network is a rectified linear activation function Feed Forward Neural Network. ([Col. 10 l. 16-3] "CNN+DNN 242 may be made up of one or more ReLu-activated convolutional layers and one or more ReLu-activated dense layers" CNN and DNN with dense layers interpreted as feed forward neural networks).
The combination of Gonzalez and Kislovskiy as well as Ghosh are directed towards using neural networks as a controller for STL systems. Therefore, the combination of Gonzalez and Kislovskiy as well as Ghosh are analogous art in the same field of endeavor. It would have been obvious before the effective filing date of the claimed invention to combine the teachings of the combination of Gonzalez and Kislovskiy with the teachings of Ghosh by using a deep feedforward neural network (DNN) with Relu activation. While one of ordinary skill in the art would recognize that neural networks are predominantly feedforward and Relu activations are very common, Ghosh provides as additional motivation for combination ([Col. 4 l. 9-24] "the deep neural network model can satisfy safety constraints or other constraints inherent to the system domain for a system that uses the deep neural network model. Improving the likelihood that constraints will be satisfied by the model, in operation, may provide certain guarantees of operations by the system resulting in an improved likelihood of reliable and trusted operation."). This motivation for combination also applies to the remaining claims which depend on this combination.
Regarding claim 14, claim 14 is substantially similar to claim 7. Therefore, the rejection applied to claim 7 also applies to claim 14.
Claim 20 is rejected under U.S.C. §103 as being unpatentable over the combination of Gonzalez, Kislovskiy, Akella, and Ghosh.
Regarding claim 20, the combination of Gonzalez and Kislovskiy teaches The method of claim 15, further comprising: verifying if the first neural network satisfies the temporal logic; and(Gonzalez [¶0023] "By using computation graphs, state-of-the-art machine learning tools are leveraged to create an efficient framework for evaluating the robustness of STL formulas." See also FIG. 4A. The robustness is a verification metric to verify the controller (the neural network) against the STL specification (temporal logic).)
wherein the first neural network is a Deep Neural Network and(Gonzalez [Col. 10 l. 16-3] "CNN+DNN 242 may be made up of one or more ReLu-activated convolutional layers and one or more ReLu-activated dense layers" CNN and DNN with dense layers interpreted as feed forward neural networks).
However, the combination of Gonzalez and Kislovskiy doesn't explicitly teach if the first neural network does not satisfy the temporal logic, executing a Lipschitz constant analysis to verify whether the first neural network implements the temporal logic,
wherein the second neural network is a rectified linear activation function Feed Forward Neural Network.
Akella, in the same field of endeavor, teaches if the first neural network does not satisfy the temporal logic, executing a Lipschitz constant analysis to verify whether the first neural network implements the temporal logic,([Abstract] "When these disturbances enter the dynamics linearly, however, our work determines a two-norm disturbance-bound rejectable by a system’s controller without requiring specific knowledge of these disturbances beforehand" [p. 1 §1] "Our contribution is twofold. First, we construct two optimization problems that each generate two-norm disturbance-bounds rejectable by a system’s controller while it steers its system to satisfy its specification. Each optimization problem focuses on a specific subset of Signal Temporal Logic, and we use their solutions to construct our system-level bound. Secondly, we show that our generated bound is accurate albeit conservative, as it depends on Lipschitz constants for the system dynamics and specification").
The combination of Gonzalez and Kislovskiy as well as Akella are directed towards improving robustness of STL controllers. Therefore, the combination of Gonzalez and Kislovskiy as well as Akella are analogous art in the same field of endeavor. It would have been obvious before the effective filing date of the claimed invention to combine the teachings of the combination of Gonzalez and Kislovskiy with the teachings of Akella by using a Lipschitz constant analysis to quantify and certify the maximum allowable disturbance under which the STL controller satisfies the specification. Akella provides as additional motivation for combination ([Abstract] “determination of such a disturbance bound offers a better understanding of the robustness with which a given controller achieves a specified task”). This motivation for combination also applies to the remaining claims which depend on this combination.
However, the combination of Gonzalez and Kislovskiy as well as Akella does not explicitly disclose wherein the second neural network is a rectified linear activation function Feed Forward Neural Network.
Ghosh, in the same field of endeavor, teaches wherein the second neural network is a rectified linear activation function Feed Forward Neural Network. ([Col. 10 l. 16-3] "CNN+DNN 242 may be made up of one or more ReLu-activated convolutional layers and one or more ReLu-activated dense layers" CNN and DNN with dense layers interpreted as feed forward neural networks).
The combination of Gonzalez, Kislovskiy, and Akella as well as Ghosh are directed towards using neural networks as a controller for STL systems. Therefore, the combination of Gonzalez, Kislovskiy, and Akella as well as Ghosh are analogous art in the same field of endeavor. It would have been obvious before the effective filing date of the claimed invention to combine the teachings of the combination of Gonzalez, Kislovskiy, and Akella with the teachings of Ghosh by using a deep feedforward neural network (DNN) with Relu activation. While one of ordinary skill in the art would recognize that neural networks are predominantly feedforward and Relu activations are very common, Ghosh provides as additional motivation for combination ([Col. 4 l. 9-24] "the deep neural network model can satisfy safety constraints or other constraints inherent to the system domain for a system that uses the deep neural network model. Improving the likelihood that constraints will be satisfied by the model, in operation, may provide certain guarantees of operations by the system resulting in an improved likelihood of reliable and trusted operation."). This motivation for combination also applies to the remaining claims which depend on this combination.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Farabet (US20190303759A1) is directed towards training, validation, and deployment of autonomous vehicle control systems through simulation.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Miranda Huang can be reached on (571)270-7092. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SIDNEY VINCENT BOSTWICK/Examiner, Art Unit 2124