DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 7, 8, 10, and 22-24 are rejected under 35 U.S.C. 103 as being unpatentable over Kanouda et al. (7,049,711) and Kitagawa et al. (2001/0020802).
Regarding independent claim 1, Kanouda teaches a device (Fig. 5), comprising:
a high-side switching element (10) coupled between a switching terminal (c) and an output voltage terminal (a);
a transistor (82) coupled between an input voltage terminal (below 82) and the switching terminal (c) ;
a low-side switching element (83) coupled to the switching terminal ((c) via switch 82) and a ground terminal (below 83), the low-side switching terminal element including a low-side switching element control terminal; and
a controller (12 and 13) including plural control parameter terminals (i.e. detecting voltage at (a); and the teachings around the parameters of Fig. 3; the controller needs to know these various voltages to control the system effectively), a high-side control terminal, a transistor control terminal, and a low-side control terminal, the low-side control terminal coupled to the low-side switching element control terminal, the high-side control terminal coupled to a control terminal of the high-side switching element, and the transistor control terminal coupled to a control terminal of the transistor (Col. 4, lines 7-12, 26-31).
Kanouda also teaches the controller including first and third control circuits (inside 12 and 13), the first control circuit capable of controlling the low-side switching element to provide a backup battery charging mode (Col. 4, lines 24-30), and the third control circuit capable of controlling the low-side and high-side switching elements to provide a boost converter mode (Col. 6, lines 1-21). Kanouda fails to explicitly teach a second control circuit. Kitagawa teaches a similar power system (Figs. 1 and 5) to that of Kanouda. Kitagawa teaches a second control circuit (inside 5 and 6) capable of controlling the switches in the charge/discharge circuit (4) to provide a backup battery health monitoring mode ([0035], [0037], [0062]; Kitagawa teaches always being in a backup battery health monitoring mode). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a second control circuit into Kanouda’s invention to monitor the health of the backup battery to make sure that it is functioning properly and capable of storing and providing the desired levels of power.
Kanouda teaches controlling the charging/discharging of their system based on the parameters discussed in Fig. 3, including the voltage at switch terminal (c) (Col. 5, lines 45-53), but fails to explicitly teach a switching input terminal coupled to the switch terminal (c). Kitagawa teaches detecting parameters on a charging line (i.e. at Kanouda’s switch terminal) ([0035]; which would mean a switching input terminal at a controller is connected to the switch terminal in Kanouda’s invention to detect the voltage at that point). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a switching input terminal at Kanouda’s controller and it being connected to the switching terminal to be able to detect the voltage at the switching terminal so that Kanouda’s controller can know how to control the charge/discharge circuit most effectively.
Regarding claim 7, Kitagawa teaches the controller including a mode detection circuit capable of determining if a backup battery of a power system has an output voltage or resistance within a target range and setting a status output signaling if the output voltage is within the target range ([0037]; sends status output signal to (5) based on backup battery output voltage).
Regarding claim 8, Kanouda teaches the mode detection circuit (12) is capable of determining if a primary power source (i.e. the DC output at (a)) of the power system has an output voltage within a target range and setting a status output signal representing whether the output voltage is within the target range (Figs. 1 and 2; Col. 4, lines 7-12 and 31-54; status output signal to switch (10)). Kitagawa also teaches a primary power source (1; Fig. 1) outputting a DC power, but they both fail to explicitly teach the primary power source being a battery. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute a battery into Kanouda’s invention for their DC primary power source, since it involves a mere simple substitution for one DC power source for another to perform the same function of outputting primary DC power to the power system.
Regarding claim 9, Kanouda teaches the low-side switching element coupled between a ground terminal and the switching node terminal, wherein a control terminal of the low-side switching element is coupled to the low-side switching element control terminal (Fig. 5).
Regarding claim 10, Kanouda fails to explicitly teach the power system being on an integrated circuit package, however, it would have been an obvious matter of design choice to implement the power system on an integrated circuit package, since such a modification would have involved a mere change in the size of a component, and change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Regarding claim 22, Kanouda teaches one of the (i.e. second) controller parameter terminals capable of receiving a target charging voltage parameter (i.e. a voltage not to exceed voltage at (c)), used by the first control circuit as a reference voltage (Col. 5, lines 45-53).
Regarding claim 23, Kitagawa teaches a third control parameter terminal is capable of receiving a discharge current reference parameter (based on the power needed and voltage supplied (current = power/voltage), used by the second control circuit as a reference current ([0037]) .
Regarding claim 24, Kanouda and Kitagawa teach (with reference to claims 7 and 8 above) detecting the status of the primary and backup sources/batteries, and outputting a set status of the output voltage of each, and those status outputs determines which control circuit to enable (i.e. enable the third control circuit based on the failed status of primary source and the voltage of the backup battery into boost converter mode).
Claim(s) 4, 5, 11-14, 16, 19, and 26-31 are rejected under 35 U.S.C. 103 as being unpatentable over Kanouda et al. (7,049,711) and Kitagawa et al. (2001/0020802) as applied to claim 1 above, and further in view of Matty et al. (2006/0186857). Kanouda and Kitagawa teach the device as described above.
Regarding claim 4, Kanouda and Kitagawa fail to explicitly teach the controller receiving configurable current limit parameters. Matty teaches a similar battery charge/discharge circuit (Fig. 1) to that of Kanouda. Matty teaches the controller having a controller parameter terminal capable of receiving configurable current limit parameters ([0067]; “preset current values”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Matty’s current limit parameters into Kanouda’s invention to make sure the current levels in Kanouda’s invention aren’t exceeded so that the elements in Kanouda’s invention won’t breakdown due to the current levels being too high.
Regarding claim 5, Kanouda and Kitagawa fail to explicitly teach a scaling circuit. Matty teaches a controller including a scaling circuit having one or more scaling circuit inputs and a scaling circuit output, the one or more scaling circuit inputs coupled to the one or more control parameter terminals (for sensing the current), the scaling output determined by the control parameter terminal and an enabled mode of the controller (i.e. battery charging), and the scaling circuit output coupled to the transistor control terminal to control the transistor to provide the variable resistance ([0065], [0067]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a scaling circuit for the variable resistance transistor in Kanouda’s invention, since it allows for extra control by limiting the current that is allowed to flow to the battery by varying/scaling the resistance.
Regarding independent claim 11, and dependent claims 12, 13, and 25, Kanouda, Kitagawa, and Matty teach the circuit configuration of independent claim 11, as described above in claims 1 and 5, including a low-side switching element (83), a high-side switching element (10), a transistor (82) providing a variable resistance (as described in Matty), a scaling circuit, and controller (12 and 13). Kanouda and Kitagawa also teach the first, second, and third control circuits, controlling/using the switching elements and the transistor to provide backup battery charging and health monitoring modes and boost converter mode.
Regarding claim 14, Matty teaches the controller receiving a control parameter (i.e. current), and the controller is capable of controlling the transistor based on the control parameter, to provide the variable resistance ([0067]).
Regarding claim 16, Matty teaches the controller is capable of:
responsive to the control parameter being within a first range (i.e. below the current preset value), applying a first control signal to a gate of the transistor; and
responsive to the control parameter being within a second range (i.e. above the current preset value), applying a second control signal to the gate of the transistor, the second control signal having a potential that is different from that of the first control signal. ([0067])
Regarding claim 19, this it taught above with respect to claim 10.
Regarding claims 26 and 27, Kanouda and Kitagawa teach the controller including a mode detection circuit, the mode detection circuit, responsive to determining that a backup battery of the power system has an output voltage and/or internal resistance outside a target range (i.e. the status of the backup battery), enable the backup battery charging mode (Kitagawa at [0062]).
Regarding claims 28 and 29, Kanouda and Kitagawa teach the controller including a mode detection circuit, the mode detection circuit, responsive to determining that a primary power source of the power system has an output voltage and/or internal resistance (that causes the output voltage to be) outside a target range, enable the boost converter mode (Kanouda at Col. 6, lines 1-21).
Regarding claims 30 and 31, Kanouda and Kitagawa teach the controller including a mode detection circuit, the mode detection circuit, responsive to determining that the backup battery and the primary battery each has an output voltage and/or internal resistance within a corresponding target range, enable the backup battery health monitoring mode (Kitagawa teaches the system always being in backup battery health monitoring mode, as described above, but specifically in this case at [0062], after the battery is fully charged).
Claim(s) 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Kanouda et al. (7,049,711), Kitagawa et al. (2001/0020802), and Matty et al. (2006/0186857) as applied to claims 1, 4, 5, 11, and 14 above, and further in view of Butz et al. (2019/0111249). Kanouda, Matty, and Kitagawa teach the power system and method as described above. They fail to explicitly teach the transistor that provides a variable resistance comprising a plurality of transistors in parallel.
Butz teaches a similar current limiting/variable resistance element (Figs. 4 and 5; RL1 or RL2 or RSD1 or RSD2) to that of the transistor of the Kanouda/Kitagawa/Matty combination. Butz teaches the idea of the current limiting/variable resistance element comprising multiple transistors in parallel selectively being switched conducting or non-conducting in order to present a specific resistance to limit the current ([0141]-[0142]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the transistor of the Kanouda/Kitagawa/Matty combination to comprise multiple transistors in parallel, controlled by the scaling circuit via multiple gate signals, to selectively turn on a single transistor at a time, based on the determined resistance needed to limit the current (i.e. control parameter) in the desired way based on any given embodiment of the invention (i.e. design choice).
Response to Arguments
Applicant's arguments filed April 15, 2026 have been fully considered but they are not persuasive. The Examiner believes that the Kanouda reference still teaches the amendment to claim 1 (formerly claim 9). The Examiner believes that the Applicant is not giving the claim its broadest reasonable interpretation.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DRU M PARRIES whose telephone number is (571)272-8542. The examiner can normally be reached on Monday -Thursday from 9:00am to 6:00pm. The examiner can also be reached on alternate Fridays.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Rexford Barnie, can be reached on 571-272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
DMP
4/30/2026
/DANIEL KESSIE/Primary Examiner, Art Unit 2836
Prosecution Insights