DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election without traverse of Species II, Figures 15 – 21, corresponding claims 1 – 17, 20 – 22 and 24 – 26 in the reply filed on October 28, 2025 is acknowledged.
Priority
The priority has been considered by the examiner. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The references cited in the Information Disclosure Statement (IDS) submitted on February 21, 2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered and accepted by the examiner.
Drawings
The drawing submitted on February 21, 2023, has been considered and accepted by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4 – 11, 24 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Yoshi Naonobu et al. (JP2018106973, Applicant submitted in the IDS, filed on February 21, 2023 and examiner submitted an English translation) in view of Mitsuyama et al. (US20090321777), further in view of Tanaka et al. (US 2013/0194165, Applicant submitted in the IDS, filed on February 21, 2023).
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Regarding claim 1, Naonobu disclose a semiconductor light-emitting device comprising:
a wiring substrate (see Figures 1 and 2, characters 40 (LED mounting substrate), 30B (inner bottom surface of a case (30) in the peripheral section of the substrate) and paragraphs [0022 and 0028 – 0029], the LED mounting substrate include 41 (wiring board) and 42 (LED element));
a semiconductor light-emitting element (see Figures 1 and 2, character 42 (LED element) the LED element is provided on the upper surface of the wiring board ) disposed above an upper surface of the wiring substrate; and
a cap unit (see Figures 1 and 2, characters 30 (housing) and 50 (first optical sheet), Abstract, and paragraphs [0024 – 0027], the housing include 31 (housing body) and 32 (frame-shaped lid of the housing (30)), so as to surround an outer peripheral surface of the wiring board and that is provided on the upper surface of the wiring board to cover the semiconductor light-emitting element) which is disposed above the upper surface of the wiring substrate (see Figures 1 and 2, characters 40 and 30B) and covers the semiconductor light-emitting element (see Figures 1 and 2, character 42),
wherein the wiring substrate (see Figures 1 and 2, characters 40 and 30B) includes:
a first substrate (see Figures 1 – 3, character 41 (wiring board) and 30B (inner bottom surface of the housing (30) in the peripheral section of the wiring board) and paragraphs [0028 – 0029]);
a first metal layer (see paragraph [0066], the terminal is provided on the first substrate); and
a spacer layer (see Figures 1 – 4, character 60)
the cap unit (see Figures 1 and 2, character 30 and 50) includes a bonding surface (see Figure 3, characters 111 and 112 (double-side tape) and paragraphs [0070 – 0071], the bottom surface (60B) of the first spacer (60) and the inner bottom surface (30B) of the housing (30) are fixed by being adhered with double-sided tape (111) and first spacer (60) and the first optical sheet (50) may be fixed together using an adhesive or a pressure sensitive adhesive instead of the double-sided tape (112)) which is bonded to the wiring substrate (see Figures 1 and 2, characters 40 and 30B), the bonding surface (see Figure 3, characters 111 and/or 112) intersecting the first metal layer (see paragraph [0066]) in a top view of the wiring substrate (see Figures 3 and 4), and
the spacer layer (see Figure 3, character 60) is disposed between the bonding surface (see Figure 3, characters 111 and 112) and the first substrate (see Figures 2 and 3, characters 41 and 30B), at a position different from positions of the first metal layer (see Figure 4 and paragraph [0066], indicates that the first spacer 60 is in a frame shape having a "break" and that the "break" is provided for connection with a terminal and the like. Therefore, the configuration shown in Figures 1 – 4 is provided with the feature of "the spacer layer being provided between the bonding surface and the first substrate at a position different from that of the metal layer").
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Naonobu discloses the claimed invention except for second metal layer that are spaced apart from each other above the first substrate. Mitsuyama teaches a two metal films (see Figure 3, character 107A). However, it is well known in the art to apply and/or modify the two metal films as discloses by Mitsuyama in (see Figure 3). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the two metal films as suggested to the device of Naonobu, to provide conductivity and so that a heat radiation characteristic can be enhanced.
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Naonobu discloses the claimed invention except for a spacer layer disposed above the first substrate. Tanaka teaches a spacer layer (see Figure 1, character 6) disposed above the substrate (see Figure 1, character 2). However, it is well known in the art to modify the spacer layer disposed above the substrate as discloses by Tanaka in (see Figure 1). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to modify the spacer layer disposed above the substrate as suggested to the device of Naonobu, It can be used to prevent the laser and the substrate from being in direct contact.
Regarding claim 4, Naonobu, Mitsuyama and Tanaka, Naonobu disclose the cap unit (see Figures 1 and 2, characters 30 and 50) includes a top plate (see Figures 1 and 2, character 50) which is rectangular (see Figure 1), and four side walls each connected to a corresponding one of four sides at a peripheral edge of the top plate (see Figures 1 and 2 show a top plate (50) and the housing (30), including 31 (housing body) and 32 (frame-shaped lid of the housing (30)). Figure 1 shows that the housing body (31) and the frame body (32) have four walls, and figures 1 and 2 shown these walls are at a peripheral edge of the top plate (50)).
Regarding claim 5, Naonobu, Mitsuyama and Tanaka disclose the four side walls are bonded to the wiring substrate above the spacer (see claims 1 and 4 rejections).
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Regarding claim 6, Naonobu and Mitsuyama discloses the claimed invention except for the wiring substrate further includes a first insulating layer disposed above the upper surface of the first substrate, and the first metal layer, the second metal layer, and the spacer layer are disposed above the first insulating layer. Tanaka teaches an insulating layer (see Figure 5C, character 25, the reference called “Interlayer insulating film”). However, it is well known in the art to apply the insulating layer as discloses by Tanaka in (see Figure 5C and paragraphs [0057 and 0065]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply the insulating layer as suggested to the device of Naonobu and Mitsuyama, in order to provide insulation, acts as a barrier to reduce heat transfer, maintaining desired temperatures by slowing conduction, convection, and radiation.
Regarding claims 7 and 8, Naonobu, Mitsuyama and Tanaka, Naonobu disclose the first substrate (see Figures 1 – 3, character 41) is a metal substrate (see paragraph [0056) and a lower surface of the first substrate (see Figures 1 – 3, character 41) is a heat-dissipating surface (see paragraphs [0056 and 0125], that a metal foil to radiate heat is provided on the "wiring board 41", which is also part of the first substrate).
Regarding claim 9, Naonobu, Mitsuyama and Tanaka, Tanaka disclose the first insulating layer (see Figure 5C, character 25) includes an opening (see Figure 5C) the semiconductor light-emitting element (see Figure 5C, character 11) is disposed in the opening (see Figure 5C).
Regarding claim 10, Naonobu, Mitsuyama and Tanaka, Naonobu disclose in the top view of the wiring substrate (see Figures 1 and 2, characters 40 and 30B),
the bonding surface (see Figure 3, characters 111 and 112) surrounds the semiconductor light- emitting element (see Figure 3, character 42), and
the spacer layer (see Figures 2 and 3, character 60) is disposed along the bonding surface (see Figure 3, characters 111 and 112) and surrounds the semiconductor light-emitting element (see Figure 3, character 42).
Regarding claim 11, Naonobu and Mitsuyama discloses the claimed invention except for a second insulating layer that covers at least one of a portion of the first metal layer, a portion of the second metal layer, or a portion of the spacer layer. Tanaka teaches an insulating layer (see Figure 5C, character 31, the reference called “Interlayer insulating film”). However, it is well known in the art to apply the insulating layer as discloses by Tanaka in (see Figure 5C and paragraphs [0063]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply the insulating layer as suggested to the device of Naonobu and Mitsuyama, in order to provide insulation, acts as a barrier to reduce heat transfer, maintaining desired temperatures by slowing conduction, convection, and radiation.
Regarding claim 24, Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for the first substrate includes a slanted cut surface at an end portion. It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the first substrate includes a slanted cut surface at an end portion to the device of Naonobu, Mitsuyama and Tanaka, it would have been an obvious matter of design choice bounded by well-known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular dimensions because applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 25, Naonobu and Mitsuyama discloses the claimed invention except for a heat sink on which the semiconductor light-emitting device is disposed; and a fixing screw that fixes the semiconductor light-emitting device to the heat sink, wherein the wiring substrate includes a through-hole, and the fixing screw penetrates through the through-hole and is fixed to the heat sink. Tanaka teaches a heat sink, fixing screw and through-hole. However, it is well known in the art to apply the heat sink, fixing screw and through-hole as discloses by Tanaka in (see paragraphs [0037]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply heat sink, fixing screw and through-hole as suggested to the device of Naonobu and Mitsuyama, the heat sink could be used to prevents from overheating by absorbing and dissipating excess thermal energy into the surrounding medium. The fixing screw and the through-hole, it could be used to secure elements of the device, preventing them from moving.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Yoshi Naonobu (JP2018106973, Applicant submitted in the IDS, filed on February 21, 2023 and examiner submitted an English translation) in view of Mitsuyama et al. (US20090321777), further in view of Tanaka et al. (US 2013/0194165, Applicant submitted in the IDS, filed on February 21, 2023), further in view of Minamio et al. (US 2009/0086769).
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Regarding claim 2, Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for the semiconductor light-emitting element includes an optical waveguide that extends in a direction parallel to an upper surface of the first substrate. Minamio teaches an optical waveguide (see Figure 4, character 19) . However, it is well known in the art to apply and/or modify the optical waveguide as discloses by Minamio in (see Figure 4 and paragraph [0055]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the optical waveguide as suggested to the device of Naonobu, Mitsuyama and Tanaka, it could be used to guides electromagnetic waves (e.g. light or beam). Its primary function is to transport light with minimal energy loss.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Yoshi Naonobu (JP2018106973, Applicant submitted in the IDS, filed on February 21, 2023 and examiner submitted an English translation) in view of Mitsuyama et al. (US20090321777), further in view of Tanaka et al. (US 2013/0194165, Applicant submitted in the IDS, filed on February 21, 2023), further in view of Nishikawa (US 2006/0292720).
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Regarding claim 3, Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for the semiconductor light emitting device include a submount disposed between the wiring substrate and the semiconductor light emitting device and the semiconductor light emitting element includes an emission surface with protrudes from an end surface of the submount. Nishikawa teaches a submount (see Figures 1 and 2, character 102) and the semiconductor light emitting element (see Figures 1 and 2, character 101) includes an emission surface with protrudes (see Figure 1 and 2) from an end surface of the submount (see Figures 1 and 2, character 102). However, it is well known in the art to apply the submount and the semiconductor light emitting element includes an emission surface with protrudes from an end surface of the submount. as discloses by Nishikawa in (see Figure 1 and 2, and paragraph [0037]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply the submount and the semiconductor light emitting element includes an emission surface with protrudes from an end surface of the submount as suggested to the device of Naonobu, Mitsuyama and Tanaka, the submount it could be used to mount the semiconductor laser element and the protrusion it could be used to prevent the light emitted from the light emitting point from being blocked by the submount..
Claims 12 – 17 are rejected under 35 U.S.C. 103 as being unpatentable over Yoshi Naonobu (JP2018106973, Applicant submitted in the IDS, filed on February 21, 2023 and examiner submitted an English translation) in view of Mitsuyama et al. (US-20090321777), further in view of Tanaka et al. (US 2013/0194165, Applicant submitted in the IDS, filed on February 21, 2023), further in view of Arai et al. (WO 2011142059, Applicant submitted in the IDS, filed on February 21).
Regarding claims 12 and 13 Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for the spacer layer comprises a metal material and spacer layer comprises a material that one of the first metal layer or the second metal layer comprises, and is electrically connected to the one of the first metal layer or the second metal layer. Arai teaches a spacer is made of metal. However, it is well known in the art to apply and/or modify the spacer comprises a metal material as discloses by Arai in (see page 5, paragraph 7th, first line). Therefore, would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the spacer layer comprises a metal material to the device of Naonobu, Mitsuyama and Tanaka, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
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Regarding claims 14 and 15, Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for one of the four side walls is a light-transmissive window including an inorganic light-transmissive plate and an antireflection film disposed on the inorganic light-transmissive plate, and emitted light from the semiconductor light-emitting element passes through the light-transmissive window and the top plate is transparent. Arai teaches a cover member (see Figure 1B, character 130, (correspond to the "top" and the "light transmitting window” made of glass provided with an antireflective film)). However, it is well known in the art to apply the cover member as discloses by Arai in (see Figure 1B and page 5th, paragraph 8th). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the cover member as suggested to the device of Naonobu, Mitsuyama and Tanaka, in order the light or output beam can be exit, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claims 16 and 17, Naonobu, Mitsuyama and Tanaka, Naonobu disclose a gap (see Figures 2 and 3) between the light-transmissive window (see claim 14 rejection) and an emission surface of the semiconductor light-emitting element (see Figures 1 – 3, character 42)
Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for a gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element is greater than zero and less than a thickness of the light- transmissive window and among the four side walls, side walls other than the light- transmissive window each have a thickness greater than the thickness of the light-transmissive window. It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the a gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element is greater than zero and less than a thickness of the light- transmissive window and among the four side walls, side walls other than the light- transmissive window each have a thickness greater than the thickness of the light-transmissive window to the device of Naonobu, Mitsuyama and Tanaka, to provide a compact device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In addition, the selection of gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element and the side walls thickness, it’s obvious because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and In re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious).
Note that the specification contains no disclosure of either the critical nature of the claimed [a gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element is greater than zero and less than a thickness of the light- transmissive window and among the four side walls, side walls other than the light- transmissive window each have a thickness greater than the thickness of the light-transmissive window] or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen [a gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element is greater than zero and less than a thickness of the light- transmissive window and among the four side walls, side walls other than the light- transmissive window each have a thickness greater than the thickness of the light-transmissive window] or upon another variable recited in a claim, the Applicant must show that the chosen [a gap between the light-transmissive window and an emission surface of the semiconductor light-emitting element is greater than zero and less than a thickness of the light- transmissive window and among the four side walls, side walls other than the light- transmissive window each have a thickness greater than the thickness of the light-transmissive window] are critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claims 20 – 22 are rejected under 35 U.S.C. 103 as being unpatentable over Yoshi Naonobu (JP2018106973, Applicant submitted in the IDS, filed on February 21, 2023 and examiner submitted an English translation) in view of Mitsuyama et al. (US-20090321777), further in view of Tanaka et al. (US 2013/0194165, Applicant submitted in the IDS, filed on February 21, 2023), further in view of Ooike (JP2004087543, Applicant submitted in the IDS, filed on February 21, 2023).
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Regarding claims 20 – 22, Naonobu, Mitsuyama and Tanaka discloses the claimed invention except for a functional element disposed above the wiring substrate. the functional element is covered by the cap unit and the functional element is a temperature sensing element. Ooike teaches a the functional element is a temperature sensing element (see Figure 1, characters 37 and/or 47, the reference called “temperature sensors”) and wherein the functional element (see Figure 1, characters 37 and/or 47) is covered by the cap unit (see Figure 1, character 11, the reference called “package”) . However, it is well known in the art to apply and/or modify the functional element is a temperature sensing element and wherein the functional element is covered by the cap unit as discloses by Ooike in (see Figure 1 and paragraphs [0013 and 0016]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the functional element is a temperature sensing element and wherein the functional element is covered by the cap unit as suggested to the device of Naonobu, Mitsuyama and Tanaka, to detects, measures, and converts physical heat or cold into readable electrical signals (voltage or resistance).
Allowable Subject Matter
Claim 26 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 26 recites a light source device structure including the specific structure limitation of a cable including a terminal; and a terminal fixing screw, wherein the wiring substrate includes an extraction electrode electrically connected to the first metal layer, the extraction electrode includes an electrode through- hole at a center portion, the terminal fixing screw penetrates through the electrode through-hole, the terminal is disposed between the terminal fixing screw and the extraction electrode, and the extraction electrode and the terminal are electrically connected to each other, which is neither anticipated or neither disclosed nor suggested in any piece of available prior art, which is neither anticipated nor obvious over the prior art of record.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Delma R. Forde whose telephone number is (571)272-1940. The examiner can normally be reached M - TH 7:00 AM - 4:00 PM.
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/Delma R Forde/Examiner, Art Unit 2828
/XINNING(Tom) NIU/Primary Examiner, Art Unit 2828