Prosecution Insights
Last updated: April 19, 2026
Application No. 18/172,994

MULTIPLE BMC LOAD SHARING SYSTEM AND METHOD

Final Rejection §103§DP
Filed
Feb 22, 2023
Examiner
HUARACHA, WILLY W
Art Unit
2197
Tech Center
2100 — Computer Architecture & Software
Assignee
DELL PRODUCTS, L.P.
OA Round
2 (Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
4y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
300 granted / 410 resolved
+18.2% vs TC avg
Strong +53% interview lift
Without
With
+53.4%
Interview Lift
resolved cases with interview
Typical timeline
4y 5m
Avg Prosecution
28 currently pending
Career history
438
Total Applications
across all art units

Statute-Specific Performance

§101
12.5%
-27.5% vs TC avg
§103
45.6%
+5.6% vs TC avg
§102
9.5%
-30.5% vs TC avg
§112
26.3%
-13.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 410 resolved cases

Office Action

§103 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-20 are currently pending and have been examined. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/forms/. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1, 10, 19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 9, 17 of U.S. Patent No. 12361133. The differences between the claims are bolded in the table below: INSTANT APPLICATION U.S. Patent No. 12361133 B2 1. An Information Handling System (IHS) comprising: a plurality of Security Protocol and Data Mode! (SPDM)-enabled devices; and a plurality of Baseboard Management Controllers (BMCs) in communication with the SPDM-enabled devices, the plurality of BMCs each comprising at least one processor and a memory coupled to the at least one processor, the memory having program instructions stored thereon that, upon execution by the at least one processor, cause at least one of the plurality of BMCs to: negotiate with one or more other of the plurality of BMCs, management of a subset of the SPDM-enabled devices based on a hardware capability or a software capability of each of the SPDM-enabled devices relative to the hardware capability or the software capability of the at least one BMC; and manage the subset of SPDM-enabled devices by the at least one BMC. 1. An Information Handling System (IHS), comprising: one or more host processor modules configured to host Security Protocol and Data Model (SPDM)-enabled hardware devices; and a secure control module configured to host two or more baseboard management controllers; wherein each of the baseboard management controllers comprise at least one processor coupled to at least one memory, the at least one memory having program instructions stored thereon that, upon execution by the at least one processor, cause the baseboard management controller to: discover the SPDM-enabled hardware devices using SPDM messages; negotiate with at least one other baseboard management controller for access to individual ones of the SPDM-enabled hardware devices; and manage the individual ones of the SPDM-enabled hardware devices. Claim 10 is a method variation of claim 1. Claim 9 is a system variation of claim 1. Claim 19 is a computer program product variation of claim 1. Claim 17 is a method variation of claim 1. Although the claims at issue are not identical, they are not patentably distinct from each other because both the instant claims and the patent claims are directed to an information handling system having similar steps. The only difference between the claims is that the patent claim recites the additional limitations of “one or more host processor modules” and “a secure control module”. However, it would have been obvious to one of ordinary skill in the art to modify the instant claims to include host processor modules and secure control modules in order to host the chassis devices and baseboard management devices respectively. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 4, 6, 9-10, 13, 15 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ku et al. (U.S. Pub. No. 20170364375 A1) in view of Huang et al. (U.S. Pub. No. 20200036780 A1). Ku was cited in a previous office action. As per claim 1, Ku teaches the invention substantially as claimed including an Information Handling System (IHS) comprising: a plurality of Security Protocol and Data Model (SPDM)-enabled devices (par. 0029 The chassis level components 230 can include devices such as fans, power supply units (PSUs), various sensors (e.g., voltage sensors, current sensors, or temperature sensors) field replaceable units (FRUs), light-emitting diodes (LEDs); par. The BMC communicates with the various server components that the BMC manages using the IPMI protocol); and a plurality of Baseboard Management Controllers (BMCs) in communication with the SPDM-enabled devices, the plurality of BMCs each comprising at least one processor and a memory coupled to the at least one processor (Fig. 2, describes a plurality of BMCs 210 in communication with devices 230; par. 0022 each BMC 110 can manage hardware components within the server, such as processors, memory, storage devices, PSUs, fans, boards, etc.; par. 0032 each of BMCs 210 has sufficient computing power to perform the operations e.g. processor, memory), the memory having program instructions stored thereon that, upon execution by the at least one processor, cause at least one of the plurality of BMCs to: manage the subset of SPDM-enabled devices by the at least one BMC (par. 0022 each BMC 110 can manage hardware components within the server, such as processors, memory, storage devices, PSUs, fans, boards, etc.; par. 0041 The chassis switch 350 is configured to exchange data with the plurality of BMCs and selectively connect each of the at chassis level components 330 to one of the plurality of BMCs). Ku does not expressly disclose: cause at least one of the plurality of BMCs to negotiate with one or more other of the plurality of BMCs, management of a subset of the SPDM-enabled devices based on a hardware capability or a software capability of each of the SPDM-enabled devices relative to the hardware capability or the software capability of the at least one BMC. However, Huang teaches: negotiate with one or more other of the plurality of BMCs, management of a subset of the SPDM-enabled devices based on a hardware capability or a software capability of each of the SPDM-enabled devices relative to the hardware capability or the software capability of the at least one BMC (par. 0024 determine a plurality of controllers corresponding to a plurality of client devices … wherein the plurality of client devices are assigned to the plurality of controllers according to advanced rules, and wherein the advanced rules includes controller load, controller capability and controller index). It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to combine the technique assigning client devices to controllers of Huang with the system and method of Ku resulting in a system and method which provides determining a plurality of management controllers and devices and assigning devices to the management controllers at least based on the capabilities of the management controllers, devices as in Huang. One of ordinary skill in the art would have been motivated to make this combination for the purpose of determining controllers that correspond to devices according to advanced rules, such as controller capability, and controller rule (0024). As per claim 4, Ku further teaches: wherein the program instructions, upon execution, further cause the at least one of the plurality of BMCs to negotiate with the one or more other BMCs, management of the subset of devices based upon a load sharing technique (par. 0011 the chassis switch is configured to determine which of the plurality of BMCs to connect to each of the at least one chassis level component based on a priority table. In some implementations, the chassis switch is configured to determine which of the plurality of BMCs to connect to each of the at least one chassis level component based on a classification type for each of the at least one chassis level component). As per claim 6, Ku further teaches: when the at least one BMC is not designated as a master BMC, generate a heartbeat message at ongoing intervals; transmit the heartbeat message to the master BMC; and when no valid response is received, negotiate a new master BMC with the other remaining one or more other BMCs (par. 0008 In some implementations, in response to determining the one BMC is not available to operate as the VCMC [master BMC], another BMC from the plurality of BMCs is configured to operate as the VCMC). As per claim 9, Ku further teaches: wherein the program instructions, upon execution, further cause the at least one of the plurality of BMCs to, when the IHS is initially turned on, query each of the one or more other plurality of BMCs for their capabilities using a custom SPDM-based Original Equipment Manufacturer (OEM) command (par. 0011 the chassis switch is configured to determine which of the plurality of BMCs to connect to each of the at least one chassis level component based on a priority table. In some implementations, the chassis switch is configured to determine which of the plurality of BMCs to connect to each of the at least one chassis level component based on a classification type for each of the at least one chassis level component). As per claim 10, it is a method having similar limitations as claim 1. Thus, claim 10 is rejected for the same rationale as applied to claim 1. As per claim 13, it is a method having similar limitations as claim 4. Thus, claim 13 is rejected for the same rationale as applied to claim 4. As per claim 15, it is a method having similar limitations as claim 6. Thus, claim 15 is rejected for the same rationale as applied to claim 6. As per claim 18, it is a method having similar limitations as claim 9. Thus, claim 18 is rejected for the same rationale as applied to claim 9. As per claim 19, it is a computer program product having similar limitations as claim 1. Thus, claim 19 is rejected for the same rationale as applied to claim 1. As per claim 20, it is a computer program product having similar limitations as claim 4. Thus, claim 20 is rejected for the same rationale as applied to claim 4. Claims 2 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Ku in view of Huang as applied to claim 1, and further in view of Smith et al. (U.S. Pub. No. 20220191648 A1). Smith was cited in a previous office action. As per claim 2, Ku and Huang do not expressly describe: perform SPDM attestation with the subset of devices; and share the results of the SPDM attestation with the one or more other BMCs. However, Smith teaches: further cause the at least one of the plurality of BMCs to: perform SPDM attestation with the subset of devices; and share the results of the SPDM attestation with the one or more other BMCs (par. 0156 The DT cluster node 1610 attests to each cluster node and cluster nodes share attestation results). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of performing attestation of cluster nodes and sharing the results of Smith with the system and method of Ku and Huang resulting in a system the provides for performing attestation of devices and sharing with management controllers as in Smith. One of ordinary skill in the art would have been motivate to make this combination for the purpose of establishing compliance with the expected security and resiliency according a policy (par. 0164). As per claim 11, it is a method having similar limitations as claim 2. Thus, claim 11 is rejected for the same rationale as applied to claim 2. Claims 3 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Ku in view of Huang as applied to claim 1, and further in view of Sathyanarayana et al. (U.S. Pub. No. 20220124118 A1). Sathyanarayana was cited in a previous office action. As per claim 3, Ku and Huang do not expressly teach: obtain firmware measurements of the subset of devices; and share the results of the firmware measurements with the one or more other BMCs. However, analogous prior art, Sathyanarayana, teaches: obtain firmware measurements of the subset of devices, and share the results of the firmware measurements with the one or more other BMCs (par. 0031 the BMC may use the GET MEASUREMENTS command to measure firmware measurements of PCIe devices as defined in SPDM specification. This may validate the integrity of the software running on the endpoint (PCIe devices) during runtime. The BMC may execute the GET MEASUREMENTS command periodically at a defined time frequency according to system design). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of measuring firmware measurements of PCIe devices using measurement commands of Sathyanarayana with the system and method of Ku and Huang resulting in a system and method in which firmware measurements of devices are obtained by BMCs using measurements commands as in Sathyanarayana. One of ordinary skill in the art would have been motivate to make this combination for the purpose of validating the integrity of the software running on the endpoint PCIe devices [0031]). As per claim 12, it is a method having similar limitations as claim 3. Thus, claim 12 is rejected for the same rationale as applied to claim 3. Claims 5, 7-8, 14 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Ku in view of Huang as applied to claim 1, and further in view of Kodama et al. (U.S. Pub. No. 20180336324 A1). Kodama was cited in a previous office action. As pe claim 5, Ku further teaches: perform a discovery process to discover the one or more other BMCs in the HIS (par. 0011 the chassis switch is configured to determine which of the plurality of BMCs to connect). Ku and Huang do not expressly disclose: perform mutual authentication with each of the discovered one or more other BMCs; and when the mutual authentication fails, generate an alert message that indicates the failed authentication. However, analogous prior art, Kodama teaches: perform … authentication with each of the discovered one or more other BMCs; and when the authentication fails, generate an alert message that indicates the failed authentication (par. 0090 When receiving an IPMI command, the BMC 126 performs an authentication process. The authentication process includes MAC authentication using a transmission-source MAC address and user authentication … If at least one of the MAC authentication and the user authentication fails, the BMC 126 returns an error message). t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of performing authenticating process by BMCs of Kodama with the system and method of Ku and Huang resulting in a system and method in which BMCs perform authentication process and provides an error when authentication fails as in Kodama. One of ordinary skill in the art would have been motivated to make this combination for the purpose of providing improved level of security (par. 0172). As per claim 7, Ku further teaches: when the at least one BMC is designated as a master BMC, receive an indication that a new SPDM-enabled device has generated a hot plug event; and assign another one of the plurality of BMCs to manage the new device … (par. 0033 in response to the CMC malfunctioning, one of the BMCs 210 is configured to operate as the VCMC; 0034] In some implementations, an administrator selects (i.e., via a command over an in-band or out-of-band network) one of the BMCs as the VCMC. In some implementations, one of the BMCs 210 is preselected as a default VCMC. In some implementations, if one BMC is not available to operate as the VCMC, another BMC from the plurality of BMCs 210 is configured to operate as the VCMC). Huang further teaches: assign another one of the plurality of BMCs to manage the new device according to at least one of the hardware capability or the software capability of the SPDM-enabled device relative to the hardware capability or the software capability of the other one BM (par. 0024 determine a plurality of controllers corresponding to a plurality of client devices … wherein the plurality of client devices are assigned to the plurality of controllers according to advanced rules, and wherein the advanced rules includes controller load, controller capability and controller index). Kodoma further teaches: authenticate the new SPDM-enabled device (par. 0090 the BMC 126 performs an authentication process). As per claim 8, Ku teaches: wherein the program instructions, upon execution, further cause the at least one of the plurality of BMCs to designate the at least one BMC as the master BMC according to a communication link address assigned to the at least one BMC (par. 0008 determining the one BMC is not available to operate as the VCMC, another BMC from the plurality of BMCs is configured to operate as the VCMC; 0051 The method 400 selects the one BMC from the plurality of BMCs to operate as the VCMC, based on whether the one BMC is capable of VCMC functionality). As per claim 14, it is a method having similar limitations as claim 5. Thus, claim 14 is rejected for the same rationale as applied to claim 5. As per claim 16, it is a method having similar limitations as claim 7. Thus, claim 16 is rejected for the same rationale as applied to claim 7. As per claim 17, it is a method having similar limitations as claim 8. Thus, claim 17 is rejected for the same rationale as applied to claim 8. Response to Arguments Applicant's arguments with respect to claims 1, 10 and 19 have been considered but are moot in view of the new ground(s) of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Willy W. Huaracha whose telephone number is (571) 270-5510. The examiner can normally be reached on M-F 8:30-5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bradley Teets can be reached on (571) 272-3338. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WH/ Examiner, Art Unit 2195 /BRADLEY A TEETS/Supervisory Patent Examiner, Art Unit 2197
Read full office action

Prosecution Timeline

Feb 22, 2023
Application Filed
Sep 06, 2025
Non-Final Rejection — §103, §DP
Dec 11, 2025
Response Filed
Dec 17, 2025
Examiner Interview Summary
Dec 17, 2025
Applicant Interview (Telephonic)
Mar 20, 2026
Final Rejection — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+53.4%)
4y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 410 resolved cases by this examiner. Grant probability derived from career allow rate.

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