Prosecution Insights
Last updated: April 19, 2026
Application No. 18/173,176

Inertial Measurement Device

Final Rejection §103
Filed
Feb 23, 2023
Examiner
KWOK, HELEN C
Art Unit
2855
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Seiko Epson Corporation
OA Round
4 (Final)
81%
Grant Probability
Favorable
5-6
OA Rounds
2y 9m
To Grant
87%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
1303 granted / 1611 resolved
+12.9% vs TC avg
Moderate +6% lift
Without
With
+6.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
59 currently pending
Career history
1670
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
41.2%
+1.2% vs TC avg
§102
30.1%
-9.9% vs TC avg
§112
19.0%
-21.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1611 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5 and 7-11 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2021/0096150 (Sato et al.) in view of U.S. Patent Application Publication 2019/0129470 (Hasei et al.). With regards to claim 1, Sato et al. discloses an inertial measurement unit comprising, as illustrated in Figures 1-20, an inertial measurement device 10 (e.g. inertial measurement unit; paragraph [0027]; Figures 2-3) comprising an inertial sensor 20 (e.g. sensor unit; paragraph [0027]; Figure 3); a first circuit board 40 (e.g. circuit board substrate; paragraph [0029]; Figure 3) disposed on one side (e.g. top side) of the inertial sensor (e.g. observed in Figures 2-3); a second circuit board 48 (e.g. substrate which can be a circuit board when processing unit 50 and other electronic components are herewith; paragraphs [0038],[0056],[0029]) that is disposed on an opposite side (e.g. top side) of the first circuit board from the inertial sensor (e.g. observed in Figures 2-3); a display unit 70 (e.g. display unit; paragraph [0038]) mounted on the second circuit board and serving as a heat-generating component (e.g. LED from display panel 72 of the display unit will generate heat; paragraph [0031]); a housing 150,170 (e.g. the housing is formed by base 150 and protection plate 170; paragraphs [0027],[0039]; Figure 3) to accommodate the inertial sensor, the first circuit board, and the second circuit board such that the housing configured with a top plate 170 and a bottom plate 150 (e.g. observed in Figure 3); the first circuit board 40 is placed on the inertial sensor 20 (e.g. through connectors 46,26; paragraph2 [0113],[0054]; Figures 13,3); in a cross-sectional view from a direction perpendicular to a surface of the first circuit board, the first circuit board and the second circuit board are arranged between the inertial sensor and the display unit (e.g. observed in Figures 2-3). (See, paragraphs [0027] to [0187]). The only differences between the prior art and the claimed invention are 1) the housing configured with a bottom plate, a top plate, and a sidewall between the top and bottom plates; 2) the second circuit board is directly fixed the sidewall of the housing. For differences 1) and 2), Hasei et al. discloses an electronic device comprising, as illustrated in Figures 1-8, an inertial measurement device 200 (e.g. wrist device; Figure 4) comprising an inertial sensor 23 (e.g. acceleration sensor; paragraph [0074]; Figure 4); a first circuit board 20 (e.g. circuit board; paragraph [0068]; Figure 4) disposed on one side (e.g. bottom side) of the inertial sensor (e.g. observed in Figure 4); a second circuit board 43 (e.g. sensor board; paragraph [0103]; Figure 4) that is disposed on an opposite side (e.g. bottom side) of the first circuit board from the inertial sensor (e.g. observed in Figure 4); the first circuit board 20 is placed on the inertial sensor 23 (e.g. observed in Figure 4); a housing 31,55 (e.g. the housing is formed these two elements – housing, glass plate; paragraph [0065]) configured to accommodate the inertial sensor, the first circuit board, and the second circuit board such that the housing being configured with a bottom plate (e.g. bottom portion of housing 31 in Figure 4), a top plate (e.g. glass plate 55 in Figure 4), and a sidewall (e.g. right-side portion of housing 31 where sidewall starts at bottom straight horizontal beam portion up to the protrusion portion 34 of the housing 31 in Figure 4) between the top and bottom plates; the second circuit board is directly fixed the sidewall of the housing (e.g. observed in Figure 4 where right-side portion of the second circuit board 43 is directly connected and fixed to right-side straight horizontal beam portion of the sidewall). (See, paragraphs [0046] to [0137]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have readily recognize the advantages and desirability of employing a housing configured with a bottom plate, a top plate, and a sidewall between the top and bottom plates as suggested by Hasei et al. to the system of Sato et al. to have the ability to provide further protection to the internal structures of the system from being damaged in all directions by fully and completely enclosing the internal structures. Also, to include a sidewall to the top plate and the bottom plate of the housing of Sato is considered to have been design choice possibilities to the operator and/or manufacturer that would have been obvious to a skill artisan in the art before the effective filing date of the claimed invention to provide further protection to the internal structures of the system from being damaged in all directions by fully and completely enclosing the internal structures without departing from the scope of the invention and without changing and/or altering the operation and/or performance of the housing, namely to prevent damages to the internal structures. At the same time, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have readily recognize the advantages and desirability of employing the second circuit board is directly fixed the sidewall of the housing as suggested by Hasei et al. to the system of Sato et al. to have the ability to provide direct electrically communication among internal and/or external components. (See, paragraphs [0072],[0096] of Hasei et al.). With regards to claim 2, Sato et al. further discloses the first circuit board 40 and the second circuit board 48 are separated from each other. (See, as observed in Figures 2-3). With regards to claim 3, Sato et al. does not explicitly specify a cable configured to electrically couple the first circuit board and the second circuit board. However, to have employ such structural characteristic, like a cable for electrical connections between the two circuit boards, is considered to have been a well-known concept that is obvious to an artisan of ordinary skill in the art before the effective filing date of the claimed invention without departing from the scope of the invention and to have readily recognize the advantages and desirability to employ the cable, namely to provide an electrical connection and communication between the first and second circuit boards. At the same time, Hasei et al. further discloses a cable 46 (e.g. connection wiring portion; paragraph [0096]) configured to electrically couple the first circuit board 20 and the second circuit board 43 (e.g. observed in Figure 4). With regards to claim 5, Hasei et al. further discloses a battery 70 (e.g. paragraph [0074]; Figure 4) mounted on the second circuit board 43 (e.g. observed in Figure 4); the concept of selecting either the battery or an external power supply (e.g. solar-light power generation unit 80) for power supply in paragraph [0111]. At the same time, Sato et al. further discloses the at least one heat- generating component includes a power supply interface 106 (e.g. power interface; paragraph [0034]; Figure 1) configured to receive power supply from an external power supply. With regards to claim 7, Sato et al. further discloses the housing 150,170 includes a window portion 174 (e.g. window; paragraph [0040]; Figure 3) through which the display unit 70 is to be visually recognized. (See, paragraph [0040]; Figure 3). With regards to claim 8, Sato et al. further discloses a switch 80 (e.g. mode changeover switch) that is mounted on the second circuit board 48 and that is operated by a user. (See, paragraphs [0082],[0083]). With regards to claim 9, Sato et al. further discloses a processing circuit 50 (e.g. processing unit; paragraph [0029]; Figure 3) mounted on the first circuit board 40 and configured to process a detection signal of the inertial sensor (e.g. paragraph [0030]). With regards to claim 10, Sato et al. further discloses a wired communication interface 100 (e.g. wired communication interface unit; paragraph [0033]) mounted on the first circuit board 40 (paragraph [0033]; Figure 3). However, to have set such structural characteristics to mount the wired communication interface on the second circuit board, as presently claimed, in lieu of on the first circuit board, as disclosed by Sato et al., would have been a matter of design choice possibilities to the operator and/or manufacturer that would have been obvious to a skilled artisan in the art before the effective filing date of the claimed invention without departing from the scope of the invention and without altering and/or changing the operation and/or performance of the wired communication interface, whether mounted on the first circuit board or the second circuit board, namely to implement a communication interface between internal and external whose operation can be controlled by the user at the time of execution (e.g. paragraphs [0033],[0064] of Sato et al.). At the same time, Sato et al. suggests in paragraph [0082] that components that are mounted on the first circuit board can be mounted on other substrates like the second circuit board. With regards to claim 11, broadly interpreted, Sato et al. further discloses a portion where the first circuit board 40 is fixed to the housing (e.g. first circuit board 40 is fixed to the bottom portion 150 of the housing 150,170; Figure 3) is different from a portion where the second circuit board 48 is fixed to the housing (e.g. second circuit board 48 is fixed to the top portion 170 of the housing 150,170; Figure 3). Response to Amendment Applicant’s arguments with respect to claims 1-3, 5 and 7-11 have been considered but are moot in view of the new ground(s) of rejection and/or because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Helen C Kwok whose telephone number is (571)272-2197. The examiner can normally be reached Monday to Friday, 7:30 to 4:00 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Peter Macchiarolo can be reached at 571-272-2375. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HELEN C KWOK/Primary Examiner, Art Unit 2855
Read full office action

Prosecution Timeline

Feb 23, 2023
Application Filed
Feb 12, 2025
Non-Final Rejection — §103
Apr 08, 2025
Response Filed
May 20, 2025
Final Rejection — §103
Aug 18, 2025
Request for Continued Examination
Aug 24, 2025
Response after Non-Final Action
Sep 08, 2025
Non-Final Rejection — §103
Nov 06, 2025
Response Filed
Dec 03, 2025
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
81%
Grant Probability
87%
With Interview (+6.5%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 1611 resolved cases by this examiner. Grant probability derived from career allow rate.

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