Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 15, 21, 29, and 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2023/0368456 A1 (hereinafter Ha) in view of U.S. Patent Application Publication 2021/0142145 A1 (hereinafter Bastani) in view of U.S. Patent Application Publication 2015/0264299 A1 (hereinafter Leech) in view of U.S. Patent Application 2018/0182066 A1 (hereinafter Saleh).
Regarding claim 1, the limitations “A graphics processing system, comprising: a graphics processing unit (GPU) renderer configured to render a first set of tiles based on an input frame; a machine learning (ML) graphics processor configured to perform a graphics process upon at least a first subset of the first set of tiles to generate a second set of tiles” are taught by Ha (Ha, e.g. abstract, paragraphs 48-95, discloses a tile based rendering system, wherein the rendering system comprises both a GPU and a NPU for performing graphics rendering processing and neural network rendering processing, respectively, e.g. paragraphs 49, 50, and the rendering is performed in a tile-based manner generating a first intermediate set of rendered tiles rendered by the GPU, e.g. paragraphs 48-54, 62, 67-69, of which all, or a portion, of the first intermediate set of rendered tiles are provided to the NPU to perform a neural networking based rendering process to generate a second set of tiles, e.g. paragraphs 49, 50, 53-55, 61, 63, 65, 66, used to generate a display frame, e.g. paragraphs 56, 66, 76. That is, as claimed, the GPU receives graphic data of an input frame and performs a tile based rendering process to generate a first set of tiles, and the NPU/ML graphics processor performs a machine learning graphics process on a first subset of the first set of tiles to generate a second set of tiles.)
The limitation “a first frame generator configured to generate a first output frame based on the second set of tiles” is taught by Ha (Ha, e.g. paragraphs 56, 66, 76, also teaches that a third graphics process is performed by the GPU to generate final tiles of an output frame for display using the second intermediate set of tiles, i.e. the claimed second set of tiles, such that Ha’s GPU also performs processing to act as the claimed frame generator.)
The limitation “wherein the first set of tiles comprises a second subset of tiles that bypasses the graphics process of the ML graphics processor, wherein the first frame generator is configured to integrate the second subset of tiles with the second set of tiles to generate the first output frame” are taught by Ha (Ha, as discussed above, teaches a third graphics process is performed by the GPU to generate final tiles of an output frame for display using the second intermediate set of tiles, i.e. the claimed second set of tiles. Ha, e.g. paragraphs 63, 65, 66, 76, further teaches that in some instances, only a portion of the first intermediate set of tiles are processed by the NPU to generate the second intermediate set of tiles, and the final tile set may include a portion of the first intermediate tile set which is not processed by the NPU, such that the final tile set corresponding to the output image is generated by combining the remaining portion of the first intermediate tiles with the second intermediate set of tiles, i.e. as claimed, the second set of tiles and the second subset of tiles of the first set of tiles are integrated to generate the first output frame. It is additionally noted that Ha, e.g. paragraphs 65, 66, indicates that the purpose of selectively performing the second-rendering on only a portion of the first-rendering results is to reduce or minimize the additional operations required to perform the second-rendering for the entire scene being rendered, i.e. as in the example, the scene comprises both a person object which is subject to the second-rendering and the background object which is not subject to the second-rendering, and Ha does not teach or suggest that the background object is not included in the final rendering result, but does teach that the background object is not subject to the second-rendering operations, where the final rendering result is generated using the tile set 315 stored in memory 314, comprising both first-rendering result tiles, as indicated by the arrow between tile set 321 and 314, and second-rendering result tiles, as indicated by the arrow between tile set 322 and 314.)
The limitations “a central processing unit (CPU) configured to generate and provide a control signal to the GPU renderer that defines a machine learning (ML) window including the first subset of tiles, wherein the control signal specifies a pixel coordinate position within the input frame, a height of the ML window comprising a first number of pixels, and a width of the ML window comprising a second number of pixels, wherein the CPU is further configured to generate and provide an ML control signal to the ML graphics processor to … define the ML window, and wherein the ML graphics processor is further configured to perform the graphics process based on … the ML window” is not explicitly taught by Ha (Ha, e.g. paragraphs 55, 61, 77, teaches that the NPU neural network processing may be a super-resolution process, as well as, e.g. paragraph 65, the NPU/ML processing may be performed only for objects requiring higher quality rendering. While Ha teaches that the NPU/ML processing may be limited to the portion requiring higher quality rendering, and may be predetermined, i.e. by a CPU, Ha does not teach or suggest that the portion of the image requiring the high quality NPU/ML processing is specified as a “window”, per se.) However, this limitation is taught by Bastani in view of Leech (Bastani, e.g. abstract, paragraphs 21-69, discloses a system for performing foveated rendering, wherein a GPU performs rendering to generate a first set of tiles for a frame, e.g. paragraph 41, followed by using an NPU/ML processor to perform super resolution processing within a foveated region of the frame, e.g. paragraph 43, i.e. analogous to Ha’s system and the claimed system, a GPU performs rendering to generate a first set of tiles, a subset of which are processed by an NPU/ML processor to increase the resolution, and the resulting image comprises the remaining portion of the first set of tiles and the super resolution tiles generated by the NPU/ML processor. Bastani, e.g. paragraphs 28, 38-41, teaches that the CPU processes sensor data to determine the gaze direction of the user, and generates commands controlling how the GPU performs rendering, where, e.g. paragraph 43, the foveated area/region may be adaptively determined according to the gaze direction of the user, i.e. Bastani teaches that the foveated area/region is determined by the CPU and used to generate GPU commands, where the adaptively determined foveated area/region corresponds to the region where NPU/ML processing should be performed, and the CPU transmits the commands and foveated area/region to the GPU for performing the processing, i.e. the claimed control signal/ML control signal provided to the GPU/ML. While Bastani does not explicitly indicate the format used to specify this region, i.e. the claimed “ML window”, Leech discloses a rectangular foveated area/region defined by a position, height, and width. Leech, e.g. abstract, paragraphs 20-130, describes an analogous foveated rendering system, i.e. although Leech does not use the term foveation, per se, Leech teaches performing eye tracking to determine the user focus/gaze position, e.g. paragraphs 33-43, 53, 66, 67, and dividing the full display area into different regions having different quality, resolutions, and/or processing power based on the gaze/focus position, e.g. paragraphs 70-95, i.e. as in paragraph 81, different regions defined by relative association with the user’s eye focus are given different levels of image resources, corresponding to a foveated rendering system. Further, Leech, e.g. paragraphs 76, 82, teaches that the foveated regions may be rectangular regions defined using widths and heights defined with a number of pixels in each direction, as in paragraph 76, relative to the user’s focal position defined using X and Y pixel coordinates as in paragraph 82, corresponding to a foveated region defined as a rectangular window having a position (based on the determined focus/gaze point), and width and height specified in pixels, i.e. as in the example of paragraph 76, a width and height of 200 pixels each.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system to perform Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format because Bastani’s technique is an analogous selective ML super-resolution rendering system to Ha’s tiled rendering system, wherein the tiles requiring high quality rendering are identified based on user gaze instead of the objects in the scene as in Ha, paragraph 65, such that Ha’s system can perform Bastani’s technique with a straight forward modification. In Ha’s modified system, as noted above, Bastani teaches that the foveated area/region is determined by the CPU and used to generate GPU commands, where the adaptively determined foveated area/region corresponds to the region where NPU/ML processing should be performed, and Leech teaches that the focus/gaze based foveated region may be rectangular and defined using the user’s focus/gaze position defined with X and Y coordinates in pixel space, and a width and height defined using pixels, such that the foveated area/region where NPU/ML processing is to be performed would be specified by the CPU using X and Y coordinates in pixel space, and a width and height defined using pixels, corresponding to the claimed ML window provided by the CPU including the first subset of tiles. As noted above, Bastani teaches that the CPU transmits the commands and foveated area/region to the GPU for performing the processing, i.e. the claimed control signal/ML control signal provided to the GPU/ML, which includes the claimed ML window defined in height/width of pixels when Leech’s rectangular definition format is used. It is noted that although Leech’s example of paragraph 76 uses the same number of pixels for both width and height, they are described as separate quantities, i.e. as claimed, a first number of pixels for the height, 200, and a second number of pixels for the width, 200.
The limitation “wherein the CPU is further configured to generate and provide an ML control signal to the ML graphics processor to specify a GPU rendered tile size define the ML window, and wherein the ML graphics processor is further configured to perform the graphics process based on the GPU rendered tile size and the ML window” is partially taught by Ha in view of Bastani and Leech (As discussed above, In Ha’s modified system, Bastani teaches that the foveated area/region is determined by the CPU and used to generate GPU commands, where Bastani teaches that the CPU transmits the commands and foveated area/region to the GPU for performing the processing, i.e. the claimed control signal/ML control signal provided to the GPU/ML, which includes the claimed ML window defined in height/width of pixels when Leech’s rectangular definition format is used. While Ha, e.g. paragraphs 62-66, figure 3, teaches that the tiles processed by the NPU/ML processor are first processed by the GPU, i.e. the NPU/ML graphics processing is performed on the tiles as the GPU rendered tiles, and therefore have the same size, and Bastani, e.g. paragraph 41, indicates that a tile of some defined size is used for GPU rendering, neither Ha or Bastani explicitly indicate that the CPU communicates a GPU/NPU/ML tile size to the GPU/NPU/ML processor for specifying the GPU rendered tile size as claimed.) However, this limitation is taught by Saleh (Saleh, e.g. abstract, paragraphs 14-160, describes a system for performing foveated tiled rendering in a GPU with upsampling, i.e. super resolution processing, performed for tiles in a focus region, analogous to Ha’s system, Bastani’s system, and the claimed system. Saleh, e.g. paragraphs 16-20, 39, describes foveated rendering on a tile/bin basis, where the application executed by the CPU controls the rendering process using API(s) and GPU driver(s), e.g. paragraphs 25, 28, 59-64, including specifying the size of the tiles used for rendering, e.g. paragraph 81, which is also the tile size used by the upsampling/super resolution process, e.g. paragraph 102, corresponding to the NPU/ML processing in Ha’s modified system, i.e. as claimed the CPU control signal specifies the tile size used both for GPU tile rendering and upsampling/super resolution processing.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system, performing Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format, to use Saleh’s application/CPU specified tile size for defining the size of Ha’s tiles because Ha does not discuss how the size of the tiles are determined/specified and Saleh, describing an analogous tiled rendering system performing super resolution processing on a subset of GPU rendered tiles, teaches that the GPU tile size may be specified by an application executing on the GPU via GPU driver(s) executed by the CPU, i.e. the claimed control signal from the CPU to the GPU/ML processor specifying the tile size for GPU rendering/ML graphics processing. In Ha’s modified system, the tile size would be specified as part of the transmission of commands and the foveated area/region in Leech’s format from the CPU to the GPU, using GPU driver(s) executed by the CPU as taught by Saleh.
Regarding claim 15, the limitation “wherein the graphics process comprises a super-resolution process” is taught by Ha (Ha, e.g. paragraphs 55, 61, 77, teaches that the NPU neural network processing may be a super-resolution process.)
Regarding claims 21 and 30, the limitations are similar to those treated in the above rejection(s) and are met by the references as discussed in claim 1 above.
Regarding claim 29, the limitations are similar to those treated in the above rejection(s) and are met by the references as discussed in claim 15 above.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2023/0368456 A1 (hereinafter Ha) in view of U.S. Patent Application Publication 2021/0142145 A1 (hereinafter Bastani) in view of U.S. Patent Application Publication 2015/0264299 A1 (hereinafter Leech) in view of U.S. Patent Application 2018/0182066 A1 (hereinafter Saleh) as applied to claim 1 above, and further in view of U.S. Patent 9,280,836 B1 (hereinafter Craik).
Regarding claim 3, the limitation “wherein the GPU renderer is configured to render the first subset of the first set of tiles prior to rendering the second subset of tiles” is partially taught by Ha (Ha, e.g. paragraphs 70-73, teaches that the GPU renders tiles sequentially, such that after rendering a first subset of the first set of tiles, a second subset of the first set of tiles are rendered. Ha, e.g. paragraphs 65, 66, further teaches that the portion of the first intermediate set of tiles which are processed by the NPU/ML processor comprise objects which require more realistic representation, i.e. tiles comprising objects requiring higher quality rendering corresponding to important scene elements. However, while Ha teaches that the first set of tiles are rendered in a sequence, Ha does not teach that the portion of the first intermediate set of tiles requiring higher quality rendering are rendered by the GPU before the remaining portion of the first intermediate set of tiles which are not processed by the NPU/ML processor.) However, this limitation is taught by Craik (Craik, e.g. abstract, cols 2-5, describes a device for rasterizing images having relatively high and low quality tiles corresponding to different portions of the same image frame, e.g. col 2, line 33 – col 3, line 19. Craik, e.g. col 3, lines 35-52, col 5, lines 11-24, further teaches that the high quality tiles may be prioritized over the low quality tiles, such that the set of high quality tiles are rendered prior to rendering the set of low quality tiles, corresponding to the claimed prioritization of the first subset of the first set of tiles over the second subset of the first set of tiles.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system, performing Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format, using Saleh’s application/CPU specified tile size, to use Craik’s prioritized rendering technique in order to improve the pipelining efficiency of Ha’s rendering system. That is, as noted above, Ha teaches that the tiles are sequentially rendered in a pipelined manner, where only a portion of the tiles requiring higher quality rendering are processed by the NPU/ML processing, which can be performed as soon as the corresponding first tile is written to memory, e.g. paragraphs 71, 73, allowing the GPU and NPU to process different tiles in parallel, and one of ordinary skill in the art would recognize that Craik’s prioritized rendering of high quality tiles would enable the NPU to start processing the first subset of tiles earlier, in comparison to a non-prioritized rendering order wherein the NPU would be idle until the first tile of the first subset of tiles is processed by the GPU, corresponding to an improvement in pipelining efficiency of Ha’s tiled rendering system. In Ha’s modified system, the subset of the first set of intermediate tiles requiring NPU/ML processing would be predetermined by the CPU specifying the foveation window as taught by Bastani in view of Leech, as discussed in the claim 1 rejection above, allowing the claimed first subset of tiles to be prioritized for rendering by the GPU before the claimed second subset of tiles.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2023/0368456 A1 (hereinafter Ha) in view of U.S. Patent Application Publication 2021/0142145 A1 (hereinafter Bastani) in view of U.S. Patent Application Publication 2015/0264299 A1 (hereinafter Leech) in view of U.S. Patent Application 2018/0182066 A1 (hereinafter Saleh) as applied to claim 1 above, and further in view of U.S. Patent Application Publication 2022/0383580 A1 (hereinafter Rohmetra).
Regarding claim 16, the limitation “wherein the graphics process comprises a style transfer process” is not explicitly taught by Ha (Ha, e.g. paragraphs 55, 61, 77, teaches that the NPU neural network processing may be a super-resolution process. Further, Ha, e.g. paragraph 53, indicates that the rendering processes are exemplary and may include additional stages, as well as, e.g. paragraph 65, the NPU/ML processing may be performed only for objects requiring higher quality rendering. However, Ha does not discuss the use of a style transfer ML graphics process, per se.) However, this limitation is taught by Rohmetra (Rohmetra, e.g. abstract, paragraphs 35-305, discloses a system for using a style transfer neural network in rendering images using GPUs. More specifically, Rohmetra, e.g. paragraphs 242-263, teaches that one or more objects in an input frame being rendered by the GPU are provided to a style transfer network performing style transfer processing on the object, such that the resulting output frame includes the stylized object(s), where the stylized objects may be styled based on exemplary input images, e.g. paragraph 257.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system, performing Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format, using Saleh’s application/CPU specified tile size, to perform Rohmetra’s style transfer neural network processing on the tiles corresponding to one or more objects in the first intermediate set of tiles because Ha suggests that other ML processes may be performed by the NPU and Rohmetra’s style transfer neural network processing provides the advantage of rendering selected objects in a style corresponding to selected input images, i.e. one of ordinary skill in the art would recognize that style transfer techniques allow for pleasing aesthetic results in comparison to, or analogous to, traditional stylized rendering techniques.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2023/0368456 A1 (hereinafter Ha) in view of U.S. Patent Application Publication 2021/0142145 A1 (hereinafter Bastani) in view of U.S. Patent Application Publication 2015/0264299 A1 (hereinafter Leech) in view of U.S. Patent Application 2018/0182066 A1 (hereinafter Saleh) as applied to claim 1 above, and further in view of U.S. Patent Application Publication 2021/0390664 A1 (hereinafter Pohl).
Regarding claim 17, the limitation “wherein the graphics process comprises a denoising process for raytracing process” is not explicitly taught by Ha (Ha, e.g. paragraphs 55, 61, 77, teaches that the NPU neural network processing may be a super-resolution process. Further, Ha, e.g. paragraph 53, indicates that the rendering processes are exemplary and may include additional stages, as well as, e.g. paragraph 50, the GPU may be a ray processing unit, i.e. the first set of tiles could be generated by a ray tracing process. Ha does not discuss denoising the results of the ray tracing process, per se, or more specifically using the NPU/ML processing stage to perform denoising for the results of the ray tracing process.) However, this limitation is taught by Pohl (Pohl, abstract, paragraphs 32-286, describes an analogous rendering system to Ha’s system, including selectively processing a subset of first rendered tiles for a frame using an NPU/ML processing super-sampling technique, e.g. paragraphs 229-286. Further, Pohl, e.g. paragraphs 72-86, 283, teaches that the ML processing may be denoising for a ray tracing process.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system, performing Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format, using Saleh’s application/CPU specified tile size, to perform Pohl’s ray tracing denoising neural network processing when the first set of tiles are rendered using ray tracing in order to generate second intermediate tiles having denoised rendering results, i.e. as one of ordinary skill in the art would know, e.g. in view of Pohl, denoising is conventionally performed as part of a ray tracing process, and Pohl teaches that the denoising may be performed by a neural network.
Claims 18-20 and 24 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2023/0368456 A1 (hereinafter Ha) in view of U.S. Patent Application Publication 2021/0142145 A1 (hereinafter Bastani) in view of U.S. Patent Application Publication 2015/0264299 A1 (hereinafter Leech) in view of U.S. Patent Application 2018/0182066 A1 (hereinafter Saleh) as applied to claims 1 and 22 above, and further in view of “Split & Dual Screen Comparison of Classic vs Object-based Video” by Maarten Wijnants, et al. (hereinafter Wijnants).
Regarding claim 18, the limitation “further comprising a second frame generator configured to integrate the first and second subset of tiles to generate a second output frame” is partially taught by Ha (Ha, as discussed in the claim 1 rejection above, teaches a third graphics process is performed by the GPU to generate final tiles of an output frame for display using the second intermediate set of tiles, i.e. the claimed second set of tiles. Ha, e.g. paragraphs 63, 65, 66, 76, further teaches that in some instances, only a portion of the first intermediate set of tiles are processed by the NPU to generate the second intermediate set of tiles, and the final tile set may include a portion of the first intermediate tile set which is not processed by the NPU, such that the final tile set corresponding to the output image is generated by combining the remaining portion of the first intermediate tiles with the second intermediate set of tiles, i.e. as claimed, the first set of tiles includes a second subset of tiles, corresponding to Ha’s remaining portion of the first intermediate tiles which are not processed by the NPU. While Ha, e.g. paragraphs 52-54, 71-73, teaches that the first intermediate tiles are stored in memory in addition to the second intermediate tiles and final image tiles, Ha does not teach using the GPU to generate a second output frame using the claimed first and second subsets, i.e. using the full set of first intermediate tiles.) However, this is suggested by Wijnants (Wijnants, e.g. abstract, sections 1-4, describes an interactive system designed to allow users to visually compare video rendering results from classic frame-based encoding techniques to a new object-based encoding technique by presenting a split-screen interface, e.g. section 3, figure 1 bottom, wherein the corresponding frames are presented with classic frame-based rendered images on one side and the new object-based rendered images on the other side. That is, Wijnants teaches that a human observer can perceptually compare the results of a conventional rendering technique and an improved rendering technique by presenting corresponding frames on one screen.)
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ha’s tiled rendering system, performing Bastani’s foveated super-resolution technique using Leech’s focus/gaze foveated area/region definition format, using Saleh’s application/CPU specified tile size, to use Wijnants’ split-screen display technique in order to allow a user to visually compare the results of Ha’s improved ML processing rendering technique with the results of conventional GPU only rendering, i.e. as noted above, Ha’s system stores the first intermediate set of tiles in addition to the second intermediate set of tiles, such that a complete conventionally tile rendered result is already generated by Ha’s GPU and stored in memory, and Wijnants suggests it is advantageous to display both conventional and improved rendered frames in the split-screen display technique in order to allow a user to visually compare the results, i.e. visually recognize how the improved result compares to the conventional result. In Ha’s modified system, the GPU would generate a second output frame using the first intermediate set of tiles, corresponding to the claimed second frame generator generating a second output frame using the first and second subsets of the first set of tiles. It is additionally noted that this modification teaches the limitations of depending claims 19 and 20, i.e. as in claim 19, Wijnants indicates that the application may be run through a web browser interface with an interactive element, i.e. a CPU running an application activating the interface and controlling the GPU to perform rendering and display of the first and second frames as a combined third frame, and as in claim 20, the third frame is a split screen including the first and second frames. It is additionally noted that if the user were to drag the vertical divider all the way to the left or right, the respective first or second output frames would be shown in full screen.
Regarding claims 19, 20 and 24, the limitations are similar to those treated in the above rejection(s) and are met by the references as discussed in claim 18 above.
Response to Arguments
Applicant’s arguments, see page 10, filed 4/3/26, with respect to the rejection(s) of claim(s) 1, 3, 15-21, 24, 29, and 30 under 35 U.S.C. 103(a) in view of Ha, Bastani, Leech, Craik, Rohmetra, Pohl, and Wijnants have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Ha, Bastani, Leech, Saleh, Craik, Rohmetra, Pohl, and Wijnants.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ROBERT BADER/Primary Examiner, Art Unit 2611
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