Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is the first office action on the merits and is responsive to the papers filed 02/27/2023. Claims 1-20 are currently pending and examined below.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Specification
The disclosure is objected to because of the following informalities:
In paragraph [0011], [0028] N’ should be written N
Appropriate correction is required.
Claim Objections
Claims 3 and 13 are objected to because of the following informalities:
Claims 3 and 13, N’ should be –N—
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Sakaguchi et al. (US 20200348416 A1, “Sakaguchi”).
Regarding claim 1, Sakaguchi teaches a direct time of flight (dTOF) sensing module (Fig. 1, [0102], [0105]-[0108], Sakaguchi discloses a time-of-flight sensor including a SPAD array and histogram processing for calculating distance based on photon arrival times. The system measures time-of-flight directly using photon timing.), comprising:
W light sensitive units (Figs. 2-3, Sakaguchi discloses a two-dimensional SPAD array including a plurality of SPAD pixels 20 ([108], [0112]). Each SPAD pixel functions as a light sensitive unit),
H histogram data storage units (Sakaguchi explicitly discloses histogram memory units 170–177 ([0168]).).
Sakaguchi fails to explicitly teach wherein every K light sensitive units of the W light sensitive units share a first storage,wherein a size of the first storage space is a size of a storage space corresponding to one histogram data storage unit K is less than or equal to W, and both W and H are integers greater than or equal to 2, and a processing control unit configured to:
control gating of N light sensitive units, wherein the N light sensitive units occupy the first storage space, the N light sensitive units are N of the K light sensitive units sharing the first storage space, and N is an integer less than or equal to K, and allocate Q time slice bins to each gated light sensitive unit, wherein Q is a positive integer; and the N gated light sensitive units and the Q time slice bins allocated to each gated light sensitive unit are used for the dTOF sensing module to operate in a first mode or a second mode, wherein a quantity N of gated light sensitive units corresponding to the first mode is greater than a quantity N of gated light sensitive units corresponding to the second mode; and/or a quantity Q of time slice bins allocated to each light sensitive unit corresponding to the first mode is less than a quantity Q of time slice bins allocated to each light sensitive unit corresponding to the second mode.
Sakaguchi discloses a direct time-of-flight sensing module including an array of SPAD light sensitive units configured to detect photons and generate histogram data corresponding to photon arrival times ([0108], [0112]). Sakaguchi further discloses histogram memory units 170–177 configured to store histogram sampling bins ([0168]–[0170]) and a control unit that operates the sensing module in selectable pixel modes in which groups of SPAD pixels (macro pixels) generate histogram data accumulated in histogram memory ([0099]). Sakaguchi also discloses modes in which different numbers of macro pixels are active and different numbers of histogram bins are allocated to each macro pixel, including 48 macro pixels with 256 bins ([0170], [0173]), 24 macro pixels with 512 bins ([0186]), 12 macro pixels with 1024 bins ([0198]), and 6 macro pixels with 2048 bins ([0211]). Thus Sakaguchi teaches a sensing architecture in which groups of light sensitive units generate histogram data stored in histogram storage units and the number of active units and allocated histogram bins varies depending on the operating mode. Although Sakaguchi does not explicitly express the architecture using the claim terminology that every K light sensitive units share a first storage space corresponding to one histogram data storage unit and that N of those units are gated within that storage space, it would have been obvious to one of ordinary skill in the art to implement the macro-pixel grouping such that K light sensitive units share the histogram storage space corresponding to a histogram memory unit and to gate N of those units for operation, since grouped SPAD pixels generate photon detection events accumulated in shared histogram memory ([0168]–[0170]). Furthermore, because the grouped units form a subset of the sensor array, K ≤ W, and Sakaguchi discloses multiple SPAD pixels and multiple histogram memory units, thereby satisfying W ≥ 2 and H ≥ 2. A person of ordinary skill in the art would have been motivated to implement the grouping and gating in this manner to efficiently manage histogram memory resources and provide configurable trade-offs between spatial resolution and histogram depth, as suggested by Sakaguchi ([0101], [0273]), yielding predictable results.
Regarding claim 2, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein the first storage space comprises M storage blocks, and M is a positive integer; the processing control unit is configured to: determine a first quantity of storage blocks occupied by each gated light sensitive unit; and allocate the Q time slice bins to each gated light sensitive unit based on a quantity of time slice bins that can be stored in the storage blocks and the first quantity.
Sakaguchi discloses histogram memory units configured to store histogram data associated with photon arrival times ([0168]–[0170]) and pixel modes in which histogram memory resources are allocated to macro pixels depending on the sensing configuration ([0099], [0170], [0186], [0198], [0211]). However, Sakaguchi does not explicitly describe the first storage space as comprising M storage blocks and determining a quantity of storage blocks occupied by each gated light sensitive unit for allocating time slice bins. It would have been obvious to one of ordinary skill in the art to implement the histogram memory architecture such that the storage space comprises multiple storage blocks and to determine the number of blocks used by each active sensor unit when allocating histogram bins, since histogram memory is implemented using memory blocks or addresses. A person of ordinary skill in the art would have been motivated to allocate storage blocks in this manner to efficiently manage memory resources and control the number of histogram bins available to each sensing unit.
Regarding claim 3, Sakaguchi fails to explicitly teach the sensing module according to claim 2, wherein the first quantity is M×1/N’, and Q =M×1N ×F, wherein F represents the quantity of the time slice bins stored in the storage blocks.
Sakaguchi discloses a time-of-flight sensing module including SPAD pixels grouped into macro pixels that generate histogram data stored in histogram memory units ([0112], [0168]–[0170]). Sakaguchi further discloses selectable pixel modes in which different numbers of macro pixels are active and different numbers of histogram bins are allocated to each macro pixel ([0099]). For example, Sakaguchi discloses modes including 48 macro pixels with 256 bins ([0170], [0173]), 24 macro pixels with 512 bins ([0186]), 12 macro pixels with 1024 bins ([0198]), and 6 macro pixels with 2048 bins ([0211]). These modes show that when the number of active sensing units N decreases, the amount of histogram memory allocated per unit increases proportionally. Although Sakaguchi does not explicitly express the allocation relationship using the mathematical expressions M/N and Q = (M/N) × F, it would have been obvious to one of ordinary skill in the art to determine the number of histogram bins allocated to each sensing unit based on the number of memory blocks assigned to that unit and the number of bins stored in each block, since histogram memory capacity directly determines the number of time bins available for storing photon arrival data. Thus, when M memory blocks are distributed among N active sensing units, each unit receives M/N blocks, and when each block stores F time slice bins, the number of bins allocated to each sensing unit is Q = (M/N) × F, yielding predictable results.
Regarding claim 4, Sakaguchi fails to explicitly teach sensing module according to claim 2, wherein the storage block is configured to store data generated when at least one light sensitive unit detects a first distance, and the first distance is a distance detected by the light sensitive unit.
Sakaguchi discloses a time-of-flight sensing system in which SPAD pixels detect photons reflected from a target and the photon arrival times are accumulated into histogram bins stored in histogram memory units ([0168]–[0170]). The histogram data corresponds to time-of-flight measurements used to determine the distance to the detected object. However, Sakaguchi does not explicitly describe the histogram storage blocks as storing data generated when a light sensitive unit detects a first distance. It would have been obvious to one of ordinary skill in the art to configure the histogram storage blocks to store data generated when one or more light sensitive units detect a distance, since the histogram bins record photon arrival times corresponding to distances measured by the time-of-flight sensing process. A person of ordinary skill in the art would have been motivated to implement the storage blocks in this manner because storing the detected photon timing information in histogram memory allows the system to compute the distance to the target based on the accumulated histogram data, which is the standard operation of time-of-flight ranging systems.
Regarding claim 5, Sakaguchi fails to explicitly teach the sensing module according to claim 4, wherein the first distance is C/2 x T x Q, C is a speed of light, and T is a period of the time slice bin.
Sakaguchi discloses a time-of-flight sensing system in which SPAD pixels detect photons reflected from a target and the photon arrival times are accumulated into histogram bins representing discrete time intervals ([0168]–[0170]). The accumulated histogram data is used to determine the time of flight of the emitted optical signal and thereby determine the distance to the target object. However, Sakaguchi does not explicitly express the detected distance using the formula C/2 × T × Q as recited in the claim, where C represents the speed of light, T represents the time interval of each time slice bin, and Q represents the bin index or number of bins corresponding to the detected photon arrival time. It would have been obvious to one of ordinary skill in the art to determine the distance associated with a detected histogram bin using the known time-of-flight relationship between the propagation speed of light, the time interval of the bin, and the round-trip travel time of the emitted optical signal, since distance measurement in time-of-flight systems is conventionally determined from the measured photon arrival time according to the relationship distance = (speed of light × time of flight)/2. A person of ordinary skill in the art would have been motivated to express the detected distance in this manner because the time intervals represented by the histogram bins directly correspond to photon travel time and therefore to the distance between the sensing module and the target, yielding predictable results.
Regarding claim 6, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein the first storage space is provided by one of the H histogram data storage units; or the first storage space is provided by at least two of the H histogram data storage units.
Sakaguchi discloses multiple histogram memory units (e.g., histogram memory units 170–177) configured to store histogram sampling bins corresponding to photon arrival times ([0168]–[0170]). These memory units provide storage space used to accumulate histogram data generated by the SPAD sensor units. However, Sakaguchi does not explicitly state that the first storage space is provided by either one histogram data storage unit or multiple histogram data storage units as recited in the claim. It would have been obvious to one of ordinary skill in the art to implement the storage space using one or more histogram memory units, since histogram memory resources in sensing systems are commonly organized across one or more memory blocks depending on design requirements such as memory capacity and sensor configuration. A person of ordinary skill in the art would have been motivated to allocate the storage space using one or multiple histogram memory units to efficiently manage histogram data storage and accommodate different sensing modes.
Regarding claim 7, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein the W light sensitive units are a light sensitive unit array; and the K light sensitive units are K adjacent light sensitive units in a column of the light sensitive unit array, or K adjacent light sensitive units in a row of the light sensitive unit array.
Sakaguchi discloses an array of SPAD pixels forming the light sensing structure of the time-of-flight sensing module ([0112]). However, Sakaguchi does not explicitly describe the grouped light sensitive units as adjacent units arranged in a row or column of the sensor array. It would have been obvious to one of ordinary skill in the art to group adjacent light sensitive units within a row or column of the sensor array, since adjacent grouping simplifies sensor addressing, readout circuitry design, and layout implementation in imaging arrays. A person of ordinary skill in the art would have been motivated to organize the grouped sensor units in this manner to facilitate efficient control and data readout in the sensor architecture.
Regarding claim 8, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein when N is less than K, the W light sensitive units are gated in L times, and L is determined based on K and N.
Sakaguchi discloses that the control unit operates the sensing module in selectable pixel modes that activate different numbers of macro pixels depending on the selected sensing configuration ([0099]). However, Sakaguchi does not explicitly describe gating the light sensitive units in multiple gating cycles when the number of active units is less than the number of grouped units. It would have been obvious to one of ordinary skill in the art to activate the light sensitive units in multiple gating cycles when fewer units are selected for operation, since sequential activation of sensor groups allows the sensing system to reuse sensor resources while adjusting sensing resolution and memory allocation. A person of ordinary skill in the art would have been motivated to implement such sequential gating in order to balance sensing resolution, measurement range, and memory utilization.
Regarding claim 9, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein a manner of controlling gating of each of the N light sensitive units comprises one of the following: row enable control and column enable control; row enable control; or column enable control.
Sakaguchi discloses a control unit that determines which sensor units are active during operation ([0099]). However, Sakaguchi does not explicitly describe the gating control as row enable control, column enable control, or both. It would have been obvious to one of ordinary skill in the art to implement row enable and/or column enable control to gate the sensor units, since row-column addressing is the conventional control architecture used in pixel arrays and SPAD sensor arrays to selectively activate sensor units.
Regarding claim 10, Sakaguchi fails to explicitly teach the sensing module according to claim 1, wherein the processing control unit is configured to: receive a first instruction, and control gating of the N light sensitive units according to the first instruction, wherein the first instruction is determined based on a target resolution; and receive a second instruction, and allocate the Q time slice bins to each gated light sensitive unit according to the second instruction, wherein the second instruction is determined based on the target resolution and a target distance.
Sakaguchi discloses a control unit that configures the operation of the sensing module according to selected pixel modes ([0099]). However, Sakaguchi does not explicitly describe receiving instructions determined based on target resolution and target distance for controlling the gating of light sensitive units and allocating time slice bins. It would have been obvious to one of ordinary skill in the art to configure the control unit to receive configuration instructions based on sensing parameters such as target resolution and target distance, since sensing systems commonly adjust operating modes and memory allocation based on measurement requirements. A person of ordinary skill in the art would have been motivated to implement such instruction-based control to dynamically configure the sensing module for different sensing scenarios.
Claims 11- 19 are method claims corresponding to device claims 1-10. They are rejected for the same reasons.
Claim 20 is a non-transitory machine-readable storage medium having instructions stored therein, which when executed by a processor, cause the processor to perform operations. Sakaguchi discloses a control unit executing program control of pixel modes and histogram processing ([0098]–[0099]). Claim is rejected for the same reason as claimed 1.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Sharma et al. (US 20170052065 A1), teaches SPAD Array with Gated Histogram Construction
Whitehouse et al. (US 20020175292 A1), teaches Multiple Detection Systems
Buckley et al. (US 20180164415 A1), teaches Histogram Readout Method and Circuit for determing the time of flight of a photon
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/JEMPSON NOEL/Examiner, Art Unit 3645
/YUQING XIAO/Supervisory Patent Examiner, Art Unit 3645