Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. The Amendment filed on 09/26/2025 has been entered. Claims 1, 3, and 13 have been amended. Claims 2 and 9 have been canceled. Claims 1, 3-8, and 10-19 remain pending in the application. Objection to the title is withdrawn. Rejections of claims 3-5 and 13-19 under 35 U.S.C. 112(b) (pre-AIA 35 U. S. C. 112, second paragraph) are withdrawn.
Claim Rejections – 35 USC § 112
3. The following is a quotation of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same and shall set forth the best mode contemplated by the inventor of carrying out his invention. (FP 7.30.01)
4. Claims 17-19 and 11-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 17-19 depend on claim 13. Claim 13 recites the limitations “wherein the effective display region is provided with a plurality of first traces extending in a first direction, ……; wherein in at least some of the first traces whose extension directions pass through the hole- punch region, portions of each first trace respectively arranged on two sides of the hole-punch region are connected by one of first windings, and at least some of the first windings are located in the effective display region …… wherein each of the first windings comprises a first segment, a second segment, and a third segment, the first segment extends in the first direction, and both the second segment and the third segment extend in the second direction; ……, one end of the second segment is connected to a portion that is of the first trace and that is located on one side of the hole-punch region; one end of the third segment is connected to a portion that is of the first trace and that is located on the other side of the hole-punch region; and the other end of the second segment is connected to the other end of the third segment by the first segment”. According to claim 13, for the first traces whose extension directions pass through the hole- punch region, portions of each first trace respectively arranged on two sides of the hole-punch region are connected by a winding wire to detour around the hole-punch region. The claim features in claim 13 can be found in the specification and are supported by Figs. 3a, 4, 7, 15, and 17. Claims 17-19 depend on claim 13 and further recite the limitations “wherein some of the first traces are light emitting signal wires, and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a light emitting signal wire whose extension direction passes through the hole-punch region are disconnected”, “wherein some of the first traces are scanning lines, and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a scanning line whose extension direction passes through the hole-punch region are disconnected, and lengths of the portions of the scanning line respectively arranged on the two sides of the hole-punch region are equal to each other” and “wherein some of the first traces are initial voltage lines, and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of an initial voltage line whose extension direction passes through the hole-punch region are disconnected, and lengths of the portions of the initial voltage line respectively arranged on the two sides of the hole-punch region are equal to each other”. According to claims 17-19, for the first traces whose extension directions pass through the hole-punch region, the two portions that are respectively arranged on the two sides of the hole-punch region are disconnected or there is no winding wire to connect the two portions that are respectively arranged on the two sides of the hole-punch region. The claim features in claims 17-19 can be found in [0092]-[0093] of the specification and are supported by Fig. 19. Therefore, the claim features in claims 17-19 are in contradictory with the features in claim 13. Applicant appears to mix different embodiments; however, the original disclosure explicitly teaches that the embodiment corresponding to Fig. 19 and the embodiments corresponding to Figs. 3a, 4, 7, 15, and 17 are distinct, alternative approaches to each other, nowhere in the specification and the drawing discloses the combination of these embodiments as recited in claims 13 and 17-19. Claim 11 depends on claim 1 and recites same or similar limitation as claims 17-19 and therefore is rejected for the same reasons above. Claim 12 is rejected as being dependent upon a rejected base claim.
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 1, 3-8, and 13-15 are rejected under 35 U.S.C. 103 as unpatentable over Bang (US 20210320163 A1) in view of Um (US 20210167160 A1) and/or Park (US 20200110525 A1).
Regarding claim 1, Bang (e.g., Figs. 19-17) discloses a display panel (display device 10), wherein the display panel is provided with an effective display region (display area DA), a hole-punch region (hole area TH), and a border region (border area DSA) surrounding the hole-punch region (hole area TH), wherein the border region (border area DSA) is between the hole punch region (hole area TH) and the effective display region (display area DA);
the effective display region (display area DA) is provided with a plurality of first traces (signal lines VL) extending in a first direction (Y direction), and second traces (signal lines SL) extending in a second direction (X direction), wherein the first direction (Y direction) is perpendicular to the second direction (X direction);
in at least some of the first traces (signal lines VL) whose extension directions pass through the hole- punch region (hole area TH), portions of each first trace (signal lines VL) respectively arranged on two sides of the hole-punch region (hole area TH) are connected by one of first windings (connection line CL), and at least some of the first windings (connection lines CL) are located in the effective display region (display area DA); and/or in at least some of the second traces whose extension directions pass through the hole-punch region, portions of each second trace respectively arranged on two sides of the hole- punch region are connected by one of second windings, and at least some of the second windings are located in the effective display region (alternative limitation, it is interpreted as optional; in addition, Figs. 19 and 17 teach the limitations signal lines SL, hole area TH, and connection line GCL);
wherein each of the first windings (connection line CL) comprises a first segment (segment CLb), a second segment (segment CLa), and a third segment (segment CLc), the first segment (segment CLb) extends in the first direction (Y direction), and both the second segment (segment CLa) and the third segment (segment CLc) extend in the second direction (X direction); and
in each group of a first trace of said some of the first traces and said one of the first windings (connection line CL) that corresponds to the first trace (signal lines VL), one end of the second segment (segment CLa) is connected to a portion that is of the first trace (segment CLb) and that is located on one side of the hole-punch region (hole area TH);
one end of the third segment (segment CLc) is connected to a portion that is of the first trace (signal lines VL) and that is located on the other side of the hole-punch region (hole area TH); and the other end of the second segment (segment CLa) is connected to the other end of the third segment (segment CLc) by the first segment (segment CLb).
Bang does not disclose wherein an average resistance value per unit length of each of the first windings is lower than an average resistance value per unit length of the corresponding first trace; and/or an average resistance value per unit length of each of the second windings is lower than an average resistance value per unit length of the corresponding second trace. Since Bang (e.g., Figs. 17-19) discloses the signal lines VL (SL) with and without connection lines CL (GCL) have different length, it results in a resistance difference between adjacent signal lines, which causes a signal delay and a nonuniform display brightness. It is well in the field how to compensate the resistance difference due to the length difference of signal lines. For examples, Um (e.g., Figs. 12-15 and [0200]-[0202]) and/or Park (Figs. 8-10 and [0200]) discloses a compensation of resistance difference of signal lines in accordance with resistance equation so that the signal lines having different length have the same resistance. Therefore, as disclosed by Bang (e.g., Fig. 17 is reproduced below for reference), a first signal line VL1 has a length L=L1+L2+L3 and a resistance of R1=RL1+RL2+RL3 and a second signal line VL2 has a length L=L1+(L21+L22+L23)+L3=L1+L2’+L3 and a resistance R2=RL1+RL2’+RL3. When the resistance difference between VL1 and VL2 is compensated, the following condition is satisfied: R1=R2, and RL2=RL2’. According to resistance equation, RL2= ρL2/A2 and RL2’= ρL2’/A2’. Since L2’>L2, we have RL2’/L2’<RL2/L2. The same principle is applied to the compensation of resistance difference of signal lines SL (e.g., Bang’s Fig. 18).
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Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Um and/or Park to the display device of Bang. The combination/motivation would be to minimize the resistance difference of signal lines and improve the image quality of the display device.
Regarding claim 3, Bang in view of Um and/or Park discloses the display panel according to claim 2, Bang (e.g., Figs. 19-17) discloses wherein in said one of the first windings (connection line CL), the first segment (segment CLb), the second segment (segment CLa), and the third segment (segment CLc) each are disposed hierarchically with respect to the corresponding first trace (connection line CL).
Regarding claim 4, Bang in view of Um and/or Park discloses the display panel according to claim 3, Bang (e.g., Figs. 19-17) discloses wherein in each of at least some of the first windings (connection line CL), the second segment (segment CLa) and the third segment (segment CLc) each are disposed hierarchically with respect to the first segment (segment CLb).
Regarding claim 5, Bang in view of Um and/or Park discloses the display panel according to claim 2, Bang (e.g., Figs. 19-17) discloses wherein at least some of the first traces are signal wires (signal lines VL; [0104]); and in at least some of the signal wires, one first segment (segment CLb) is disposed on at least one side of the second direction of each signal wire (signal lines VL), and/or the signal wire and one first segment are stacked (alternative limitation, it is interpreted as optional; in addition, Figs. 19-21 teach the limitations).
Regarding claim 6, Bang in view of Um and/or Park discloses the display panel according to claim 1, Bang (e.g., Figs. 19-17) discloses wherein each of the second windings (connection line GCL) comprises a fourth segment (segment GCLb), a fifth segment (segment GCLa), and a sixth segment (segment GCLc), the fourth segment (segment GCLb) extends in the second direction (X direction), and both the fifth segment (segment GCLa) and the sixth segment (segment GCLc) extend in the first direction (Y direction); and in each group of a second trace of some of the second traces (signal line SL) and said one of the second windings (connection line GCL) that corresponds to the first trace (signal line VL), one end of the fifth segment (segment GCLa) is connected to a portion that is of the second trace (signal line SL) and that is located on one side of the hole-punch region (hole area TH); one end of the sixth segment (segment GCLc) is connected to a portion that is of the second trace (signal line SL) and that is located on the other side of the hole-punch region (hole area TH); and the other end of the fifth segment (segment GCLa) is connected to the other end of the sixth segment (segment GCLc) by the fourth segment (segment GCLb).
Regarding claim 7, Bang in view of Um and/or Park discloses the display panel according to claim 6, Bang (e.g., Figs. 19-17) discloses wherein in said one of the second windings (connection line GCL), the fourth segment (segment GCLb), the fifth segment (segment GCLa), and the sixth segment (segment GCLc) each are disposed hierarchically with respect to the corresponding second trace (connection line GCL).
Regarding claim 8, Bang in view of Um and/or Park discloses the display panel according to claim 7, wherein in each of the second windings (connection line GCL), the fifth segment (segment GCLa) and the sixth segment (segment GCLc) each are disposed hierarchically with respect to the fourth segment (segment GCLb).
Regarding claim 13, Bang (e.g., Figs. 1-2 and 19-17) discloses a terminal device (display device 10), comprising a camera (camera 740; [0083]-[0084]) and the display panel (display panel 300), wherein the display panel is provided with an display area DA), a hole-punch region (hole area TH), and a border region (border area DSA) surrounding the hole-punch region (hole area TH), wherein the border region (border area DSA) is between the hole punch region (hole area TH) and the effective display region (display area DA);
wherein the effective display region (display area DA) is provided with a plurality of first traces (signal lines VL) extending in a first direction (Y direction), and second traces (signal lines SL) extending in a second direction (X direction), wherein the first direction (Y direction) is perpendicular to the second direction (X direction);
wherein in at least some of the first traces (signal lines VL) whose extension directions pass through the hole- punch region (hole area TH), portions of each first trace (signal lines VL) respectively arranged on two sides of the hole-punch region (hole area TH) are connected by one of first windings (connection line CL), and at least some of the first windings (connection line CL) are located in the effective display region display area DA); and/or in at least some of the second traces whose extension directions pass through the hole-punch region, portions of each second trace respectively arranged on two sides of the hole-punch region are connected by one of second windings, and at least some of the second windings are located in the effective display region (alternative limitation, it is interpreted as optional; in addition, Figs. 19 and 17 teach the limitations signal lines SL, hole area TH, and connection line GCL),
wherein each of the first windings (connection line CL) comprises a first segment (segment CLb), a second segment (segment CLa), and a third segment (segment CLc), the first segment (segment CLb) extends in the first direction (Y direction), and both the second segment (segment CLa) and the third segment (segment CLc) extend in the second direction (X direction); and
in each group of a first trace of said some of the first traces (signal lines VL) and said one of the first windings (connection line CL) that corresponds to the first trace (signal lines VL), one end of the second segment (segment CLa) is connected to a portion that is of the first trace (segment CLb) and that is located on one side of the hole-punch region (hole area TH);
one end of the third segment (segment CLc) is connected to a portion that is of the first trace (signal lines VL) and that is located on the other side of the hole-punch region (hole area TH); and the other end of the second segment (segment CLa) is connected to the other end of the third segment (segment CLc) by the first segment (segment CLb); and
wherein the camera (camera 740) is disposed on a side (bottom side) that is of the display panel (display panel 300) and that is away from a light emitting surface (top surface) of the display panel (display panel 300), and is configured to receive light passing through the hole-punch region (hole area TH) to perform imaging.
Bang does not disclose wherein an average resistance value per unit length of each of the first windings is lower than an average resistance value per unit length of the corresponding first trace; and/or an average resistance value per unit length of each of the second windings is lower than an average resistance value per unit length of the corresponding second trace. Since Bang (e.g., Figs. 17-19) discloses the signal lines VL (SL) with and without connection lines CL (GCL) have different length, it results in a resistance difference between adjacent signal lines, which causes a signal delay and a nonuniform display brightness. It is well in the field how to compensate the resistance difference due to the length difference of signal lines. For examples, Um (e.g., Figs. 12-15 and [0200]-[0202]) and/or Park (Figs. 8-10 and [0200]) discloses a compensation of resistance difference of signal lines in accordance with resistance equation so that the signal lines having different length have the same resistance. Therefore, as disclosed by Bang (e.g., Fig. 17 is reproduced below for reference), a first signal line VL1 has a length L=L1+L2+L3 and a resistance of R1=RL1+RL2+RL3 and a second signal line VL2 has a length L=L1+(L21+L22+L23)+L3=L1+L2’+L3 and a resistance R2=RL1+RL2’+RL3. When the resistance difference between VL1 and VL2 is compensated, the following condition is satisfied: R1=R2, and RL2=RL2’. According to resistance equation, RL2= ρL2/A2 and RL2’= ρL2’/A2’. Since L2’>L2, we have RL2’/L2’<RL2/L2. The same principle is applied to the compensation of resistance difference of signal lines SL (e.g., Bang’s Fig. 18).
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Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Um and/or Park to the display device of Bang. The combination/motivation would be to minimize the resistance difference of signal lines and improve the image quality of the display device.
Regarding claim 14, Bang in view of Um and/or Park discloses the terminal device according to claim 13, Bang (e.g., Figs. 1-2 and 19-17) discloses wherein at least some of the first traces are signal wires, and in at least some of the signal wires (signal lines VL), one first segment (segment CLb) is disposed on at least one side of the second direction (X direction) of each signal wire (signal lines VL).
Regarding claim 15, Bang in view of Um and/or Park discloses the terminal device according to claim 13, Bang (e.g., Figs. 1-2 and 19-17) discloses wherein at least some of the first traces are signal wires (signal lines VL), and in at least some of the signal wires, the signal wire and one first segment (segment CLb) are stacked ([0213] and [0295]).
7. Claims 10 and 16 are rejected under 35 U.S.C. 103 as unpatentable over Bang (US 20210320163 A1) in view of Um (US 20210167160 A1) and/or Park (US 20200110525 A1) and further in view of Jeong (US 20210083038 A1).
Regarding claim 10 and claim 16, Bang in view of Um and/or Park discloses the display device of claim 1 and the terminal device of claim 13, but does not disclose wherein in the at least some of the first traces whose extension directions pass through the hole-punch region, the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected; and/or in the at least some of the second traces whose extension directions pass through the hole-punch region, the portions of each second trace respectively arranged on the two sides of the hole-punch region are disconnected. However, Jeong (Fig. 4) discloses a display device similar to that disclosed by Bang, wherein in the at least some of the first traces (signal lines PLa/PLb) whose extension directions pass through the hole-punch region (hole area TA), the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected (Fig. 4 and [0122]-[0123]); and/or in the at least some of the second traces whose extension directions pass through the hole-punch region, the portions of each second trace respectively arranged on the two sides of the hole-punch region are disconnected (alternative limitation, it is interpreted as optional). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Jeong to the display device of Bang in view of Um and/or Park. The combination/motivation would be to provide a power line arrangement around a hole area to uniformly supply driving voltages to pixel circuits.
8. Claims 10-12 and 16-17 are rejected under 35 U.S.C. 103 as unpatentable over Bang (US 20210320163 A1) in view of Um (US 20210167160 A1) and/or Park (US 20200110525 A1) and further in view of Seo (US 20200411625 A1).
Regarding claim 10, Bang in view of Um (US 20210167160 A1) and/or Park discloses the display device of claim 1, but does not disclose wherein in the at least some of the first traces whose extension directions pass through the hole-punch region, the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected; and/or in the at least some of the second traces whose extension directions pass through the hole-punch region, the portions of each second trace respectively arranged on the two sides of the hole-punch region are disconnected. However, Seo (Figs. 6 and 8) discloses a display device similar to that disclosed by Bang, wherein in the at least some of the first traces whose extension directions pass through the hole-punch region, the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected (e.g., Figs. 6 and 8; signal lines SL/EL/Vint); and/or in the at least some of the second traces whose extension directions pass through the hole-punch region, the portions of each second trace respectively arranged on the two sides of the hole-punch region are disconnected (e.g., Figs. 6 and 8; signal lines PL). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Seo to the display device of Bang. The combination/motivation would be to provide a signal line arrangement around a hole area of a display panel.
Regarding claim 11, Bang in view of Um and/or Park and further in view of Seo discloses the display device of claim 10, Seo (Figs. 6 and 8) discloses wherein some of the first traces are light emitting signal wires (e.g., Figs. 5-6 and 8; emission control signal lines EL), and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a light emitting signal wire whose extension direction passes through the hole-punch region are disconnected (e.g., Figs. 5-6 and 8; emission control signal lines EL are disconnected); and/or some of the first traces are scanning lines, and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a scanning line whose extension direction passes through the hole-punch region are disconnected, and lengths of the portions of the scanning line respectively arranged on the two sides of the hole- punch region are equal to each other (alternative limitation, it is interpreted as optional; in addition, Figs. 5-6 and 8-9 teach the limitations scanning signal lines SL); and/or some of the first traces are initial voltage lines, and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of an initial voltage line whose extension direction passes through the hole-punch region are disconnected, and lengths of the portions of the initial voltage line respectively arranged on the two sides of the hole-punch region are equal to each other (alternative limitation, it is interpreted as optional; in addition, Figs. 5-6 and 8 teach the initial voltage signal lines Vint). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Seo to the display device of Bang in view of Um and/or Park. The combination/motivation would be to provide a signal line arrangement around a hole area of a display panel.
Regarding claim 12, Bang in view of Um and/or Park and further in view of Seo discloses the display device of claim 11, Seo (Figs. 6 and 8) discloses wherein some of the second traces are electroluminescent device drain voltage lines (Figs. 5-6 and 8; driving voltage lines PL), and, of at least one of the second traces, portions that are respectively arranged on the two sides of the hole-punch region and that are of an electroluminescent device drain voltage line whose extension direction passes through the hole-punch region are disconnected (Figs. 5-6 and 8; driving voltage lines PL are disconnected). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Seo to the display device of Bang in view of Um and/or Park. The combination/motivation would be to provide a signal line arrangement around a hole area of a display panel.
Regarding claim 16, Bang in view of Um and/or Park discloses the terminal device of claim 13, but does not disclose wherein in the at least some of the first traces whose extension directions pass through the hole-punch region, the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected; and/or in the at least some of the second traces whose extension directions pass through the hole- punch region, the portions of each second trace respectively arranged on the two sides of the hole- punch region are disconnected. However, Seo (Figs. 6 and 8) discloses a display device similar to that disclosed by Bang, wherein in the at least some of the first traces (e.g., Figs. 6 and 8; signal lines SL/EL/Vint) whose extension directions pass through the hole-punch region, the portions of each of first traces respectively arranged on the two sides of the hole-punch region are disconnected (e.g., Figs. 6 and 8; signal lines SL/EL/Vint); and/or in the at least some of the second traces whose extension directions pass through the hole- punch region, the portions of each second trace respectively arranged on the two sides of the hole- punch region are disconnected (e.g., Figs. 6 and 8; signal lines PL). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Seo to the display device of Bang in view of Um and/or Park. The combination/motivation would be to provide a signal line arrangement around a hole area of a display panel.
Regarding claim 17, Bang in view of Um and/or Park and further in view of Seo discloses the display device of claim 16, Seo (Figs. 5-6 and 8) discloses wherein some of the first traces are light emitting signal wires (e.g., Figs. 5-6 and 8; emission control signal lines EL), and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a light emitting signal wire whose extension direction passes through the hole-punch region are disconnected (e.g., Figs. 5-6 and 8; emission control signal lines EL are disconnected). Therefore, it would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Seo to the display device of Bang in view of Um and/or Park for the same reason above.
9. Claims 18-19 are rejected under 35 U.S.C. 103 as unpatentable over Bang (US 20210320163 A1) in view of Um (US 20210167160 A1) and/or Park (US 20200110525 A1) and in view of Seo (US 20200411625 A1) and further in view of Chung (US 20170277219 A1).
Regarding claim 18, Bang in view of Um and/or Park and further in view of Seo discloses the display device of claim 16, Seo (Figs. 5-6 and 8) discloses wherein some of the first traces are scanning lines (Figs. 5-6 and 8; scanning signal lines SL), and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of a scanning line whose extension direction passes through the hole-punch region are disconnected (Figs. 5-6 and 8; scanning signal lines SL are disconnected), Seo (Figs. 5-6 and 8) also discloses lengths of the portions of the scanning line respectively arranged on the two sides of the hole-punch region are equal to each other (Figs. 6 and 8). The examiner further cites Chung as a reference. Chung (e.g., Figs. 4 and 6) discloses a display device similar to that disclosed by Bang and Seo, wherein a camera 400 is disposed at a center position corresponding to a hole area 455 of a display device. It would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Bang in view of Seo to the display device of Chung or incorporate the teaching from Chung to the display device of Bang in view of Seo. The combination/motivation would be to provide an arrangement of scanning lines for a display panel to reduce the resistance difference of scanning lines on two sides of camera module and corresponding hole area and improve the image quality.
Regarding claim 19, Bang in view of Um and/or Park and further in view of Seo and Chung discloses the display device of claim 16, Seo (Figs. 5-6 and 8) discloses wherein some of the first traces are initial voltage lines (e.g., Figs. 5-6 and 8; initial voltage signal lines Vint), and, of at least one of the first traces, two portions that are respectively arranged on the two sides of the hole-punch region and that are of an initial voltage line whose extension direction passes through the hole-punch region are disconnected, and lengths of the portions of the initial voltage line respectively arranged on the two sides of the hole-punch region are equal to each other (e.g., Figs. 5-6 and 8; initial voltage signal lines Vint are disconnected). The examiner further cites Chung as a reference. Chung (e.g., Figs. 4 and 6) discloses a display device similar to that disclosed by Bang and Seo, wherein a camera 400 is disposed at a center position corresponding to a hole area 455 of a display device. It would have been obvious to one skilled in the art at the effective filing date of the claimed invention to incorporate the teaching from Bang in view of Seo to the display device of Chung or incorporate the teaching from Chung to the display device of Bang in view of Seo. The combination/motivation would be to provide an arrangement of voltage lines for a display panel to reduce the resistance difference of voltage lines on two sides of camera module and corresponding hole area and improve the image quality.
Response to Arguments
10. Applicant's arguments filed 09/26/2025 have been fully considered but they are not persuasive.
11. Applicant has amended claims 1 and 13 by incorporating with limitations of original claim 9. Applicant further argues that the cited references do not disclose the new limitations “wherein an average resistance value per unit length of each of the first windings is lower than an average resistance value per unit length of the corresponding first trace; and/or an average resistance value per unit length of each of the second windings is lower than an average resistance value per unit length of the corresponding second trace” recited in claims 1 and 13.
The examiner respectfully disagrees with applicant’s arguments. Bang (e.g., Figs. 17-19) discloses the signal lines VL (or SL) with and without connection lines CL (or GCL) have different length, it results in a resistance difference between adjacent signal lines, which causes a signal delay and a nonuniform display brightness. It is well in the field how to compensate the resistance difference due to the length difference of signal lines using resistance equation. For examples, Um (e.g., Figs. 12-15 and [0200]-[0202]) and/or Park (Figs. 8-10 and [0200]) discloses a compensation of resistance difference of signal lines in accordance with resistance equation so that the signal lines having different length have the same resistance. Therefore, as disclosed by Bang (e.g., Fig. 17 is reproduced below for reference), a first signal line VL1 has a length L=L1+L2+L3 and a resistance of R1=RL1+RL2+RL3 and a second signal line VL2 has a length L=L1+(L21+L22+L23)+L3=L1+L2’+L3 and a resistance R2=RL1+RL2’+RL3. When the resistance difference between VL1 and VL2 is compensated, the following condition is satisfied: R1=R2, and RL2=RL2’. According to resistance equation, RL2= ρL2/A2 and RL2’= ρL2’/A2’. Since L2’>L2, we have RL2’/L2’<RL2/L2. The same principle is applied to the compensation of resistance difference of signal lines SL (e.g., Bang’s Fig. 18).
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Regarding rejections of claims 17-19 and 11-12 under 35 U.S.C. 112(a) (pre-AIA 35 U. S. C. 112, first paragraph), claims 17-19 depend on claim 13. According to claim 13, for the first traces whose extension directions pass through the hole- punch region, portions of each first trace respectively arranged on two sides of the hole-punch region are connected by a winding wire to detour around the hole-punch region. According to claims 17-19, for the first traces whose extension directions pass through the hole-punch region, the two portions that are respectively arranged on the two sides of the hole-punch region are disconnected or there is no winding wire to connect the two portions that are respectively arranged on the two sides of the hole-punch region. Therefore, the claim features in claims 17-19 are in contradictory with the features in claim 13. Nowhere in the specification and the drawing discloses the features as claimed in claim 13 together with the features as claimed in claims 17-19. Claims 11-12 depends on claim 1 and are rejected for the same reason above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUZHEN SHEN whose telephone number is (571)272-1407. The examiner can normally be reached on 9:00-18:00.
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/YUZHEN SHEN/Primary Examiner, Art Unit 2623
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