Prosecution Insights
Last updated: May 29, 2026
Application No. 18/177,579

MEMS COMPENSATION LOOP

Final Rejection §103
Filed
Mar 02, 2023
Examiner
EASON, MATTHEW A
Art Unit
2600
Tech Center
2600 — Communications
Assignee
Infineon Technologies AG
OA Round
4 (Final)
75%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
518 granted / 689 resolved
+13.2% vs TC avg
Strong +21% interview lift
Without
With
+21.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
7 currently pending
Career history
697
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
81.4%
+41.4% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
2.6%
-37.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 689 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Request for Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on September 12, 2025 has been entered. Response to Amendments The amendment filed August 26, 2025 has been entered. Applicant’s amendments to the Specification and Claims have overcome each and every 112(b) rejection previously set forth in the Final Office Action mailed July 23, 2025. Response to Applicant Remarks With respect to Applicant's remarks filed August 26, 2025, as well as the amendments of claims 1, 12 and 19, please see the explanations for the respective claims rejections under the section heading Claim Rejections - 35 USC § 103, as well as the prior art made of record listed under the section heading Conclusion. Information Disclosure Statement The two information disclosure statements (IDS) submitted on March 02, 2023 and July 29, 2024 have been considered by the examiner. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 9-14, 16-20 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Niederberger (U.S. Patent Application Publication No. 2022/0369013 A1) in view of Kumar (U.S. Patent Application Publication No. 2018/0069513 A1) and in further view of Weisbauer (U.S. Patent No. 10589987 B2). Regarding claim 1, Niederberger teaches: A circuit (Niederberger, Fig.10) comprising: a differential amplifier (Niederberger, Fig.10, Amp 1030) having inputs configured to be coupled to an output of a differential microelectromechanical systems (MEMS) device (Niederberger, Fig.10, See Differential MEMS); and an amplifier (Niederberger, Fig 10, Amp 1006) and a single output (Niederberger, Fig.10, Output Vbal) configured to be AC coupled to a bias input node (Niederberger, Fig.10, VBIAST1 & VBIASTB) of the differential MEMS device (Niederberger, Fig.10, Output Vbal from Amplifier 1006 is AC coupled to biasing input of Differential MEMS.) wherein: the differential MEMS device comprises two membranes (Niederberger, Fig.3, Diaphragms 202a and 204a) and a single counter electrode disposed between the two membranes, the single counter electrode is configured to provide a single electrical potential (Niederberger, Fig.3, 7 and11: Backplate 230 with layers 202b/232 and 204b/236 electrically connected through Terminals 238 and 240 as shown in Figs.7 and 11. This electrical connection provides a single electrical potential and makes Niederberger’s Backplate 230 electrically equivalent to the applicant’s claim of a single counter electrode, with a single electrical potential, between the two Diaphragms, or membranes, 202a and 204a) that is capacitively coupled to both of the two membranes (Niederberger, Par 0043: “...each transduction element could be a MEMS device having a corresponding back plate and a corresponding diaphragm...causing an associated capacitance value...”), and the bias input node of the differential MEMS device is connected to the single counter electrode (Niederberger, Fig.3 shows a cross section of two capacitive microphones 202 and 204, with a combined Backplate 230; See also Par 29: “In the illustrated embodiment, the back plate 230 includes multiple layers including an insulator 234 that is sandwiched between a pair of separate conductors 232 and 236, where each one of the pair of conductors is associated with a respective one of the transduction elements. Each of the conductors can have a different associated bias voltage terminal 238 and 240...”; Having the two conducting layers 232 and 236 mechanically sandwiched with insulator layer 234 in between – as shown in Fig. 3 -- gives them common mechanical characteristics and behaviors, such as if there was only a single layer. Having the electrodes 238 and 240 connected together -- as shown in Figs.7 or 11 -- gives the two conducting layers common electrical characteristics and behaviors, as well. These considerations make the separate conducting layers of Niederberger behave as a single counter electrode, with a single electrical potential, such as is indicated in the applicant’s claim. Ultimately, Niederberger’s Backplate 230 residing between Diaphragms 202a and 204a is functionally equivalent to the applicant’s claim of ‘a single counter electrode disposed between the two membranes’.). Niederberger is not relied upon herein to teach: a common mode coupling circuit coupled to an output of the differential amplifier; the common mode coupling circuit configured to provide a common mode AC voltage from a differential signal produced by the differential amplifier; an amplifier having an input coupled to an output of the common mode coupling circuit. Kumar teaches: a common mode coupling circuit (Kumar, Fig. 2, 206) coupled to an output of the differential amplifier (Kumar, Fig 2, 204); the common mode coupling circuit configured to provide a common mode AC voltage (Kumar, Fig.8 Shows Resistors for 208-1 and 208-2. Resistors allow both AC and DC voltages to pass through. Indeed, particularly for resistors, each current type even sees the same impedance. Thus a common mode AC signal will be treated in the same manner as a common mode DC signal, by the resistors 208-1 and 208-2 of Fig.8. As a result, a common mode AC voltage will be provided by Kumar’s coupling circuit 206.) from a differential signal produced by the differential amplifier (Kumar, Figs. 2 and 8, 204); and an amplifier (Kumar, Fig 2, 210) having an input (Kumar, Fig, 210a) coupled to an output (Kumar, Fig.2, Vcmo) of the common mode coupling circuit (Kumar, Fig. 2, 206). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘a common mode coupling circuit coupled to an output of the differential amplifier; an amplifier having an input coupled to an output of the common mode coupling circuit.’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Niederberger is also not relied upon herein to teach: or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane. Wiesbauer teaches: or the differential MEMS device comprises a membrane disposed between two counter electrodes (Wiesbauer, Fig.13, Diaphragm 1306 between Backplates 1304 and 1302), and the bias input node of the differential MEMS device is connected to the membrane (Wiesbauer, Fig.13, Diaphragm 1306 connected to Electrical Contact 1316; See also Wiesbauer, Col 9, Ln 32-34: “...diaphragm 1306 may have a bias voltage applied via electrical contact 1316...” ). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane’ in Niederberger’s invention as taught by Wiesbauer’s invention. The motivation for doing this would be to have two antiphase outputs (Wiesbauer, Col 9, Ln 38-39: “...output signals to electrical contacts 1312 and 1314 are antiphase.”). Regarding claim 2, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger teaches: further comprising a capacitor (Fig 10, CbalT & CbalB) having a first terminal (anode of capacitors) coupled to the output (Vbal) of the amplifier (1006) and a second terminal (cathode of capacitors) configured to be coupled to the bias input node (VBIAST1 & VBIASTB) of the differential MEMS device (Fig.10, CbalT or CbalB has its first terminal coupled to the output of amplifier 1006 and its second terminal coupled to the VBIAST or VBIASB connections to the bias input of the differential MEMS device.). Regarding claim 3, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger is not relied upon herein to teach: wherein the common mode coupling circuit comprises a first resistor coupled between a first differential output node of the differential amplifier and the input of the amplifier, and a second resistor coupled between a second differential output node of the differential amplifier and the input of the amplifier. However, Kumar teaches: wherein the common mode coupling circuit (Fig 2, 206) comprises a first resistor (208 - top) coupled between a first differential output node (208-2) of the differential amplifier (204) and the input (210a) of the amplifier (210), and a second resistor (208 - bottom) coupled between a second differential output node (208-2) of the differential amplifier (204) and the input of the amplifier (210a) (Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein the common mode coupling circuit comprises a first resistor coupled between a first differential output node of the differential amplifier and the input of the amplifier, and a second resistor coupled between a second differential output node of the differential amplifier and the input of the amplifier.’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Regarding claim 4, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger is not relied upon herein to teach: wherein the common mode coupling circuit comprises a first capacitor coupled between a first differential output node of the differential amplifier and the input of the amplifier, and a second capacitor coupled between a second differential output node of the differential amplifier and the input of the amplifier. However, Kumar teaches: wherein the common mode coupling circuit (Fig 2, 206) comprises a first capacitor (208 - top) coupled between a first differential output node (208-2) of the differential amplifier (204) and the input (210a) of the amplifier (210), and a second capacitor (208 - bottom) coupled between a second differential output node (208-2) of the differential amplifier (204) and the input of the amplifier (210) (Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein the common mode coupling circuit comprises a first capacitor coupled between a first differential output node of the differential amplifier and the input of the amplifier, and a second capacitor coupled between a second differential output node of the differential amplifier and the input of the amplifier’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Regarding claim 9, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger teaches: further comprising a bias voltage circuit (1020) configured to be DC coupled the bias input node (VBIAST1 & VBIASTB) of the differential MEMS device (Fig.10, Bias voltage generator 1020 DC coupled to biasing input of MEMS.). Regarding claim 10, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger teaches: further comprising the differential MEMS device (Fig.10, See Differential MEMS shown in circuit.). Regarding claim 11, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The circuit of claim 1. Niederberger teaches: wherein the differential amplifier (Fig 10, 1030), and the amplifier (1006) are disposed on a single semiconductor substrate (Par 0002, “...a signal conditioning circuit and/or interface circuit, like an application specific integrated circuit (ASIC). These components are typically integrated in a package...”). Kumar also teaches: wherein the differential amplifier (Fig 2, 204), the common mode coupling circuit (206), and the amplifier (210) are disposed on a single semiconductor substrate (Par 0055, “The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a processor, a digital signal processor (DSP), an Application Specific Integrated Circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device...”). Regarding claim 12, Niederberger teaches: A method of operating a differential microelectromechanical systems (MEMS) device (Niederberger, Fig.12, Par 0062, “...an exemplary method of operating a sensor assembly...”), the method comprising: amplifying a differential output of the differential MEMS device to produce a differential output signal (Niederberger, Fig.12, Step 1206.); and reducing an asymmetry of the differential output signal (Niederberger, Par 0055, “...may utilize the differential output signal (or input) of the amplifier circuit 730 as input for the controller. In this way a balancing signal may be applied to adjust the effective sensitivity of each of the MEMS capacitors.”) and feeding back the amplified common mode AC voltage to a bias input node of the differential MEMS device (Niederberger, Fig.12, Step 1210, Par 0062, “...The balance signal is then applied 1210 to the sensor.”) wherein: the differential MEMS device comprises two membranes (Niederberger, Fig.3, Diaphragms 202a and 204a) and a single counter electrode disposed between the two membranes, the single counter electrode is configured to provide a single electrical potential (Niederberger, Fig.3, 7 and11: Backplate 230 with layers 202b/232 and 204b/236 electrically connected through Terminals 238 and 240 as shown in Figs.7 and 11. This electrical connection provides a single electrical potential and makes Niederberger’s Backplate 230 electrically equivalent to the applicant’s claim of a single counter electrode, with a single electrical potential, between the two Diaphragms, or membranes, 202a and 204a) that is capacitively coupled to both of the two membranes (Niederberger, Par 0043: “...each transduction element could be a MEMS device having a corresponding back plate and a corresponding diaphragm...causing an associated capacitance value...”), and the bias input node of the differential MEMS device is connected to the single counter electrode (Niederberger, Fig.3 shows a cross section of two capacitive microphones 202 and 204, with a combined Backplate 230; See also Par 29: “In the illustrated embodiment, the back plate 230 includes multiple layers including an insulator 234 that is sandwiched between a pair of separate conductors 232 and 236, where each one of the pair of conductors is associated with a respective one of the transduction elements. Each of the conductors can have a different associated bias voltage terminal 238 and 240...”; Having the two conducting layers 232 and 236 mechanically sandwiched with insulator layer 234 in between – as shown in Fig. 3 -- gives them common mechanical characteristics and behaviors, such as if there was only a single layer. Having the electrodes 238 and 240 connected together -- as shown in Figs.7 or 11 -- gives the two conducting layers common electrical characteristics and behaviors, as well. These considerations make the separate conducting layers of Niederberger behave as a single counter electrode, with a single electrical potential, such as is indicated in the applicant’s claim. Ultimately, Niederberger’s Backplate 230 residing between Diaphragms 202a and 204a is functionally equivalent to the applicant’s claim of ‘a single counter electrode disposed between the two membranes’.). Niederberger is not relied upon herein to teach: comprising: generating a common mode AC voltage from the differential output signal. Kumar teaches: comprising: generating a common mode AC voltage (Fig 2, 206) from the differential output signal (Par 0027, “...common-mode detector 206 coupled to second stage 204. In particular, each of output voltages V.sub.OUT+ and V.sub.OUT− is fed as an input into common-mode detector 206. The output voltages V.sub.OUT+ and V.sub.OUT− are averaged by common-mode detector 206 to yield common-mode output voltage V.sub.CMO, which is an output of common-mode detector 206.”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘comprising: generating a common mode AC voltage from the differential output signal’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Niederberger is also not relied upon herein to teach: or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane. Wiesbauer teaches: or the differential MEMS device comprises a membrane disposed between two counter electrodes (Wiesbauer, Fig.13, Diaphragm 1306 between Backplates 1304 and 1302), and the bias input node of the differential MEMS device is connected to the membrane (Wiesbauer, Fig.13, Diaphragm 1306 connected to Electrical Contact 1316; See also Wiesbauer, Col 9, Ln 32-34: “...diaphragm 1306 may have a bias voltage applied via electrical contact 1316...” ). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane’ in Niederberger’s invention as taught by Wiesbauer’s invention. The motivation for doing this would be to have two antiphase outputs (Wiesbauer, Col 9, Ln 38-39: “...output signals to electrical contacts 1312 and 1314 are antiphase.”). Regarding claim 13, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The method of claim 12. Niederberger teaches: further comprising: generating a DC bias voltage; and DC coupling the DC bias voltage to the bias input node of the differential MEMS device (Fig.10, Bias voltage generator 1020 is DC coupled to biasing input of differential MEMS.). Regarding claim 14, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The method of claim 12. Niederberger teaches: wherein amplifying the differential output of the differential MEMS device (Fig 10, Differential MEMS) to produce the differential output signal comprises using a differential amplifier (Fig 10, Differential Amplifier 1030). Niederberger is not relied upon herein to teach: and generating the common mode AC voltage comprises using a capacitive voltage divider coupled to outputs of the differential MEMS device. Kumar teaches: wherein generating the common mode AC voltage comprises using a capacitive voltage divider coupled to outputs of the differential amplifier (Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein generating the common mode AC voltage comprises using a capacitive voltage divider coupled to outputs of the differential MEMS device’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Regarding claim 16, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The method of claim 12. Niederberger teaches: wherein amplifying the differential output of the differential MEMS device (Niederberger, Fig 10, Differential MEMS) to produce the differential output signal comprises using a differential amplifier (Niederberger, Fig 10, Differential Amplifier 1030). Niederberger is not relied upon herein to teach: and generating the common mode AC voltage comprises using a resistive voltage divider coupled to outputs of the differential amplifier. Kumar teaches: wherein generating the common mode AC voltage comprises using a resistive voltage divider coupled to outputs of the differential MEMS device (Kumar, Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein generating the common mode AC voltage comprises using a resistive voltage divider coupled to outputs of the differential MEMS device’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Regarding claim 17, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The method of claim 12. Niederberger teaches: wherein feeding back the amplified common mode AC voltage comprises feeding back the amplified common mode AC voltage to the bias input node of the differential MEMS device via a capacitor (Fig.10, CbalT or CbalB has its first terminal coupled to the output of amplifier 1006 and its second terminal coupled to the VBIAST or VBIASB connections to the bias input of the differential MEMS device.). Regarding claim 18, Niederberger, in view of Kumar and in further view of Wiesbauer, teaches: The method of claim 12. Niederberger teaches: wherein: the differential MEMS device comprises a differential MEMS microphone (Par 0021, “Such sensors can be fabricated from microelectromechanical systems (MEMS)... In one implementation, the sensor is an acoustic sensor and the electrical circuit is a microphone signal processing circuit.); and the method further comprises amplifying sound using the differential MEMS microphone (Fig.10, Amplifying the output of the Differential MEMS.). Regarding claim 19, Niederberger teaches: A microphone system comprising: a differential microelectromechanical systems (MEMS) device (Niederberger, Par 0004, “The present application provides a microphone device.”, Fig.10, See label Differential MEMS.); a differential amplifier coupled to an output of the differential MEMS device (Niederberger, Fig.10, See differential amplifier 1030.); an amplifier (Niederberger, Fig.10, See amplifier 1006); and wherein the amplifier is configured to amplify a common mode AC voltage at the output of the differential MEMS device (Niederberger, Fig.10, Amplifier 1006 amplifying common mode output Vcm from Differential Amplifier 1030); a feedback capacitor (Niederberger, Fig.10, CbalT or CbalB) coupled between an output of the amplifier and a bias input node of the differential MEMS device (Niederberger, Fig.10, See amplifier 1006 output Vbal which is AC coupled to biasing connection of Differential MEMS, through capacitors CbalT or CbalB.), wherein: the differential MEMS device comprises two membranes (Niederberger, Fig.3, Diaphragms 202a and 204a) and a single counter electrode disposed between the two membranes, the single counter electrode is configured to provide a single electrical potential (Niederberger, Fig.3, 7 and11: Backplate 230 with layers 202b/232 and 204b/236 electrically connected through Terminals 238 and 240 as shown in Figs.7 and 11. This electrical connection provides a single electrical potential and makes Niederberger’s Backplate 230 electrically equivalent to the applicant’s claim of a single counter electrode, with a single electrical potential, between the two Diaphragms, or membranes, 202a and 204a) that is capacitively coupled to both of the two membranes (Niederberger, Par 0043: “...each transduction element could be a MEMS device having a corresponding back plate and a corresponding diaphragm...causing an associated capacitance value...”), and the bias input node of the differential MEMS device is connected to the single counter electrode (Niederberger, Fig.3 shows a cross section of two capacitive microphones 202 and 204, with a combined Backplate 230; See also Par 29: “In the illustrated embodiment, the back plate 230 includes multiple layers including an insulator 234 that is sandwiched between a pair of separate conductors 232 and 236, where each one of the pair of conductors is associated with a respective one of the transduction elements. Each of the conductors can have a different associated bias voltage terminal 238 and 240...”; Having the two conducting layers 232 and 236 mechanically sandwiched with insulator layer 234 in between – as shown in Fig. 3 -- gives them common mechanical characteristics and behaviors, such as if there was only a single layer. Having the electrodes 238 and 240 connected together -- as shown in Figs.7 or 11 -- gives the two conducting layers common electrical characteristics and behaviors, as well. These considerations make the separate conducting layers of Niederberger behave as a single counter electrode, with a single electrical potential, such as is indicated in the applicant’s claim. Ultimately, Niederberger’s Backplate 230 residing between Diaphragms 202a and 204a is functionally equivalent to the applicant’s claim of ‘a single counter electrode disposed between the two membranes’.); and a bias generator DC coupled to the bias input node of the differential MEMS device (Fig.10, See bias voltage generator 1020 DC coupled to biasing input of Differential MEMS.). Niederberger is not relied upon herein to teach: a first impedance coupled between a first differential output of the differential amplifier and a first input node of the amplifier; a second impedance coupled between a second differential output of the differential amplifier and the first input node of the amplifier. Kumar teaches: a first impedance (Fig.2, 208-top) coupled between a first differential output (208-2) of the differential amplifier and a first input node (210a) of the amplifier; a second impedance (208-bottom) coupled between a second differential output (208-2) of the differential amplifier and the first input node (210a) of the amplifier (Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...”) It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘a first impedance coupled between a first differential output of the differential amplifier and a first input node of the amplifier; a second impedance coupled between a second differential output of the differential amplifier and the first input node of the amplifier’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Niederberger is also not relied upon herein to teach: or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane. Wiesbauer teaches: or the differential MEMS device comprises a membrane disposed between two counter electrodes (Wiesbauer, Fig.13, Diaphragm 1306 between Backplates 1304 and 1302), and the bias input node of the differential MEMS device is connected to the membrane (Wiesbauer, Fig.13, Diaphragm 1306 connected to Electrical Contact 1316; See also Wiesbauer, Col 9, Ln 32-34: “...diaphragm 1306 may have a bias voltage applied via electrical contact 1316...” ). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘or the differential MEMS device comprises a membrane disposed between two counter electrodes, and the bias input node of the differential MEMS device is connected to the membrane’ in Niederberger’s invention as taught by Wiesbauer’s invention. The motivation for doing this would be to have two antiphase outputs (Wiesbauer, Col 9, Ln 38-39: “...output signals to electrical contacts 1312 and 1314 are antiphase.”). Regarding claim 20, Niederberger, in view of Kumar and in further view of Weisbauer, teaches: The microphone system of claim 19. Niederberger teaches: wherein the differential amplifier (Fig.10, 1030), the amplifier (Fig.10, 1006) and the bias generator (Fig.10, 1020) are disposed on a single semiconductor substrate (Par 0002, “...a signal conditioning circuit and/or interface circuit, like an application specific integrated circuit (ASIC). These components are typically integrated in a package...”). Kumar also teaches: wherein the differential amplifier (Fig.2, 204), the amplifier (Fig.2, 210) are disposed on a single semiconductor substrate (Par 0055, “The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a processor, a digital signal processor (DSP), an Application Specific Integrated Circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device...”). Regarding claim 22, Niederberger, in view of Kumar and in further view of Weisbauer, teaches: The microphone system of claim 19. Niederberger is not relied upon herein to teach: wherein: the first impedance comprises a first capacitor; and the second impedance comprises a second capacitor. Kumar teaches: wherein: the first impedance comprises a first capacitor (Fig 2, 208 - top); and the second impedance comprises a second capacitor (Fig 2, 208 - bottom) (Fig.2, Par 0027, “...common-mode detector 206 may include impedance elements 208, which may include one or more resistive elements, one or more capacitive elements...). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein: the first impedance comprises a first capacitor; and the second impedance comprises a second capacitor’ in Niederberger’s invention as taught by Kumar’s invention. The motivation for doing this would be to have a simple architecture, occupy less area and consume less power (Kumar, Par 0020, “Common-mode feedback (CMFB) circuits... Embodiments provide a CMFB circuit for a differential amplifier that has a stable CMFB loop and that, in comparison to conventional CMFB methods or circuits, is simple in architecture, occupies less area, consumes less power...”). Claims 5-7, 15, 21 are rejected under 35 U.S.C. 103 as being unpatentable over Niederberger (U.S. Patent Application Publication No. 2022/0369013 A1) in view of Kumar (U.S. Patent Application Publication No. 2018/0069513 A1), in further view of Weisbauer (U.S. Patent No. 10589987 B2) and in further view of Draxelmayer (U.S. 20140077882 A1). Regarding claim 5, Niederberger, in view of Kumar and in further view of Weisbauer, teaches: The circuit of claim 4. Niederberger is not relied upon herein teach: further comprising a feedback capacitor coupled between the input of the amplifier and the output of the amplifier. Draxelmayr teaches: further comprising a feedback capacitor (Fig 2a, C2) coupled between the input of the amplifier (202) and the output of the amplifier (Fig.2a, Par 0024, “Programmable gain amplifier 200 includes amplifier 202 having... capacitor C2 in feedback.”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘further comprising a feedback capacitor coupled between the input of the amplifier and the output of the amplifier’ in Niederberger’s modified invention as taught by Draxelmayr’s invention. The motivation for doing this would be to allow Niederberger’s amplifier to better interface with the capacitive network due to the capacitive feedback (Draxelmayr, Par 0003: “...amplifiers that interface to capacitive signal sources... have a high impedance input stage that are often implemented using amplifiers with capacitive feedback.”). Regarding claim 6, Niederberger, in view of Kumar, in further view of Weisbauer and in further view of Draxelmayr, teaches: The circuit of claim 5. Niederberger is not relied upon herein to teach: further comprising a high resistance bias circuit coupled in parallel with the feedback capacitor. Draxelmayr teaches: further comprising a high resistance bias circuit (Fig 2a, C3, S1, S2) coupled in parallel with the feedback capacitor (Fig.2a, Par 0024, “Programmable gain amplifier 200 includes amplifier 202...”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘further comprising a high resistance bias circuit coupled in parallel with the feedback capacitor’ in Niederberger’s modified invention as taught by Draxelmayr’s invention. The motivation for doing this would be to allow Niederberger’s amplifier to better interface with the capacitive network due to the capacitive feedback (Draxelmayr, Par 0003: “...amplifiers that interface to capacitive signal sources... have a high impedance input stage that are often implemented using amplifiers with capacitive feedback.”). Regarding claim 7, Niederberger, in view of Kumar, in further view of Weisbauer and in further view of Draxelmayr, teaches: The circuit of claim 6. Niederberger is not relied upon herein to teach: wherein the high resistance bias circuit comprises a switched capacitor circuit. Draxelmayr teaches: wherein the high resistance bias circuit comprises a switched capacitor circuit (Fig.2a, Par 0025, “Switches S1 and S2 selectively couple terminals of C3 to ground or to corresponding terminals of capacitor C2.”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein the high resistance bias circuit comprises a switched capacitor circuit’ in Niederberger’s modified invention as taught by Draxelmayr’s invention. The motivation for doing this would be to allow Niederberger’s differential amplifier to have an adjustable gain by using the switched capacitors (Draxelmayr, Par 0022: “The gain of the capacitive amplifier may be adjusted...”). Regarding claim 15, Niederberger, in view of Kumar, in further view of Weisbauer and in further view of Draxelmayr, teaches: The method of claim 14. Niederberger is not relied upon herein to teach: wherein amplifying the common mode AC voltage comprises using an amplifier with a capacitive feedback network. Draxelmayr teaches: wherein amplifying the common mode AC voltage comprises using an amplifier (Fig 2, 202) with a capacitive feedback network (Fig.2a, Par 0024, “Programmable gain amplifier 200 includes amplifier 202 having... capacitor C2 in feedback.”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein amplifying the common mode AC voltage comprises using an amplifier with a capacitive feedback network’ in Niederberger’s modified invention as taught by Draxelmayr’s invention. The motivation for doing this would be to allow Niederberger’s amplifier to better interface with the capacitive network due to the capacitive feedback (Draxelmayr, Par 0003: “...amplifiers that interface to capacitive signal sources... have a high impedance input stage that are often implemented using amplifiers with capacitive feedback.”). Regarding claim 21, Niederberger, in view of Kumar, in further view of Weisbauer and in further view of Draxelmayr, teaches: The microphone system of claim 19. Niederberger is not relied upon herein to teach: wherein the differential amplifier has a programmable gain. Draxelmayr teaches: wherein the differential amplifier has a programmable gain (Fig 2a, Par 0024, “FIG. 2a illustrates a programmable gain amplifier 200...”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein the differential amplifier has a programmable gain’ in Niederberger’s modified invention as taught by Draxelmayr’s invention. The motivation for doing this would be to allow Niederberger’s differential amplifier to take advantage of the dynamic range of the microphone through adjustments at the programmable gain amplifier. (Draxelmayr, Par 0020, “...the high dynamic range of the microphone may be utilized by compensating gain changes at the programmable gain amplifier...”). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Niederberger (U.S. Patent Application Publication No. 2022/0369013 A1) in view of Kumar (U.S. Patent Application Publication No. 2018/0069513 A1), in further view of Weisbauer (U.S. Patent No. 10589987 B2) in further view of Draxelmayer (U.S. 20140077882 A1), and in further view of Bayruns (U.S Patent No. 5646573 A). Regarding claim 8, Niederberger, in view of Kumar, in further view of Weisbauer and in further view of Draxelmayr, teaches: The circuit of claim 6. Niederberger is not relied upon herein to teach: wherein the high resistance bias circuit comprises a plurality of diodes coupled in series. Bayruns teaches: wherein the high resistance bias circuit comprises a plurality of diodes coupled in series (Fig.3, See 112 and 114; Par 0017, “FIG. 3... includes a feedback circuit comprising two feedback PIN diode connected in series.”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have used the teaching of ‘wherein the high resistance bias circuit comprises a plurality of diodes coupled in series’ in Niederberger’s modified invention as taught by Bayruns’ invention. The motivation for doing this would be to allow Niederberger’s differential amplifier to use the series connected diodes as a feedback circuit for improved bandwidth of the amplifier (Bayruns, Col 2, Ln 24-25: “...the bandwidth of the amplifier is improved due to the reduced total feedback capacitance.”). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Sun (US Patent Application Publication No. 2020/0186940 A1) discloses a dual diaphragm capacitive microphone with a single conductive layer in between the two outer diaphragms. Dehe (US Patent Application Publication No. 2018/0255402 A1) discloses a capacitive MEMS device with two membranes, (Fig.1C, Membranes 102 and 104), and a single counter electrode (Fig.1C, Counter Electrode108) in between the two membranes. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andres Lavin whose telephone number is 571-272-7628. The examiner can normally be reached. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Carolyn Edwards, can be reached on 571-270-7136. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Andres Lavin/ Examiner, Art Unit 2692 /CAROLYN R EDWARDS/Supervisory Patent Examiner, Art Unit 2692
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Prosecution Timeline

Show 2 earlier events
Jul 15, 2025
Response Filed
Jul 23, 2025
Final Rejection mailed — §103
Aug 26, 2025
Response after Non-Final Action
Sep 12, 2025
Request for Continued Examination
Sep 18, 2025
Response after Non-Final Action
Sep 25, 2025
Non-Final Rejection mailed — §103
Dec 29, 2025
Response Filed
May 27, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
75%
Grant Probability
96%
With Interview (+21.2%)
2y 7m (~0m remaining)
Median Time to Grant
High
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