Prosecution Insights
Last updated: April 19, 2026
Application No. 18/177,646

PIXEL SENSOR USING A DUAL PIXEL ARRAY

Final Rejection §103§112
Filed
Mar 02, 2023
Examiner
PHAM, QUAN L
Art Unit
2637
Tech Center
2600 — Communications
Assignee
Meta Platforms Technologies, LLC
OA Round
2 (Final)
70%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allow Rate
338 granted / 481 resolved
+8.3% vs TC avg
Strong +29% interview lift
Without
With
+29.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
38 currently pending
Career history
519
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
42.3%
+2.3% vs TC avg
§102
28.0%
-12.0% vs TC avg
§112
21.8%
-18.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 481 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This communication is responsive to the Amendment filed on 7/15/2025. In the Instant Amendment, Claim(s) 1, 5, 9, 15 and 16 has/have been amended; Claim(s) 3, 7, 12 and 18-20 was/were cancelled; Claim(s) 21-25 has/have been added; Claim(s) 1 and 16 is/are independent claims. Claims 1-2, 4-6, 8-11, 13-17 and 21-25 have been examined and are pending in this application. Information Disclosure Statement The information disclosure statement(s) submitted on 4/15/2025 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner. Response to Arguments The objection of claim 15 is withdrawn because of the amendment and the persuasive argument in the remark (page 13). The amendments to the specification and drawings for addressing informalities and the Applicant’s comments in the remark (page 13) regarding these amendments have been considered and are okay to enter. Applicant's arguments filed 7/15/2025 have been fully considered but they are not persuasive. Regarding claim 1, the Applicant is arguing in the remarks (pages 13-16) that Borthakur fails to disclose, teach or even fairly suggest the limitations summarized above. Kimura is directed to a method and apparatus for imaging an object. Kimura fails to disclose, teach or even fairly suggest the limitations summarized above. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). The Examiner respectfully submits that the combination of Borthakur and Kimura does teach the features as claimed in claim 1 where Borthakur in the combination teaches a dual pixel array comprising a controller, a memory (para. 0023; Storage and processing circuitry 18), and a plurality of pixel cell arrays (Figs. 1-4), each pixel cell array operatively coupled to the controller and the memory and comprising a plurality of photodiodes (Fig. 3; para. 0034; “FIG. 3, color filter elements 34 may be formed of red, green, blue… Clear elements 36, on the other hand, may be formed of a transparent dielectric material”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”; each 2x2 pixel array comprising three color PDs with color filter 34 and one PD with clear filter 36 as shown in figure 3), each photodiode configured to generate a charge in response to incoming light (paras. 0031-0035, 0050), wherein each of the pixel cell arrays (each 2x2 pixel array) comprise: one or more color photodiodes (34’s) each including a chromatic filter and coupled to a color-select switch (Figs. 2-4; paras. 0024, 0050; “Row control circuitry 26 may receive row addresses from control circuitry 24 and supply corresponding row control signals such as reset, row-select, charge transfer, dual conversion gain, and readout control signals to pixels 22 over row control paths 30”; these row control signals are shown more clearly by Kimura below); at least one associated monochrome photodiode (36) adjacent to the one or more color photodiodes (34’s) and coupled to a monochrome-select switch (Figs. 2-4; paras. 0024, 0050); and a plurality of charge storage devices, each charge storage device configured to convert the charge to a voltage (Figs. 2-4; paras. 0024, 0050; floating diffusion nodes), wherein the color photodiodes and the monochrome photodiodes are arranged according to an arrangement (Fig. 3; paras. 0033-0035), one or more color analog-to-digital converters ("ADC") (Fig. 2; para. 0025; “ADC circuitry in readout circuitry 28 may convert analog pixel values received from array 20 into corresponding digital pixel values (sometimes referred to as digital image data or digital pixel data)”), while Kimura in the combination teaches each color ADC (Red ADC 141, Blue ADC 142) connected to at least one of the charge storage devices (FD of Red and FD of Blue) of the color photodiodes (PD’s) via the respective color-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value; and one or more monochrome ADCs (Green Gr ADC 143, Green Gb ADC 144; Borthakur already taught one or both of the Green pixels are replaced by broadband image pixels having broadband/clear color filter elements; Thus, one or both of the Green ADC’s is broadband/clear ADC 143/144), each monochrome ADC (the broadband/clear ADC 143/144 as presented previously) connected to at least one of the charge storage devices (FD’s) of the monochrome photodiodes via the respective monochrome-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value, wherein the respective monochrome-select switch (SEL transistor for Green pixel replaced by broadband/clear pixel) and the respective color-select switch (SEL transistors for 121R, 121B pixels) are each coupled to a separate monochrome-enable line (R.S.S.L(3) or (4) for SEL transistor not shown in figure 3) and separate color-enable line (R.S.S.L.(1) or (2) control line for SEL transistor), to transfer voltage to a respective monochrome ADC and color ADC (Figs. 2-3; paras. 0033-0034; four ADCs for four R Gr Gb B color pixels in each 2x2 pixel array). Regarding claim 16, the above argument is also applicable since claim 16 recites features corresponding to claim 1. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 8 claims as a dependent of a canceled claim that is unclear upon which claim that it depends. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 2, 4-5, 9, 13 and 23-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al (US 20190123083 A1) in view of Kimura (US 20180070034 A1). Regarding claim 1, Borthakur teaches A sensor apparatus (Figs. 1-4) comprising: a dual pixel array comprising a controller, a memory (para. 0023; Storage and processing circuitry 18), and a plurality of pixel cell arrays (Figs. 1-4), each pixel cell array operatively coupled to the controller and the memory and comprising a plurality of photodiodes (Fig. 3; para. 0034; “FIG. 3, color filter elements 34 may be formed of red, green, blue… Clear elements 36, on the other hand, may be formed of a transparent dielectric material”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”; each 2x2 pixel array comprising three color PDs with color filter 34 and one PD with clear filter 36 as shown in figure 3), each photodiode configured to generate a charge in response to incoming light (paras. 0031-0035, 0050), wherein each of the pixel cell arrays (each 2x2 pixel array) comprise: one or more color photodiodes (34’s) each including a chromatic filter and coupled to a color-select switch (Figs. 2-4; paras. 0024, 0050; “Row control circuitry 26 may receive row addresses from control circuitry 24 and supply corresponding row control signals such as reset, row-select, charge transfer, dual conversion gain, and readout control signals to pixels 22 over row control paths 30”); at least one associated monochrome photodiode (36) adjacent to the one or more color photodiodes (34’s) and coupled to a monochrome-select switch (Figs. 2-4; paras. 0024, 0050); and a plurality of charge storage devices, each charge storage device configured to convert the charge to a voltage (Figs. 2-4; paras. 0024, 0050; floating diffusion nodes), wherein the color photodiodes and the monochrome photodiodes are arranged according to an arrangement (Fig. 3; paras. 0033-0035), one or more color analog-to-digital converters ("ADC") (Fig. 2; para. 0025; “ADC circuitry in readout circuitry 28 may convert analog pixel values received from array 20 into corresponding digital pixel values (sometimes referred to as digital image data or digital pixel data)”), but fails to teach each color ADC connected to at least one of the charge storage devices of the color photodiodes via the respective color-select switch, configured to selectively convert one or more stored voltages into a pixel value; and one or more monochrome ADCs, each monochrome ADC connected to at least one of the charge storage devices of the monochrome photodiodes via the respective monochrome-select switch, configured to selectively convert one or more stored voltages into a pixel value, wherein the respective monochrome-select switch and the respective color-select switch are each coupled to a separate monochrome-enable line and separate color-enable line, to transfer voltage to a respective monochrome ADC and color ADC. However, in the same field of endeavor Kimura teaches each color ADC (Red ADC 141, Blue ADC 142) connected to at least one of the charge storage devices (FD of Red and FD of Blue) of the color photodiodes (PD’s) via the respective color-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value; and one or more monochrome ADCs (Green Gr ADC 143, Green Gb ADC 144; Borthakur already taught one or both of the Green pixels are replaced by broadband image pixels having broadband/clear color filter elements; Thus, one or both of the Green ADC’s is broadband/clear ADC 143/144), each monochrome ADC (the broadband/clear ADC 143/144 as presented previously) connected to at least one of the charge storage devices (FD’s) of the monochrome photodiodes via the respective monochrome-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value, wherein the respective monochrome-select switch (SEL transistor for Green pixel replaced by broadband/clear pixel) and the respective color-select switch (SEL transistors for 121R, 121B pixels) are each coupled to a separate monochrome-enable line (R.S.S.L(3) or (4) for SEL transistor not shown in figure 3) and separate color-enable line (R.S.S.L.(1) or (2) control line for SEL transistor), to transfer voltage to a respective monochrome ADC and color ADC (Figs. 2-3; paras. 0033-0034; four ADCs for four R Gr Gb B color pixels in each 2x2 pixel array). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Kimura in Borthakur to have one or more color analog-to-digital converters ("ADC"), each color ADC connected to at least one of the charge storage devices of the color photodiodes via the respective color-select switch, configured to selectively convert one or more stored voltages into a pixel value; and one or more monochrome ADCs, each monochrome ADC connected to at least one of the charge storage devices of the monochrome photodiodes via the respective monochrome-select switch, configured to selectively convert one or more stored voltages into a pixel value, wherein the respective monochrome-select switch and the respective color-select switch are each coupled to a separate monochrome-enable line and separate color-enable line, to transfer voltage to a respective monochrome ADC and color ADC for enabling simultaneously digital signal readout improving photographing speed yielding a predicted result. Regarding claim 2, the combination of Borthakur and Kimura teaches everything as claimed in claim 1. In addition, Borthakur teaches wherein the one or more color photodiodes include at least one red photodiode comprising a red chromatic filter, at least one green photodiode comprising a green chromatic filter, and at least one blue photodiode comprising a blue chromatic filter (para. 0031). Regarding claim 4, the combination of Borthakur and Kimura teaches everything as claimed in claim 1. In addition, Borthakur teaches wherein each photodiode has an associated microlens (Fig. 4; para. 0050). Regarding claim 5, the combination of Borthakur and Kimura teaches everything as claimed in claim 2. In addition, Borthakur teaches wherein the arrangement comprises: a first row including a repeating pattern of the color and monochrome photodiodes; and a second row including a repeating pattern of the color and monochrome photodiodes, wherein successive rows of the arrangement alternate between the first and second rows (Fig. 2; para. 0031; The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel; the green pixels in a Bayer pattern are replaced by broadband image pixels). Regarding claim 9, the combination of Borthakur and Kimura teaches everything as claimed in claim 2. In addition, Borthakur teaches wherein the arrangement includes at least one color photodiode adjacent to at least one monochrome photodiode and the arrangement includes a 2x2 configuration (Figs. 2-4; para. 0031). Regarding claim 13, the combination of Borthakur and Kimura teaches everything as claimed in claim 2. In addition, Kimura teaches wherein the color ADCs comprise at least one red ADC associated with the red photodiode, at least one green ADC associated with the green photodiode, and at least one blue ADC associated with the blue photodiode (Figs. 2-3; paras. 0033-0034; one ADC circuit is provided for each color: red, green, blue in each photodiode in the pixel array). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Kimura in the combination to have teaches wherein the color ADCs comprise at least one red ADC associated with the red photodiode, at least one green ADC associated with the green photodiode, and at least one blue ADC associated with the blue photodiode for enabling simultaneously digital signal readout improving photographing speed yielding a predicted result. Regarding claim 23, the combination of Borthakur and Kimura teaches everything as claimed in claim 1. In addition, Borthakur teaches wherein each of the plurality of pixel cell arrays further comprises an all-pass photodiode with a filter stack including an all-pass element (clear element 36) to create a monochrome and infra-red channel for the all-pass photodiode (Fig. 4; para. 0029: “Clear color filter elements that are configured to pass red, green, blue, and other wavelengths of visible or non-visible light may also be referred to herein as broadband filter elements or broadband color filter elements”; para. 0050: “clear element 36 for a single photodiode is formed in each opening 54”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”). Regarding claim 24, the combination of Borthakur and Kimura teaches everything as claimed in claim 1. In addition, Borthakur teaches wherein each of the plurality of pixel cell arrays includes at least an additional monochrome photodiode or an all-pass photodiode to provide a monochrome and IR light channel for the photodiode (Fig. 4; para. 0029: “Clear color filter elements that are configured to pass red, green, blue, and other wavelengths of visible or non-visible light may also be referred to herein as broadband filter elements or broadband color filter elements”; para. 0050: “clear element 36 for a single photodiode is formed in each opening 54”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”). Regarding claim 25, the combination of Borthakur and Kimura teaches everything as claimed in claim 24. In addition, Borthakur teaches wherein if a pixel cell array includes a photodiode with a monochrome and IR light channel, the channel spans a wavelength range of 380-1000 nanometers (Fig. 4; para. 0029: “Clear color filter elements that are configured to pass red, green, blue, and other wavelengths of visible or non-visible light may also be referred to herein as broadband filter elements or broadband color filter elements”; para. 0050: “clear element 36 for a single photodiode is formed in each opening 54”; clear element 36 allows all light spectrum including a wavelength range of 380-1000 nanometers; Figures 4, 13 and paras. 0098-0103 of Toda (US 20080087800 A1) expressly show that clear/white filter allowing all light spectrum including a wavelength range of 380-1000 nanometers). Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al (US 20190123083 A1) in views of Kimura (US 20180070034 A1) and Liu et al (US 20200007798 A1). Regarding claim 16, Borthakur teaches A system (Figs. 1-4) comprising: a dual pixel array comprising a controller, a memory (para. 0023; Storage and processing circuitry 18), and a plurality of pixel cell arrays (Figs. 1-4), each pixel cell array operatively coupled to the controller and the memory and comprising a plurality of photodiodes (Fig. 3; para. 0034; “FIG. 3, color filter elements 34 may be formed of red, green, blue… Clear elements 36, on the other hand, may be formed of a transparent dielectric material”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”; each 2x2 pixel array comprising three color PDs with color filter 34 and one PD with clear filter 36 as shown in figure 3), each photodiode configured to generate a charge in response to incoming light (paras. 0031-0035, 0050), wherein each of the pixel cell arrays (each 2x2 pixel array) comprise: one or more color photodiodes (34’s) each including a chromatic filter and coupled to a color-select switch (Figs. 2-4; paras. 0024, 0050; “Row control circuitry 26 may receive row addresses from control circuitry 24 and supply corresponding row control signals such as reset, row-select, charge transfer, dual conversion gain, and readout control signals to pixels 22 over row control paths 30”; these row control signals are shown more clearly by Kimura below); and having at least one associated monochrome photodiode (36) with a monochrome filter and coupled to a monochrome-select switch (Figs. 2-4; paras. 0024, 0050); and a plurality of charge storage devices, each charge storage device configured to convert the charge to a voltage (Figs. 2-4; paras. 0024, 0050; floating diffusion nodes), wherein the color photodiodes and the monochrome photodiodes are arranged according to an arrangement (Fig. 3; paras. 0033-0035); one or more color analog-to-digital converters ("ADC") (Fig. 2; para. 0025; “ADC circuitry in readout circuitry 28 may convert analog pixel values received from array 20 into corresponding digital pixel values (sometimes referred to as digital image data or digital pixel data)”), but fails to teach a head-mounted display, wherein the head-mounted display comprises: a dual pixel array; each color ADC connected to at least one of the charge storage devices of the color photodiodes via the respective color-select switch, configured to selectively convert one or more stored voltages into a pixel value in response to a control signal; and one or more monochrome ADCs, each monochrome ADC connected to at least one of the charge storage devices of the monochrome photodiodes via the respective monochrome-select switch, configured to selectively convert one or more stored voltages into a pixel value in response to a control signal, wherein the monochrome-select switch and the color-select switch are each respectively coupled to a separate monochrome-enable line and separate color-enable line, to transfer voltage to a respective monochrome ADC and color ADC. However, in the same field of endeavor Kimura teaches each color ADC (Red ADC 141, Blue ADC 142) connected to at least one of the charge storage devices (FD of Red and FD of Blue) of the color photodiodes via the respective color-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value in response to a control signal; and one or more monochrome ADCs (Green Gr ADC 143, Green Gb ADC 144; Borthakur already taught one or both of the Green pixels are replaced by broadband image pixels having broadband/clear color filter elements; Thus, one or both of the Green ADC’s is broadband/clear ADC 143/144), each monochrome ADC (the broadband/clear ADC 143/144 as presented previously) connected to at least one of the charge storage devices (FD’s) of the monochrome photodiodes via the respective monochrome-select switch (SEL), configured to selectively convert one or more stored voltages into a pixel value in response to a control signal, wherein the monochrome-select switch (SEL transistor for Green pixel replaced by broadband/clear pixel) and the color-select switch (SEL transistors for 121R, 121B pixels) are each respectively coupled to a separate monochrome-enable line (R.S.S.L(3) or (4) for SEL transistor not shown in figure 3) and separate color-enable line (R.S.S.L.(1) or (2) control line for SEL transistor), to transfer voltage to a respective monochrome ADC and color ADC (Figs. 2-3; paras. 0033-0034; four ADCs for four R Gr Gb B color pixels in each 2x2 pixel array). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Kimura in Borthakur to have each color ADC connected to at least one of the charge storage devices of the color photodiodes via the respective color-select switch, configured to selectively convert one or more stored voltages into a pixel value in response to a control signal; and one or more monochrome ADCs, each monochrome ADC connected to at least one of the charge storage devices of the monochrome photodiodes via the respective monochrome-select switch, configured to selectively convert one or more stored voltages into a pixel value in response to a control signal, wherein the monochrome-select switch and the color-select switch are each respectively coupled to a separate monochrome-enable line and separate color-enable line, to transfer voltage to a respective monochrome ADC and color ADC for enabling simultaneously digital signal readout improving photographing speed yielding a predicted result. Moreover, in the same field of endeavor Liu teaches a head-mounted display, wherein the head-mounted display comprises: a dual pixel array (Figs. 1-2, 6; paras. 0061-0064). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Liu in the combination to have a head-mounted display, wherein the head-mounted display comprises: a dual pixel array for implementing an interactive VR/AR/MR system with image sensors providing rich interactive experience to the user yielding a predicted result. Claim(s) 6 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al (US 20190123083 A1) in view of Kimura (US 20180070034 A1) as applied to claims 2 or 5 above, and further in view of Mlinar et al (US 20200007853 A1). Regarding claim 6, the combination of Borthakur and Kimura teaches everything as claimed in claim 5, but fails to teach wherein: the repeating pattern of the first row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the second row includes photodiodes with filters having the sequence: green, monochrome, blue, monochrome. However, in the same field of endeavor Mlinar teaches wherein: the repeating pattern of the first row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the second row includes photodiodes with filters having the sequence: green, monochrome, blue, monochrome (this arrangement is obvious by suggestions by Fig. 9; paras. 0051-0053). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Mlinar in the combination to have wherein: the repeating pattern of the first row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the second row includes photodiodes with filters having the sequence: green, monochrome, blue, monochrome for implementing a different dual pixel arrangement taking advantage different benefit of a different pixel arrangement yielding a predicted result. Regarding claim 8, the combination of Borthakur and Kimura teaches everything as claimed in claim wherein: the repeating pattern of the third row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the fourth row includes photodiodes with filters having the sequence: monochrome, green, monochrome, blue. However, in the same field of endeavor Mlinar teaches wherein: the repeating pattern of the third row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the fourth row includes photodiodes with filters having the sequence: monochrome, green, monochrome, blue (this arrangement is obvious by suggestions by Fig. 9; paras. 0051-0053). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Mlinar in the combination to have wherein: the repeating pattern of the third row includes photodiodes with filters having the sequence: red, monochrome, green, monochrome; and the repeating pattern of the fourth row includes photodiodes with filters having the sequence: monochrome, green, monochrome, blue for implementing a different dual pixel arrangement taking advantage different benefit of a different pixel arrangement yielding a predicted result. Claim(s) 10 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al (US 20190123083 A1) in view of Kimura (US 20180070034 A1) as applied to claim 9 or 1 above, and further in view of Murata (US 20230362507 A1). Regarding claim 10, the combination of Borthakur and Kimura teaches everything as claimed in claim 9, but fails to teach wherein the adjacent photodiodes are associated with a first microlens. However, in the same field of endeavor Murata teaches wherein the adjacent photodiodes are associated with a first microlens (Fig. 2; 2x2 pixels share one micro-lens). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Murata in the combination to have wherein the adjacent photodiodes are associated with a first microlens for enabling obtaining focus signals without providing a separate focus detection device yielding a predicted result. Regarding claim 11, the combination of Borthakur and Kimura teaches everything as claimed in claim 1, but fails to teach wherein a second microlens is associated with four photodiodes arranged in a 2x2 configuration. However, in the same field of endeavor Murata teaches wherein a second microlens is associated with four photodiodes arranged in a 2x2 configuration (Fig. 2; 2x2 pixels share one micro-lens). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Murata in the combination to have wherein a second microlens is associated with four photodiodes arranged in a 2x2 configuration for enabling obtaining focus signals without providing a separate focus detection device yielding a predicted result. Claim(s) 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al (US 20190123083 A1) in view of Kimura (US 20180070034 A1) as applied to claim 1 above, and further in view of Ono et al (US 20190165021 A1). Regarding claim 21, the combination of Borthakur and Kimura teaches everything as claimed in claim 1, but fails to teach wherein each of the plurality of pixel cell arrays further comprise an infrared (IR) photodiode, including a filter stack including a visible-light blocking filter over the IR photodiode to create an infra-red channel. However, in the same field of endeavor Ono teaches wherein each of the plurality of pixel cell arrays further comprise an infrared (IR) photodiode, including a filter stack including a visible-light blocking filter over the IR photodiode to create an infra-red channel (Figs. 5-8). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Ono in the combination to have wherein each of the plurality of pixel cell arrays further comprise an infrared (IR) photodiode, including a filter stack including a visible-light blocking filter over the IR photodiode to create an infra-red channel for enabling suppression or prevention of leaking into the adjoining pixels allowing obtaining excellent quality images yielding a predicted result. Regarding claim 22, the combination of Borthakur, Kimura and Ono teaches everything as claimed in claim 21. In addition, Borthakur teaches wherein the one or more color photodiodes comprise at least a green photodiode adjacent to the IR photodiode (Figs. 3-4; para. 0034; “FIG. 3, color filter elements 34 may be formed of red, green, blue… Clear elements 36, on the other hand, may be formed of a transparent dielectric material”; para. 0031: “The Bayer mosaic pattern consists of a repeating unit cell of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel… In another suitable example, the green pixels in a Bayer pattern are replaced by broadband image pixels having broadband color filter elements (e.g., clear color filter elements)”). Allowable Subject Matter Claims 14, 15 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Quan Pham whose telephone number is (571)272-4438. The examiner can normally be reached Mon-Fri 9am-7pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Roberto Velez can be reached at 571-272-8597. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Quan Pham/Primary Examiner, Art Unit 2637
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Prosecution Timeline

Mar 02, 2023
Application Filed
Mar 22, 2025
Non-Final Rejection — §103, §112
Jun 19, 2025
Applicant Interview (Telephonic)
Jun 20, 2025
Examiner Interview Summary
Jul 15, 2025
Response Filed
Oct 15, 2025
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
70%
Grant Probability
99%
With Interview (+29.2%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 481 resolved cases by this examiner. Grant probability derived from career allow rate.

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