Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
The examiner acknowledges the amendment made to the independent claim 1. Claims 1-24 are currently pending in the present application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 10-13, 16, 22-24 is/are rejected under 35 U.S.C. 103 as being anticipated by Hirler (US Patent No 20150333134) in view of Asai (US Patent No 20080073752).
Regarding claim 1, Hirler teaches a conductive electrode comprising (semiconductor electrode body 100, [0028]): a substrate having first and second opposed main surfaces (first and second surfaces 101 and 102, [0028]) and a plurality of trenches extending between the first and second opposed main surfaces (see the plurality of trenches 103, [0031]); and a conductive material within the plurality of trenches and extending between the first and second opposed main surfaces so as to provide an electrically conductive path between the first and second opposed main surfaces (see for example the filling material 22 which is an electrically conductive material that is found within the trenches 103 and connected the first and second surfaces 101 and 102, [0044]).
Hirler does not explicitly teach in which the conductive material within the trench is in direct contact with the substrate.
However, the analogous semiconductor trench substrate apparatus which is taught by Asai does teach that the conductive material (see conductive electrode material 210, [0018]) within the trench (found within the electrode hole or trench 214, [0018]) is in direct contact with the substrate (see from fig 21C in which the conductive electrode material 210 is in direct contact with the substrate 202, see also [0018]).
Therefore, it would have been obvious for one skilled in the art prior to the effective filing date to combine the conductive trench electrode structure of Hirler, to contain the conductive trench material in direct contact with the substrate as taught by Asai as it is well known in the art in order to allow for better semiconductor capabilities and better electrical conduction as disclosed by Asai, [0018] – [0022].
Regarding claim 4, Hirler teaches the conductive electrode of claim 1, wherein the conductive material comprises at least one of Ag, Au, Cu, Al, Be, Mg, Ca, Na, Rh, Ir, carbon, carbon nanotubes, and graphene (The filling material 22 is, for example, an electrically conductive material, like a doped amorphous or polycrystalline semiconductor material, such as polysilicon, a metal, silicide or carbon, [0044], thereby encompassing the potential material compositions).
Regarding claim 10, Hirler teaches the conductive electrode of claim 1, wherein the substrate has a central portion containing the plurality of trenches and a peripheral portion surrounding the central portion that does not contain the plurality of trenches (see the two regions 11 and 12 seen in fig 1B and 1C in which it can be seen that the region 12 contains the trenches while region 11 does not contain the trenches).
Regarding claim 11, Hirler teaches the conductive electrode of claim 10, wherein the central portion has a larger thickness than the peripheral portion such that a gap is formed between the central portion and the peripheral portion at the second main surface of the substrate (see fig 1E which shows how a thickness is removed from the second surface 102 as to provide a thickness gap between the peripheral portion 11 and the thicker portion 12 contain the trenches 103 is shown of greater thickness thereby creating a gap, [0046]).
Regarding claim 12, Hirler teaches the conductive electrode of claim 1, wherein an area of the plurality of trenches is less than 50% of an entire area of the first or the second main surfaces of the substrate (Hirler describes that the area of the body 100 enclosed within the trench is selected so a desired resistance is obtained, furthermore Hirler describes that the trench is fully enclosed by the area of the body 100, [0038], and thereby definition the trenches must be less than 50% the area of the body 100, see also figs 1A-1E depicting smaller trench area).
Regarding claim 13, Hirler teaches the conductive electrode of claim 1, further comprising a lead-out electrode on the first main surface of the substrate (see first contact electrode 41 found on the first surface 101, [0052]) and electrically connected to the conductive material in the plurality of trenches (wherein the first electrode 41 is contacting the respective trench region, [0052]).
Regarding claim 16, Hirler teaches the conductive electrode of claim 13, wherein the conductive material comprises at least one of Ag, Au, Cu, Al, Be, Mg, Ca, Na, Rh, Ir, carbon, carbon nanotubes, and graphene (The filling material 22 is, for example, an electrically conductive material, like a doped amorphous or polycrystalline semiconductor material, such as polysilicon, a metal, silicide or carbon, [0044], thereby encompassing the potential material compositions).
Regarding claim 22, Hirler teaches the conductive electrode of claim 13, wherein the substrate has a central portion containing the plurality of trenches and a peripheral portion surrounding the central portion that does not contain the plurality of trenches (see the two regions 11 and 12 seen in fig 1B and 1C in which it can be seen that the region 12 contains the trenches while region 11 does not contain the trenches).
Regarding claim 23, Hirler teaches the conductive electrode of claim 22, wherein the central portion has a larger thickness than the peripheral portion such that a gap is formed between the central portion and the peripheral portion at the second main surface of the substrate (see fig 1E which shows how a thickness is removed from the second surface 102 as to provide a thickness gap between the peripheral portion 11 and the thicker portion 12 contain the trenches 103 is shown of greater thickness thereby creating a gap, [0046]).
Regarding claim 24, Hirler teaches the conductive electrode of claim 13, wherein an area of the plurality of trenches is less than 50% of an entire area of the first or the second main surfaces of the substrate (Hirler describes that the area of the body 100 enclosed within the trench is selected so a desired resistance is obtained, furthermore Hirler describes that the trench is fully enclosed by the area of the body 100, [0038], and thereby definition the trenches must be less than 50% the area of the body 100, see also figs 1A-1E depicting smaller trench area).
Claim(s) 2-3, 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hirler (US Patent No 20150333134) in view of Asai (US Patent No 20080073752) further in view of Sato (US Patent No 20200231507).
Regarding claim 2 and 14 , Hirler teaches the conductive electrode of claim 1 and 13.
Hirler however does not teach wherein the conductive material is MXene.
However, having a conductive electrode which is materially made of MXene is well known in the art. See for example the teachings from the analogous conductive electrode composition of Sato which disclose that the conductive electrode material is comprised of an MXene particulate, [0006].
Therefore, it would have been obvious to one skilled in the art prior to the effective filing date to combine the conductive electrode of Hirler to be composed of the MXene particulate described by Sato as using that material composition is known in the art and also in order to effectively create a negative-electrode active material for electrode conduction as described by Sato, [0006].
Regarding claim 3 and 15, the combination teaches the conductive electrode of claim 2 and 14, wherein the MXene has a D50 cumulative particle size distribution of 20µm to 500µm (from Sato, wherein the particulate D50 volume is 20 to 500 microns, [0030]).
Claim(s) 5-7, 9, 17-19, 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hirler (US Patent No 20150333134) in view of Asai (US Patent No 20080073752) further in view of Derry (US Patent No 20190000337).
Regarding claim 5 and 17, Hirler teaches the conductive electrode of claim 1 and 13, Hirler does not explicitly state wherein the substrate is an adhesive conductive solid gel material.
However, the analogous sensor electrode composition taught by Derry does disclose that a substrate is an adhesive conductive solid gel material (where the substrate can be a conductive gel that adheres to the skin of the subject, [0019]).
Therefore, it would have been obvious for one skilled in the art prior to the effective filing date to combine the conductive electrode taught by Hirler to have the specific substrate composition taught by Derry as it is a known electrode composition and it would allow for the electrode to be easily adhered to the subject during use, as taught by Derry, [0019].
Regarding claim 6 and 18, the combination teaches the conductive electrode of claim 1 and 13, wherein the substrate is a non-conductive solid gel polymer material (from Derry, the substrate may include a polymeric gel foam backing to help provide support and insulation for the electrode, [0030]).
Regarding claim 7 and 19, the combination teaches the conductive electrode of claim 1 and 13, wherein the substrate comprises PAN, PMMA, PVDF, POE, PTFE, PE, PP, or nylon (from Derry, wherein the polymeric substrate may be composed of a … PAN material or another like polymer, [0026]).
Regarding claim 9 and 21, the combination teaches the conductive electrode of claim 1 and 13, further comprising an adhesive material on at least part of the second main surface of the substrate (from Derry, where the substrate can be a conductive gel that adheres to the skin of the subject, [0019]).
Claim(s) 8, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hirler (US Patent No 20150333134) in view of Asai (US Patent No 20080073752) further in view of Toth (US Patent No 20190200890).
Regarding claim 8 and 20, Hirler teaches the conductive electrode of claim 1 and 13.
Hirler does not teach wherein the plurality of trenches each have a diameter of 0.5 to 5.0 mm.
However, the analogous electrode support structure taught by Toth does disclose wherein the holes or trenches each have a diameter of 0.5 to 5.0 mm (wherein the holes can have a diameter ranging from 0.005 to 5mm in dimension, [0107]).
Therefore, it would have been obvious for one skilled in the art to combine the teachings of the conductive electrode trenches of Hirler to have the specific trench dimensions taught by Toth in order to achieve the most ideal dimensions to maintain conductivity and structure as defined by Toth, [0107].
Response to Arguments
Applicant’s arguments with respect to the amended claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
The examiner agrees with the applicant that the previous prior art of record of Hirler alone does not teach the amended claim limitation of the conductive filling found within the trench to be in direct contact with the substrate. However, as the amended claim limitation has necessitated further search and consideration, it has been found that the analogous semiconductor trench substrate apparatus which is taught by Asai does teach that the conductive material (see conductive electrode material 210, [0018]) within the trench (found within the electrode hole or trench 214, [0018]) is in direct contact with the substrate (see from fig 21C in which the conductive electrode material 210 is in direct contact with the substrate 202, see also [0018]). Therefore, as the new prior art of record reasonably teaches and discloses that the conductive material is in direct contact with the substrate, the limitation of the amended claim 1 remains rejected under the new prior art of record rejection set forth in the present office action of Hirler in view of Asai.
As no further arguments or remarks have been made regarding any of the other dependent claims, they too remain rejected under the new prior art of record rejection set forth in the present office action.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE M BROWN whose telephone number is (703)756-4534. The examiner can normally be reached 8:00-5:00pm EST, Mon-Fri, alternating Fridays off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Linda Dvorak can be reached at 571-272-4764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LINDA C DVORAK/Primary Examiner, Art Unit 3794
/KYLE M. BROWN/Examiner, Art Unit 3794