Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of the Application
This Office Action is in response to Applicant’s Amendment filed on 9/03/2025.
Claims 1-20 are pending for this examination.
Claims 1, 4-7, 10-11, and 14-20 were amended.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/11/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 U.S.C. § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 10-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
The independent claims recite a mathematical concept (i.e. mathematical relationships, formulas or equations, mathematical calculations) which can be performed by person via pen and paper or via the human mind in the execution of a transpose operation upon a vector.
Regarding claim 10, under the Alice framework Step 1, the claim recites a method.
Under the Alice framework Step 2A prong 1, claim 10 recites an abstract idea in the grouping of mental processes. The claim recites performing a transpose operation of a one-dimensional vector as shown below in underlined text:
Claim 10. A method comprising:
storing a first vector that includes a set of data elements in a memory;
receiving a transpose instruction that specifies the first vector; and
executing the transpose instruction using a functional unit by:
dividing the set of data elements into a set of vectors each of which includes a respective subset of the set of data elements, wherein the set of vectors collectively is representative of a two-dimensional array, and wherein each vector of the set of vectors is representative of a row or column of the two-dimensional array; and
for each vector of the set of vectors:
for each data element of the two dimensional array,
determining a respective row value and a respective column value for each data element of the vector; and
swapping the respective row value and the respective column value for each data element of the vector so as to transpose the two-dimensional array.
Examiner points out that the method of / how to perform a transpose on a vector or matrix is something that is known in the art and taught in mathematics, specifically in linear algebra and a person of ordinary skill in the art would understand that vector transpose / matrix transpose can be done with paper and pencil which falls under the abstract idea in the grouping of mental processes (concepts performed in the human mind including an observation, evaluation, judgement, opinion). Furthermore, Examiner points out the Wikipedia entry for transpose show that the matrix transpose was first introduced in 1858 by British mathematician Arthur Cayley, with citations at the bottom of the Wikipedia entry including the original introduction of “Arthur Cayley (1858) “A memoir on the theory of matrices”, Philosophical Transactions of the Royal Society of London, 148 : 17–37. The transpose (or "transposition") is defined on page 31.” and other references cited in the 20th century, all of which pre-date the filing of this application showing that matrix transpose is known in mathematics before the effective filing date of this application. Examiner asserts that performing a mathematics calculation / operation is something which can be done with a combination of mentally calculation and through paper and pencil, which falls under the mental process category.
Also, Examiner points out that Applicant’s Specification Paragraph 0089, mentions that Figures 13B-C illustrates the transposition of bits using a two-dimensional array, but also specifically says “In practice, a two-dimensional array of bits may never actually be created (e.g. in memory); rather source data from a source register in the form of a one-dimensional vector is transposed as if it were a two-dimensional array, and the transposed source data is stored in a destination register”, which Examiner points out is further proof that this is can be done with paper and pencil or as a mental process which falls under the abstract idea in the grouping of mental processes (concepts performed in the human mind including an observation, evaluation, judgement, opinion) as Applicant’s own specification alludes to this division into two-dimensional arrays does not actually have to be created.
Under the Alice framework 2A prong 2 analysis, claim 10 recites the following additional elements shown below in underlined text:
Claim 10. A method comprising:
storing a first vector that includes a set of data elements in a memory;
receiving a transpose instruction that specifies the first vector; and
executing the transpose instruction using a functional unit by:
dividing the set of data elements into a set of vectors each of which includes a respective subset of the set of data elements, wherein the set of vectors collectively is representative of a two-dimensional array, and wherein each vector of the set of vectors is representative of a row or column of the two-dimensional array; and
for each vector of the set of vectors:
for each data element of the two dimensional array,
determining a respective row value and a respective column value for each data element of the vector; and
swapping the respective row value and the respective column value for each data element of the vector so as to transpose the two-dimensional array.
Under the Alice Framework Step 2B analysis, the claim, considered individually and as an ordered combination does not include additional elements that are sufficient to amount to significantly more than the abstract idea. These additional elements are recited at a high-level of generality. For instance, the claims fail to include limitations that detail how these elements function beyond merely being used for the purposes of performing the mental process of performing a transpose operation on a vector, i.e. generically recited computer elements that do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer with generic computer elements. The innovative concept of the claims seems to be in the application of the processor device hardware to perform a vector transpose. However, the memory is merely used to store the vector, and the functional unit is merely used to execute the transpose operation, where the additional limitations only store and retrieve information in memory (for the memory elements) which are well-understood, routine, and conventional computer functions for these elements as recognized in court decisions listed in MPEP § 2106.05(d), and execute an instruction to perform a transpose operation (for the functional unit element) which is invoking a computer or other machinery merely as a tool to perform an existing process as recognized in court decisions listed in MPEP § 2106.05(f).
For these reasons, claim 10 does not amount to significantly more than the abstract idea.
Claims 11-17 are rejected for at least the reasons provided with respect to claim 10 listed above.
Regarding claim 18, under the Alice framework Step 1, the claim recites a method.
Under the Alice framework Step 2A prong 1, claim 18 recites an abstract idea in the grouping of mental processes. The claim recites performing a transpose operation of a one-dimensional vector as shown below in underlined text:
Claim 18. A method comprising:
receiving a transpose instruction that specifies a first memory and a second memory; and
executing the transpose instruction using a functional unit of a processor by:
receiving a first vector from the first memory, wherein the first vector includes a set of data elements;
dividing the set of data elements into a set of vectors each of which includes a respective subset of the set of data elements, where the set of vectors collectively is representative of a two-dimensional array, and wherein each vector of the set of vectors is representative of a row or column of the two-dimensional array; and
for each vector of the set of vectors:
determining a respective row value and a respective column value for each data element of the vector;
swapping the respective row value and the respective column value for each data element of the vector so as to transpose the two-dimensional array; and
concatenating the set of vectors of the transposed two dimensional array to generate a second vector; and
storing the second vector in the second memory.
Examiner points out that the method of / how to perform a transpose on a vector or matrix is something that is known in the art and taught in mathematics, specifically in linear algebra and a person of ordinary skill in the art would understand that vector transpose / matrix transpose can be done with paper and pencil which falls under the abstract idea in the grouping of mental processes (concepts performed in the human mind including an observation, evaluation, judgement, opinion). Furthermore, Examiner points out the Wikipedia entry for transpose show that the matrix transpose was first introduced in 1858 by British mathematician Arthur Cayley, with citations at the bottom of the Wikipedia entry including the original introduction of “Arthur Cayley (1858) “A memoir on the theory of matrices”, Philosophical Transactions of the Royal Society of London, 148 : 17–37. The transpose (or "transposition") is defined on page 31.” and other references cited in the 20th century, all of which pre-date the filing of this application showing that matrix transpose is known in mathematics before the effective filing date of this application. Examiner asserts that performing a mathematics calculation / operation is something which can be done with a combination of mentally calculation and through paper and pencil, which falls under the mental process category.
Also, Examiner points out that Applicant’s Specification Paragraph 0089, mentions that Figures 13B-C illustrates the transposition of bits using a two-dimensional array, but also specifically says “In practice, a two-dimensional array of bits may never actually be created (e.g. in memory); rather source data from a source register in the form of a one-dimensional vector is transposed as if it were a two-dimensional array, and the transposed source data is stored in a destination register”, which Examiner points out is further proof that this is can be done with paper and pencil or as a mental process which falls under the abstract idea in the grouping of mental processes (concepts performed in the human mind including an observation, evaluation, judgement, opinion) as Applicant’s own specification alludes to this division into two-dimensional arrays does not actually have to be created.
Under the Alice framework 2A prong 2 analysis, claim 18 recites the following additional elements shown below in underlined text:
Claim 18. A method comprising:
receiving a transpose instruction that specifies a first memory and a second memory; and
executing the transpose instruction using a functional unit of a processor by:
receiving a first vector from the first memory, wherein the first vector includes a set of data elements;
dividing the set of data elements into a set of vectors each of which includes a respective subset of the set of data elements, where the set of vectors collectively is representative of a two-dimensional array, and wherein each vector of the set of vectors is representative of a row or column of the two-dimensional array; and
for each vector of the set of vectors:
determining a respective row value and a respective column value for each data element of the vector;
swapping the respective row value and the respective column value for each data element of the vector so as to transpose the two-dimensional array; and
concatenating the set of vectors of the transposed two dimensional array to generate a second vector; and
storing the second vector in the second memory.
Under the Alice Framework Step 2B analysis, the claim, considered individually and as an ordered combination does not include additional elements that are sufficient to amount to significantly more than the abstract idea. These additional elements are recited at a high-level of generality. For instance, the claims fail to include limitations that detail how these elements function beyond merely being used for the purposes of performing the mental process of performing a transpose operation on a vector, i.e. generically recited computer elements that do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer with generic computer elements. The innovative concept of the claims seems to be in the application of the processor device hardware to perform a vector transpose. However, the first memory is merely used to store the vector, the second memory is merely used to store the second (transposed) vector, and the functional unit is merely used to execute the transpose operation, where the additional limitations only store and retrieve information in memory (for the memory elements) which are well-understood, routine, and conventional computer functions for these elements as recognized in court decisions listed in MPEP § 2106.05(d), and execute an instruction to perform a transpose operation (for the functional unit element) which is invoking a computer or other machinery merely as a tool to perform an existing process as recognized in court decisions listed in MPEP § 2106.05(f).
For these reasons, claim 18 does not amount to significantly more than the abstract idea.
Claims 19-20 are rejected for at least the reasons provided with respect to claim 1 listed above.
Allowable Subject Matter
Claims 1-20 are deemed as allowable subject matter.
The following is a statement of reasons for the indication of allowable subject matter:
Prior art teaches systems and method for performing transpose operations on vectors which are representative of a two-dimensional matrices, however, the prior art does not fairly teach or suggest, individually or in combination, a system and method of taking a first vector from a first memory and executing a transpose instruction where the data elements of the first vector is divided into a set of vectors, where the set of vectors collectively is representative of a two-dimensional array and where each vector of the set of vectors is representative of a row or column of the two-dimensional array, where for each vector of the set of vectors, a determination is done of the respective row and column value for each data element and the row value and column value are swapped so as to transpose the two-dimensional array, and concentrating the set of vectors of the transposed two-dimensional array to generate a second vector which is stored into a second memory as claimed. More specifically, Examiner finds that prior arts and mathematic textbooks teach the transposing of matrices, however prior art does not specifically teach taking a first vector, dividing it into a set of vectors that represent a two-dimensional array and performing the transpose operations using only these set of vectors, and concatenating the resulting set of vectors representing the transposed two-dimensional array into a second vector to be stored as claimed. The prior art of record neither anticipates nor renders obvious the above recited combination.
As allowable subject matter has been indicated, applicant's reply must either comply with all formal requirements or specifically traverse each requirement not complied with. See 37 CFR 1.111(b) and MPEP § 707.07(a).
Response to Arguments
Applicant’s arguments, mailed 9/03/2025, have been fully considered but they are not deemed to be persuasive.
Applicant’s arguments to the 102 rejections under Blomgren ‘691 (see Pages 6-7) are deemed to be persuasive in view of Applicant’s amendment. Thereby Examiner withdraws these grounds of rejection and after further search has indicated the claims as allowable subject matter as set forth above.
Applicant’s arguments against the 35 U.S.C. 101 rejections indicating that the claims are directed to an abstract idea, i.e. mental process, where Examiner asserted that the claimed invention can be done by the human mind because their performance and/or implementation requires specifically configured computer hardware, such as a first memory, second memory, and functional unit configured to execute transpose instructions (see Pages 7-9) are deemed to be unpersuasive.
Examiner notes Applicants arguments that the claims are not directed to a mathematical concept, do not recite a mental processes or concept, and that the claimed invention is implemented using a DSP processor, thus would be an improvement in the functioning of a computer thus would integrate with the judicial exception into a practical application and imposes a meaningful limit on the judicial exception.
Examiner first points out that the 101 analysis provided in the previous rejection and repeated above with additional touches to reflect the amended claim language are to indicate that the transpose operation by itself and conversion of a vector into matrices and vice versa which comprises the majority of the claim language of the independent claims can be regarded as an abstract idea under the analysis of the Alice framework Step 2A prong 1, particularly an abstract idea in the grouping of mental processes. As to the remaining elements of the independent claims, particularly talking about the processor, first memory, second memory, and functional units to execute a transpose instruction, Examiner indicated in the analysis above under the Alice Framework Step 2B analysis that these elements are recited in a very generic manner and as an ordered combination does not include additional elements that are sufficient to amount to significantly more than just the abstract idea. More specifically these additional elements are recited at a high-level of generality and fail to include limitations that detail how these elements function beyond merely being used for the purposes of performing the mental process of performing a transpose operation on a vector / matrix, i.e. generically recited computer elements that do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer with generic computer elements.
As to Applicants arguments that these hardware elements show that the claims are integrated into a practical application, as the specification cites that processor level transposition functions normally “require multiple instructions to transpose a bit pattern” … and reducing the instruction overhead required to carry out those transposition functions are directed to “vector bit transpose instructions that interpret bits of source data as a two-dimensional array” which creates transposed source data and stores the transposed source data in a destination register, which shows how claim 1 recites subject matter associated with performing the vector bit transpose instruction which improves efficiency of the computer device, thus is integrated into practical application. Examiner points out that all of these arguments are intended use / intended functionality, which is NOT what is actually claimed in the claim language. Examiner points out that the claim language just recites these additional elements in a high level of generality, i.e. processor that executes instructions, functional unit executing instructions, memory for holding / storing vectors, which are well-understood, routine, and conventional computer functions for these elements as recognized in court decisions listed in MPEP § 2106.05(d), which does not significantly add to the abstract idea of converting a vector into a matrix and performing a transpose operation (for the functional unit element) which is invoking a computer or other machinery merely as a tool to perform an existing process as recognized in court decisions listed in MPEP § 2106.05(f).
As such, Examiner finds Applicants’ arguments regarding the 101 rejections made in the previous office action to be unpersuasive.
Examiner notes that the 101 rejections were withdrawn on the claim tree of independent claim 1 as there exists claim language talking about how the functional unit is coupled to both the first and second memory, which is a physical limitation that shows the physical relation between the elements which cannot be mapped to a mental process of performing the transpose operation using paper and pencil, i.e. a physical limitation connecting the generically claimed elements. This however does not apply to the method claims of independent claims 10 and 18, which only recite the memory in generic functionality, i.e. memory for storing or retrieving data which can be mapped as writing something down on paper, and functional unit in generic functionality, i.e. functional unit for performing the transpose operation which can be mapped as a person / human mind doing the transpose operation with paper and pen. As such, Examiner has maintained the 101 rejections as set forth above on independent claims 10 and 18.
In summary, claims 10-20 remain rejected under 101 as set forth above.
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Saulsbury et al. (US 2002/0032710) teaches a processor system for implementing matrix transpose operations.
Sade et al. (US 2019/0042202) teaches a processor system for implementing matrix transpose operations implementable with vector friendly instructions.
Wilson (US 5,129,092) teaches parallel processors operating on image data wherein the processors can implement a transpose operation on a matrix.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL SUN whose telephone number is (571)270-1724. The examiner can normally be reached Monday-Friday 8am-4pm EST.
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/MICHAEL SUN/Primary Examiner, Art Unit 2183