DETAILED ACTION
1. This action is in response to the application filed on 3/15/23.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
3. Applicant’s arguments with respect to claim(s) 1 and 10 have been considered but are moot because the new ground of rejection.
Claim Rejections - 35 USC § 112
4. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
5. Claims 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1, the limitation recites “set a voltage difference across the first and second inputs to a value”. It is unclear to which first and second inputs is the limitation referring to. Since, there are the first and second inputs of the amplifier and comparator that are previously recited.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
7. Claims 1, 6-7, and 9 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Thiele et al. (US 20200099299).
Regarding claim 1: Thiele et al. disclose an apparatus (i.e. figures 1-4) comprising:
a power conversion circuit (i.e. circuit of 100) having a power output (i.e. output of 100), the power conversion circuit (i.e. circuit of 100) including:
an amplifier circuit (i.e. 200) having a first input, a second input, and an output, the first input of the amplifier circuit (i.e. 200) coupled (i.e. electrically coupled) to the power output (i.e. output of 100), the second input coupled (i.e. electrically coupled) to a reference input (i.e. Vref);
a comparator (i.e. 219) having a first input, a second input, and an output, the first input coupled (i.e. electrically coupled) to the output of the amplifier circuit (i.e. 140);
a circuit (i.e. circuit of 102, excluding the amplifier 140 and comparator 219) having inputs and outputs, at least some of the inputs coupled (i.e. electrically coupled) to the comparator (i.e. 219), the outputs of the circuit coupled (i.e. electrically coupled) between the first and second inputs (i.e. +/- inputs of 219) of the comparator (i.e. 219), the circuit (i.e. circuit of 102, excluding the amplifier 140 and comparator 219) configurable to, in a first mode (i.e. first mode by 214, 210 on/off or one of buck, boost, or skip mode), set a voltage (i.e. voltage to 219) difference across the first and second inputs (i.e. +/- inputs of 219) to a value (i.e. value to +/- inputs of 219 by turn on/off mode switch 214, 210), and
in a second mode (i.e. second mode set by on/off of switches 214, 210 or one of buck, boost, or skip mode), set the voltage (i.e. voltage to 219) responsive to a state (i.e. state output of 219) of the comparator (i.e. 219) and
a controller (i.e. controller of 102) configured to cause the circuit (i.e. circuit of 102, excluding the amplifier 140 and comparator 219) to operate in the first mode (i.e. first mode by 214, 210 on/off or one of buck, boost, or skip mode) or in the second mode (i.e. second mode set by on/off of switches 214, 210 or one of buck, boost, or skip mode) (i.e. ¶ 11-23).
Regarding claim 6: (i.e. figures 1-4) the power conversion circuit includes a capacitor (i.e. 124) coupled (i.e. electrically coupled) at the first input of the comparator (i.e. 219).
Regarding claim 7: (i.e. figures 1-4) the power conversion circuit includes a power stage (i.e. 120, 174) and a driver circuit (i.e. 118) coupled (i.e. electrically coupled) between the output of the comparator (i.e. 219) and the power stage (i.e. 120, 174).
Regarding claim 9: (i.e. figures 1-4) the power conversion circuit is in an integrated circuit package (i.e. IC of 102).
Claim Rejections - 35 USC § 103
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Thiele et al. (US 20200099299) in view of Chen (US 20160079858).
Regarding claim 2: Thiele et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the amplifier circuit is a transconductance amplifier circuit and comprises: a first transistor coupled between a first voltage terminal and a second voltage terminal, and having a first control terminal coupled to the first input; a second transistor coupled between the first transistor and the second voltage terminal, and having a second control terminal coupled to the second input; a third transistor coupled in parallel with the first transistor, and having a third control terminal; and a fourth transistor coupled between the first voltage terminal and the output of the transconductance amplifier circuit, and having a fourth control terminal coupled to the third control terminal.
Chen discloses a power supply comprising the amplifier circuit (i.e. figure 2) is a transconductance amplifier circuit and comprises: a first transistor (i.e. M1) coupled (i.e. electrically coupled) between a first voltage terminal and a second voltage terminal (i.e. first and second terminals of figure 2), and having a first control terminal (i.e. terminal for Vrefn) coupled (i.e. electrically coupled) to the first input; a second transistor (i.e. M3) coupled (i.e. electrically coupled) between the first transistor and the second voltage terminal, and having a second control terminal (i.e. control terminal of M3) coupled (i.e. electrically coupled) to the second input; a third transistor (i.e. M2) coupled (i.e. electrically coupled) in parallel with the first transistor (i.e. M1), and having a third control terminal (i.e. terminal for Vfbn); and a fourth transistor (i.e. M4) coupled (i.e. electrically coupled) between the first voltage terminal and the output of the transconductance amplifier circuit (i.e. circuit of figure 2), and having a fourth control terminal (i.e. control terminal of M4) coupled (i.e. electrically coupled) to the third control terminal.
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Thiele et al.’s invention with the power supply as disclose by Chen to provide a better control performance.
10. Claims 10-15 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20190074764) in view of Thiele et al. (US 20200099299).
Regarding claim 10: Hu et al. disclose an apparatus (i.e. figure 1) comprising: a transconductance amplifier circuit (i.e. 110) having an output and configurable to provide a first output current (i.e. from 110) at its output based on a difference between a first voltage (i.e. voltage to + terminal) and a second voltage (i.e. Vref);
a current limiting circuit (i.e. 115) having an output and configurable to provide a second output current (i.e. LS-ILM) at its output that is an input current limited to no greater (i.e. function of current regulator 115) than the first output current (i.e. from 110),
but does not specifically disclose a comparator having an input coupled to the output of the transconductance amplifier circuit; a switch coupled between the input of the comparator and the output of the current limiting circuit; and a controller configurable to control the switch.
Thiele et al. disclose a power supply (i.e. figures 1-4) comprising a comparator (i.e. 162) having an input coupled (i.e. electrically coupled) to the output of the transconductance amplifier circuit (i.e. 200);
a switch (i.e. 214, 210) coupled between the input of the comparator (i.e. 162) and the output of the current limiting circuit (i.e. 126); and
a controller (i.e. controller of figure 1) configurable to control the switch (i.e. 214, 210).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Regarding claim 11: Hu et al. disclose the transconductance amplifier circuit is a first transconductance amplifier circuit, but does not specifically disclose, comprises a second transconductance amplifier circuit configurable to provide the input current based on a differential between a third voltage and a fourth voltage.
Thiele et al. disclose a power supply (i.e. figure 1) comprising comprises a second transconductance amplifier circuit (i.e. 200) configurable to provide the input current (i.e. current to the circuit includes 188,152,126,266) based on a differential between a third voltage (i.e. 216) and a fourth voltage (i.e. 202).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Regarding claim 12: Hu et al. disclose the limitation of the claim(s) as discussed above, but does not specifically the comparator is configurable to provide an output voltage to a driver circuit responsive to the second output current.
Thiele et al. disclose a power supply (i.e. figure 1) comprising the comparator (i.e. 162) is configurable to provide an output voltage to a driver circuit (i.e. 118) responsive to the second output current (i.e. current of the circuit includes 188,152,126,266).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Regarding claim 13: Hu et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose an integrator circuit coupled to the transconductance amplifier circuit and configurable to provide a third output current based on a reference voltage and a feedback voltage.
Thiele et al. disclose a power supply (i.e. figure 1) comprising an integrator circuit (i.e. 126, 226) coupled to the transconductance amplifier circuit (i.e. 140) and configurable to provide a third output current (i.e. from 126 or 226) based on a reference voltage (i.e. 149) and a feedback voltage (i.e. from 138).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Regarding claim 14: Hu et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the controller is configurable to enable the switch during a time period where the power conversion circuit transitions between an active mode and a skip mode.
Thiele et al. disclose a power supply (i.e. figure 1) comprising the controller is configurable to enable the switch during a time period (i.e. switching time period of 100) where the power conversion circuit transitions between an active mode (i.e. normal or current limit condition) and a skip mode (i.e. skip mode) (i.e. ¶14).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Regarding claim 15: Hu et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the transconductance amplifier circuit, the current limiting circuit, the comparator, the switch and the controller are part of a power conversion circuit in an integrated circuit package.
Thiele et al. disclose a power supply (i.e. figure 1) comprising the transconductance amplifier circuit (i.e. 200), the current limiting circuit (i.e. 126), the comparator (i.e. 162), the switch and the controller (i.e. controller of 102) are part of a power conversion circuit in an integrated circuit package (i.e. IC of 102).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Hu et al.’s invention with the power supply as disclose by Thiele et al., because it is desirable to prevent the regulation voltage from exceeding a current limit clamp voltage; and when the DC-to-DC voltage converter is in a skip mode, it is desirable to prevent the regulation voltage from falling below a skip clamp voltage.
Allowable Subject Matter
11. Claims 16 and 18-20 are allowed.
The following is an examiner’s statement of reasons for allowance: Regarding to claim 16, the prior art fails to disclose a current limiting circuit having a third input coupled to a current source terminal, a fourth input coupled to the first output via a first switch, and a second output coupled to a reference current circuit terminal via a second switch, the current limiting circuit configured to provide a second output current at the second output that is an input current at the third input limited to no greater than the first output current.
12. Claims 3-5 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
13. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nguyen Tran/Primary Examiner, Art Unit 2838