DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Acknowledgement is made of preliminary amendment filed on 03/24/2023 in which claims 2,7 are currently amended while claims 1,3-6,8-12 remain as originally presented. By this amendment, claims 1-12 are still pending in the application for prosecution in a first action on the merits.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) filed on 01/13/2026 has been considered and placed of record. An initialed copy is attached herewith.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2,4,10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Sato et al., (Sato) US 2019/0265664 in view of Okaue et al., (Okaue) US 2011/0087804.
Regarding claim 1: Sato at least discloses and shows in Fig. 7: A device assembly(18)(see Fig. 7) comprising: a supply connection(see connection of solar power cell 11 and the Lplus, and Lminus connection lines;see [0034]-[0035]) adapted to be electrically connected to a power source(power generation unit 10, solar cell 11)(see [0032]-[0033]); a microcontroller(construed as control unit 50; see [0039]);a first power supply link(Lplus) adapted for supplying power from the supply connection(VDD) to the microcontroller(50)(see Fig. 7 and [0042] since the control unit 50 may have a configuration of a microcontroller); and a sensor system(environmental sensor 30)(see [0032],[0040]) adapted to measure at least one environmental parameter(as outputted by detection signal a2 indicating a state of the detected ambient environment; see [0040]), wherein the sensor system(30) is communicatively(via signal a2; see Fig. 7) connected to the microcontroller(50); a memory system(note-the control unit 50 can also include a memory; see [0042]), wherein the microcontroller(50) is adapted to obtain measuring results from the sensor system(30)(note that the detection signal a2 output from the environmental sensor 30 is supplied to the control unit 50; see [0040]), and to store the measuring results in the memory system(as included in the control unit 50, see [0042]. Note that the detection signal a2 that is supplied to the control unit 50 is necessarily stored in the memory included in the control unit), wherein the device assembly has a first operating state(note- the first timer 41 outputs a timing signal a3 at a period T1, see [0041] and when the solar cell 11 is irradiated with light, power is generated in the solar cell 11 and the power generated by the solar cell is accumulated in the capacitor 12 and as the result the output voltage from the solar cell 11 increases and the supply voltage on supply lines Lpluss and Lminus increases and the power supply monitoring unit 20 outputs the control signal a1 for turning on the switch 21 and consequently VDD exceeds VH1 and power is supplied to sensor (30), the first timer 41, the second timer 42 and the control unit 50 and each of these blocks is activated; see [0078]), in which power is supplied by the first power supply link(Lplus) to the microcontroller(50), and the microcontroller is in an active mode, in which the microcontroller is adapted to obtain measuring results from the sensor system(by receiving the detection signal a2 output from the environmental sensor 30, see [0040]), wherein the device assembly comprises a supercapacitor(73)(see [0074]); and a second power supply link(see branch line Lb ; see [0073]-[0074])adapted for supplying power(note- when both of the switch 21 and the switch 71 are turned on, the power storage unit 73 is coupled to the solar cell 11, and charging is performed in the power storage unit 73 from the supercapacitor(73) to the microcontroller(50), wherein the device assembly has a second operating state(construed as when detecting that the level of the voltage VDD is lower than the level of the threshold voltage VL2, the power supply monitoring unit 70 outputs the control signal a6 for turning off the switch 71. As a result, the switch 71 is turned off. The power accumulated in the power storage unit 73 is supplied to each block (the environmental sensor 30, the first timer 41, the second timer 42, the control unit 50, the functional unit 60, and the power supply monitoring unit 70) via the diode 72, which is construed as being a second operating state), in which power is supplied from the supercapacitor(73) by the second power supply link to the microcontroller(50)(see [0084]), and the microcontroller(50) is alternately in an inactive mode(note-the period T2 is longer than T1 which indicates that energy is consumed by it is less than energy in the operation at the time period T1 which is equivalent that the microcontroller is alternatively in an inactive mode and active mode) and the active mode(since the switch 71 is turned on/off see [0075],[0076],[0080]-[0081],[0084]), wherein energy consumption of the device assembly is lower in the second operating state than in the first operating state(note-the period T2 is longer than T1 which indicates that the frequency becomes lower in the operation at the period T2 which is an indication that the energy consumed by it is less than energy in the operation at the time period T1 which is equivalent to the microcontroller is alternatively in an inactive mode and the active mode, wherein energy consumption of the device assembly is lower in the second operating state than in the first operating state), and wherein the device assembly is adapted to detect whether power is available from the supply connection, and to transfer to the second operating state as a response to a situation where power is not available from the supply connection(when detecting that the level of the voltage VDD is lower than the level of the threshold voltage VL2, the power supply monitoring unit 70 outputs the control signal a6 for turning off the switch 71 and as a result of the switch 71 being turned off, the power accumulated in the supercapacitor unit 73 is supplied to each block (the environmental sensor 30, the first timer 41, the second timer 42, the control unit 50, the functional unit 60, and the power supply monitoring unit 70 which provides power as an alternative if power is not available from the supply connection, power is transfer to the second operating state because even when power generation by the solar cell 11 is stopped such as at night, each of the above-mentioned blocks (the environmental sensor 30, the first timer 41, the second timer 42, the control unit 50, the functional unit 60, and the power supply monitoring unit 70) may be operated by the power accumulated in the power storage unit 73 ; see [0079],[0083]-[0085]).
Sato discloses all the claimed invention except for expressly stating that the memory system is non-volatile memory.
However, Okaue teaches factual evidence of, a peripheral device having memory card 3 which has a non-volatile memory (NVM)(14)([0085]; see Figs. 2-3).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to include a non-volatile memory into the memory system of Sato for the advantages of enabling both storing and writing data in absence of power and due to their energy efficiency which emanate from low and standby power, their high speed and low latency.
Accordingly claim 1 would have been obvious.
Regarding claim 2: Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 1. Sato further discloses, wherein the device assembly comprises a timer(timer 42) adapted to carry out switching-on events during the second operating state, the switching-on event switching the microcontroller(50) from the inactive mode to the active mode(note- The second timer 42 supplies the timing signal a4 to the control unit 50 when a period corresponding to the period T2 has elapsed from the time when the timer reservation signal a7 is received and when the control unit 50 receives the timing signal a4 output from the second timer 42 (step S41: affirmative determination), the processing returns to step S31 and the control unit 50 is reactivated which means that the control unit was in an inactive state in step S40; see Fig. 9; see [0098]-[0099]).
Regarding claim 4: Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 1. Sato further discloses, wherein the microcontroller(50) is adapted to detect whether power is available from the supply connection, and to transfer itself to the inactive mode(step S40; Fig. 9) as a response to a situation where power is not available(as if the answer at step S35 is NO(when illuminance X is less than threshold Y) in Fig. 9) from the supply connection([0101])(note- the functional unit 60 and the control unit 50 both enter the system off state).
Regarding claim 10: Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 1. Sato further discloses, wherein the device assembly comprises a charger adapted for charging the supercapacitor(73) from the supply connection(note- When both of the switch 21 and the switch 71 are turned on; see [0074]) and by repeating the on/off operation in the switch 71, charging of the power storage unit 73 is also performed intermittently; see [0081]).
Regarding claim 11: Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 1. Sato further discloses, wherein the device assembly comprises a host processor(construed as functional unit 60) which is communicatively connected to the microcontroller(50), and is adapted to control the microcontroller during the first operating state(see [0032],[0037]), wherein the host processor(functional unit 60) is adapted to be supplied from the supply connection(note- the functional unit 60 is coupled to the solar cell 11, and operates upon receipt of power supplied from the solar cell 11; see [0039])).
Claim(s) 3,12 are rejected under 35 U.S.C. 103 as being obvious over Sato et al., (Sato) US 2019/0265664 in view of Okaue et al., (Okaue) US 2011/0087804
Regarding claim 3, Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 2. Sato further discloses, wherein the timer(42) is adapted to carry out the switching-on events periodically during the second operating state([0078],[0083] and [0085]). However, the combination of Sato and Okaue fails to expressly teach the limitations of, wherein an interval between successive switching-on events is in a range of ten minutes and ten hours.
It would have been an obvious matter of deign choice to select a suitable duty cycles for the timers to have an interval between successive switching-on events to be in a range of ten minutes and ten hours, as recited, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Accordingly claim 3 would have been obvious.
Regarding claim 12, Sato in view of Okaue discloses all the claimed invention as set forth and discussed above in claim 1. However, Sato does not expressly disclose the limitations of, the device assembly comprises a protection relay having a housing. Instead Sato only teaches switches 21,51 and 71 which are equivalents alternatives to relays depending on the application and all the elements are include in module as thus necessarily into a housing which the main housing of the assembly device (18).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have had into the system of Sato as modified by Okaue to have, wherein the device assembly comprises a protection relay having a housing, and the sensor system is adapted to measure the at least one environmental parameter inside the housing, as recited, for the advantages of their ruggedness against voltage spike, their complete electrical isolation and their low-on-state resistance for high currents.
Accordingly claim 12 would have been obvious.
Allowable Subject Matter
Claims 5-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 5, although it is well known in the art that microcontrollers have typical input voltages ranging from 1.8V to 5V, patentability exists at least in part with the claimed limitations of, “wherein the device assembly comprises a voltage regulator common to both the first power supply link and the second power supply link, wherein an output voltage at an output of the voltage regulator is lower than a nominal voltage of the supercapacitor”.
Claims 6-9 depend either directly or indirectly from claim 5 and thus are also allowable for the same reasons.
Citation of Prior art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2017/0267105 to Fratelli et al., (Fratelli) discloses an auxiliary power supply system for an electric motor of an electric vehicle having a voltage regulator(18) common to both a first power supply link(stack of batteries 4) and a second power supply link(array of supercapacitors 2)(see Fig. 1. However, Fratelli does not teach, “wherein an output voltage at an output of the voltage regulator is lower than a nominal voltage of the supercapacitor”(see [0024]).
Conclusion
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M'BAYE DIAO
Primary Examiner
Art Unit 2859
/M BAYE DIAO/Primary Examiner, Art Unit 2859 January 14, 2026