Prosecution Insights
Last updated: October 26, 2026
Application No. 18/189,990

SYSTEM AND METHOD FOR IDENTIFYING KERNELS SUITABLE FOR COMPUTATIONAL STORAGE

Final Rejection §101§112
Filed
Mar 24, 2023
Priority
Feb 17, 2023 — provisional 63/446,733
Examiner
ISHIZUKA, YOSHIHISA
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
69%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
307 granted / 444 resolved
+1.1% vs TC avg
Strong +20% interview lift
Without
With
+19.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
20 currently pending
Career history
471
Total Applications
across all art units

Statute-Specific Performance

§101
24.1%
-15.9% vs TC avg
§103
34.3%
-5.7% vs TC avg
§102
4.7%
-35.3% vs TC avg
§112
33.5%
-6.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 444 resolved cases

Office Action

§101 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendments to the claims, filed 6/24/2026, are accepted and appreciated by the examiner. Response to Arguments Applicant’s arguments filed 6/24/2026 have been fully considered. With regards to the 35 U.S.C. § 101 Rejection, Applicant argues, Claim 1 of the present application recites a method for identifying kernels suitable for computational storage efficiently for executing a computation at suitable kernels, which includes "estimating a working set size of the kernel" and "determining that the working set size of the kernel is less than or equal to a size of a buffer of the computational storage circuit" for identifying a kernel of a computation and "executing the computation in the computational storage circuit via the kernel." The additional elements, including estimating a working set size of the kernel and determining that the working set size of the kernel is less than or equal to a size of a buffer of the computational storage circuit, may improve the efficiency of computational performance by executing the computation at suitable kernel. However Examiner respectfully disagrees. Merely determining that the working set size of the kernel does not improve the efficiency of computational performance, since nothing has changed besides merely determining the working set size and is therefore not persuasive. With regards to the 35 U.S.C. §103 Rejection, Applicant’s arguments are moot in view of the new grounds of rejection as necessitated by Applicant’s amendments. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1, 4-6, 11, 14-16, 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. With respect to Claims 1, 11, 20 the limitations identifying a kernel of a computation as a candidate for execution in a computational storage circuit; and evaluating the kernel as a candidate for execution in the computational storage circuit, the identifying comprising estimating a working set size of the kernel; and determining that the working size of the kernel is less than or equal to a size of a buffer of the computational storage circuit, and the evaluating comprising estimating an expected performance of the kernel in the computational storage circuit. This limitation is directed to an abstract idea and would fall within the “Mathematical Concept” or “Mental Process” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. This judicial exception is not integrated into a practical application. Claim 1 recite the additional element executing the computation in the computational storage circuit via the kernel and claims 11, 20 further recite A system, comprising: a processing circuit; and memory, operatively connected to the processing circuit and storing instructions that, executed by the processing circuit, cause the system to perform a method, the method comprising: These limitations are recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. As such Examiner does NOT view that the claims -Improve the functioning of a computer, or to any other technology or technical field -Apply the judicial exception with, or by use of, a particular machine - see MPEP 2106.05(b) -Effect a transformation or reduction of a particular article to a different state or thing - see MPEP 2106.05(c) -Apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception - see MPEP 2106.05(e) and Vanda Memo The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements amounts to no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. Examiner further notes that such additional elements are viewed to be well known routine and conventional as evidenced by ChoFleming (US 2022/0222177 A1) Memon (US 2020/0257553 A1) ChoFleming (US 2023/0367640 A1) Malaya (US 2019/0391850 A1) Kachare (US 2020/0201692 A1) Considering the claim as a whole, one of ordinary skill in the art would not know the practical application of the present invention since the claims do not apply or use the judicial exception in some meaningful way. As currently claimed, Examiner views that the additional elements do not apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, because the claims fails to recite clearly how the judicial exception is applied in a manner that does not monopolize the exception and does not impose a meaningful limitation describing what problem is being remedied or solved. Dependent claims 4-6, 14-16 when analyzed as a whole are held to be patent ineligible under 35 U.S.C. 101 because the additional recited limitation(s) fail(s) to establish that the claim(s) is/are not directed to an abstract idea, as detailed below: there is no additional element(s) in the dependent claims that adds a meaningful limitation to the abstract idea to make the claim significantly more than the judicial exception (abstract idea). Claims 4-6, 14-16 further limit the abstract idea with an abstract idea and thus the claims are still directed to an abstract idea without significantly more. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1, 4-6, 11, 14-16, 20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 1, 11, 20 recite “identifying a kernel of a computation as a candidate for execution in a computational storage circuit” “executing the computation in the computational storage circuit via the kernel” This limitation is not taught in the specification and is viewed as new matter. Examiner notes the claim requires the same computation regarding identifying a kernel of a computation, and executing the computation. Claims that depend on the above rejected claims are also rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 4-6, 11, 14-16, 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1, 11, 20 recite “identifying a kernel of a computation as a candidate for execution in a computational storage circuit” “executing the computation in the computational storage circuit via the kernel” This limitation is unclear since the claims seems to imply or require identifying a kernel of a computation as a candidate for execution, but at the same time requiring the kernel to execute, since the computation is referring to the same computation and is therefore indefinite. Claims that depend on the above rejected claims are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zinger (US 2020/0034274 A1) teaches a method for collecting trace data items generated by a plurality of trace points, the method comprising: allocating a ring buffer in a first memory, the ring buffer including a plurality of trace buffers; The method further comprising: pre-processing the one or more files before any of the trace points is executed to identify a size of a largest trace data item that can be generated by any of the trace points, wherein the ring buffer is allocated based on the size of the largest trace data item that can be generated by any of the trace points, such that each trace buffer in the ring buffer has a respective size that is greater than or equal to the size of the largest trace data item that can be generated by any of the trace points. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YOSHIHISA ISHIZUKA whose telephone number is (571)270-7050. The examiner can normally be reached M-F 11:00-7:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Catherine Rastovski can be reached at (571) 270-0349. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. YOSHIHISA . ISHIZUKA Examiner Art Unit 2857 /YOSHIHISA ISHIZUKA/Primary Examiner, Art Unit 2857
Read full office action

Prosecution Timeline

Mar 24, 2023
Application Filed
Apr 15, 2026
Non-Final Rejection mailed — §101, §112
Jun 01, 2026
Applicant Interview (Telephonic)
Jun 01, 2026
Examiner Interview Summary
Jun 24, 2026
Response Filed
Sep 30, 2026
Final Rejection mailed — §101, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
69%
Grant Probability
89%
With Interview (+19.5%)
3y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 444 resolved cases by this examiner. Grant probability derived from career allowance rate.

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