DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/18/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-12 have been considered but are moot in view of the new ground of rejection below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Farjadrad (US Pat. 7,805,642) in view of Zhang et al (US Pat. 6,233,709; hereinafter referred to as Zhang) in view of Shattil (US Pat. Pub. 2015/0244430) in view of Perez-Andrade et al (“A Versatile Linear Insertion Sorter Based on a FIFO Scheme”; hereinafter referred to as Perez).
As per claims 1, 7: Farjadrad teaches a method and non-transitory computer-readable medium containing instructions for providing communication Forward Error Correction (FEC) optimization for virtualized platforms, comprising:
calculating a cut off time used to terminate total FEC processing duration (Fig. 4, 408; col. 5, lines 15-17);
processing code blocks received in a subframe in a priority order defined by a code block priority sorting stage (Fig. 4, 404: code blocks processed in first-in first-out order; Fig. 3, 302-304); and
wherein processing code blocks comprises:
checking if a current time has exceeded the cut off time cut off value (Fig. 4; determining whether the output of 408=0 which indicates that the current time has not exceeded the cut off time cut off value, or whether the output of 408=1 which indicates that the current time has exceeded the cut off time cut off value);
when the current time has exceeded the cut off time value (Fig. 4, output of 408=1), then setting a Cyclic Redundancy Code (CRC) FAIL (Fig. 4, output of 406=1 which indicates FAIL because no convergence has occurred before the maximum cut off time of 408) and moving onto a next code block without decoding (col. 5, lines 17-20);
when the current time has not exceeded the cut off time value (Fig. 4, output of 406=0), then running a single iteration of decoding and checking a code block CRC (Fig. 3, 306-308; col. 4, lines 18-21);
when the code block CRC is PASS then decoding is successful and moving onto a next code block (col. 5, lines 10-13).
Not explicitly disclosed is:
when the code block CRC is FAIL then checking if a maximum number of FEC iterations has been reached;
when maximum number of FEC iterations has not been reached repeating the steps of calculating and processing code blocks; and
when maximum number of FEC iterations has been reached then moving onto the next code block.
However, Zhang in an analogous art teaches:
when the code block CRC is FAIL (Fig. 2, 208 NO) then checking if a maximum number of FEC iterations has been reached (Fig. 2, 214);
when maximum number of FEC iterations has not been reached (Fig. 2, 214 YES) repeating the steps of calculating and processing code blocks (Fig. 2, 216); and
when maximum number of FEC iterations has been reached (Fig. 2, 214 NO) then moving onto the next code block (Fig. 2, 220 YES).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to further determine a maximum number of iterations as a stopping criteria in the iterative decoder of Farjadrad as taught by Zhang.
This modification would have been obvious for one of ordinary skill in the art at the time of filing because Farjadrad suggests that the number of iterations is finite and should be considered (col. 1, lines 62-65).
Also not explicitly disclosed is performing the method in a virtualized distributed unit (DU) environment on a generalized computing platform. However, Shattil in an analogous art teaches performing error correction (paragraphs 254 and 261) in a virtualized distributed unit (Fig. 18; paragraphs 32,183, and 247) of a generalized computing platform (Fig. 24B).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to perform the method of Farjadrad and Zhang in a virtualized distributed unit environment. This modification would have been obvious for one of ordinary skill in the art at the time of filing because virtualization would have reduced cost and processing requirements (paragraph 258).
Also not explicitly disclosed is a computed priority order computed by a code block priority sorting stage. However, Perez in an analogous art teaches a programmable gate array for computing a FIFO priority sort order (page 359).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the computed FIFO algorithm of Perez to perform the FIFO input sorting of Farjadrad. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have provided an easily adaptable and efficient hardware implementation of a FIFO sorter (page 361, Conclusion).
Claim(s) 2, 3, 8, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over
Farjadrad in view of Zhang in view of Shattil in view of Perez in view of Asati et al (US Pat. Pub. 2009/0213726; hereinafter referred to as Asati).
As per claims 2, 8: Farjadrad et al teach the method of claim 1 and 7. Not explicitly disclosed is: dynamically allocating compute allocation for FEC in the virtualized DU environment. However, Asati in an analogous art teaches dynamically allocating FEC compute resources (paragraph 18).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to dynamically allocate compute resources for FEC in the virtualized DU environment of Farjadrad et al. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have reduced cost (paragraph 18).
As per claims 3, 9: Farjadrad et al teach the method of claim 1 and 7. Not explicitly disclosed is: dynamically decreasing compute allocation for FEC in the virtualized DU environment as load increases at a virtualized DU. However, Asati in an analogous art teaches dynamically allocating FEC compute resources (paragraph 18; dynamic allocation means that compute resources are increased or decreased dynamically).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to dynamically allocate compute resources for FEC in the virtualized DU environment of Farjadrad et al. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have reduced cost (paragraph 18).
Claim(s) 4, 10 are rejected under 35 U.S.C. 103 as being unpatentable over Farjadrad in view of Zhang in view of Shattil in view of Perez in view of Aktas et al (US Pat. Pub. 2022/0322371; hereinafter referred to as Aktas).
As per claims 4, 10:
Farjadrad et al teach the method of claim 1 and 7. Not explicitly disclosed is: prioritizing users based on at least one of: physical location information; relative distance information; link attenuation measurement. However, Aktas in an analogous art teaches prioritizing users at a high distance based on relative distance information (paragraph 94).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to prioritize users at high distance. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it was one of a known prioritization criteria for multiple users, as shown by Aktas.
Claim(s) 5, 11 are rejected under 35 U.S.C. 103 as being unpatentable over Farjadrad in view of Zhang in view of Shattil in view of Perez in view of Yang et al (US Pat. Pub. 2021/0160784; hereinafter referred to as Yang).
As per claims 5, 11: Farjadrad et al teach the method of claim 1 and 7. Not explicitly disclosed is: at the code block priority stage, prioritizing users based on at least one of: power loop control indication and link adaptation indication. However, Yang in an analogous art teaches prioritizing users based on power loop control information (paragraphs 16, 106).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to determine priority based on power loop control information. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it was a known method for determining and prioritizing power level as shown by Yang.
Claim(s) 6, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Farjadrad in view of Zhang in view of Shattil in view of Perez in view of Makki et al (US Pat. Pub. 2022/0173792; hereinafter referred to as Makki).
As per claims 6, 12: Farjadrad et al teach the method of claim 1 and 7. Not explicitly disclosed is: at the code block priority stage, prioritizing decoding using one of range-biased sorting and highest decoding probability sorting. However, Makki in an analogous art teaches prioritizing decoding using highest decoding probability sorting (paragraphs 12 and 91).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to prioritize the decoding of Farjadrad et al based on highest decoding probability sorting. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have increased end-to-end throughput and load balancing (paragraph 13).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE N NGUYEN whose telephone number is (571)272-7214. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at 571-270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/STEVE N NGUYEN/Primary Examiner, Art Unit 2111
Prosecution Insights