DETAILED ACTION
This Office Action is a first Office Action on the merits of the application. Claims 1 - 20 are presented for examination. Claims 1 - 20 are rejected.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 12 – 16 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception without significantly more.
With respect to claim 12, applying step 1, the preamble of claim 12 claims a method so this claim falls within the statutory category of a process.
In order to apply step 2A, a recitation of claim 12 is copied below. The limitations of the claim that describe an abstract idea are bolded.
The claim recites:
A method of testing an integrated circuit design under verification (DUV), the method comprising:
sampling actual response waveforms produced by simulating the DUV to produce a first set of samples xi;
sampling predicted response waveforms produced by a model of the DUV to produce a second set of samples yi, where i is a number identifying a timestamp in each of the first and second sets of samples;
filtering a difference between the first and second sets of samples to determine a maximum absolute running median filtered error z, where Maxi determines a maximum across the timestamps i, W is a filter window length, NF is a normalization factor, and F(samples, W) performs a running median filter on the samples:
z =
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comparing z to a threshold, so that z being greater than the threshold indicates a possible bug in the DUV.
Under Step 2A, prong one, the limitation of “filtering a difference between the first and second sets of samples to determine a maximum absolute running median filtered error z, where Maxi determines a maximum across the timestamps i, W is a filter window length, NF is a normalization factor, and F(samples, W) performs a running median filter on the samples: z =
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” is an abstract idea because it is directed to mathematical concepts. These judicial exceptions are not integrated into a practical application because the limitations, as drafted, each recite a process that, under its broadest reasonable interpretation, covers mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations (see MPEP § 2106.04(a)(2), subsection I). The limitation, as drafted, is directed to performing mathematical calculation using the equation in the claim.
In addition, the limitation of “comparing z to a threshold, so that z being greater than the threshold indicates a possible bug in the DUV” is an abstract idea because it is directed to a mental process. The limitation, as drafted and under a broadest reasonable interpretation “can be performed in the human mind, or by a human using a pen and paper, including an observation, evaluation, judgement or opinion, but for the recitation of computer components or a generic computer. MPEP 2106.04(a)(2)(III). A person could mentally compare a value and a threshold value to determine if the value is greater than, equal to, or less than the threshold value.
Step 2A, prong two: The judicial exception is not integrated into a practical application because the additional language in the claimed limitations of “sampling actual response waveforms produced by simulating the DUV to produce a first set of samples xi” and “sampling predicted response waveforms produced by a model of the DUV to produce a second set of samples yi, where i is a number identifying a timestamp in each of the first and second sets of samples” amounts to mere data gathering, as sampling waveforms and response waveforms from simulations provide data for the remaining limitations of the claims, which are directed to mathematical calculations and mental processes performed, and thus found to be a form of insignificant extra-solution activity.
The combination of these additional elements is no more than insignificant solution activity (data gathering) that provides data to perform the judicial exceptions.
Accordingly, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
For step 2B, the claim does not include additional elements that are sufficient to significantly more than the judicial exception because, as explained above, the additional elements recite extra-solution activity in the form of mere data gathering. Korchemny et al. (U.S. Patent 11,544,435 B1) discloses taking samples of a segment of a first and second waveform, respectively (Col. 1, ln 60 – 67 through col 2, ln 1 – 7). Accordingly, sampling data from waveforms are well-understood, routine, and conventional functions.
Even when considered in combination, these additional elements represent merely instructions to apply an exception with well understood, routine, and conventional insignificant extra-solution activity, which does not provide significantly more to the abstract idea.
The claim is not patent eligible.
With respect to claim 13, the limitations recited, as an ordered combination with claim 12, falls under the abstract idea as being directed to a mental process, due to its dependence on claim 12, recited as being directed to a mental process above, and does not integrate the judicial exception into a practical application.
Individually, claim 13 recites a description of the additional elements regarding data gathering. The limitations do not provide any elements that are sufficient to amount to significantly more than the judicial exception.
The claim does not include significantly more than the abstract idea.
With respect to claim 14, the limitations recited, as an ordered combination with claim 12, falls under the abstract idea as being directed to a mental process, due to its dependence on claim 12, recited as being directed to a mental process above, and does not integrate the judicial exception into a practical application.
Individually, claim 14 recites a description of the elements in the mathematical concepts performed. The limitations do not provide any elements that are sufficient to amount to significantly more than the judicial exception.
The claim does not include significantly more than the abstract idea.
With respect to claim 15, the limitations recited, as an ordered combination with claim 12, falls under the abstract idea as being directed to a mental process, due to its dependence on claim 12, recited as being directed to a mental process above, and does not integrate the judicial exception into a practical application.
Individually, claim 15 recites an additional mathematical concepts performed. The limitations do not provide any elements that are sufficient to amount to significantly more than the judicial exception.
The claim does not include significantly more than the abstract idea.
With respect to claim 16, the limitations recited, as an ordered combination with claim 12, falls under the abstract idea as being directed to a mental process, due to its dependence on claim 12, recited as being directed to a mental process above, and does not integrate the judicial exception into a practical application.
Individually, claim 16 recites an additional mathematical concept performed, in words describing a mathematical equation. The limitations do not provide any elements that are sufficient to amount to significantly more than the judicial exception.
The claim does not include significantly more than the abstract idea.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 - 11, 13, and 17 - 20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “similar” in claim 1, line 4, is a relative term which renders the claim indefinite. The term “similar” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. It is unclear in the claim how close in terms of a numerical value or tolerance the data corresponding to the stimulus signals need to be, to be considered being “similar” to the design under verification. It is unclear how close the signals need to be, to be “similar” to the design under verification and renders the claim vague and indefinite.
Dependent claims 2 - 11 are rejected due to inherited claim deficiencies of claim 1.
The term “similarities” in claim 5 is a relative term which renders the claim indefinite. The term “similarities” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. It is unclear in the claim how close the stimulus signals need to be in terms of a value or threshold regarding device behavior, waveform smoothness or correlation scores to have similarities for categorizing. The phrase is unclear and renders the claim vague and indefinite.
The term “similarity” in claim5, line 5, and claim 17, line 4, is a relative term which renders the claim indefinite. The term “similar” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. It is unclear in the claim how close the correlation scores need to be in comparing stimulus signal waveforms in a numerical term or in terms of a tolerance or range to have similarity in correlation scores. The phrase is unclear and renders the claim vague and indefinite.
Dependent claims 18 - 20 are rejected due to inherited claim deficiencies of claim 17.
Claim 9 lacks antecedent basis for “locate the bug” (Claim 9, line 3).
Suggested language: Amend the language to recite “locate a bug”.
The term “sufficiently” in claim 13 is a relative term which renders the claim indefinite. The term “sufficiently” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. It is unclear how much the uniform sample rate needs to be or how close to a high rate the sample rate needs to be, to be considered a “sufficiently” high rate. It is unclear how close or how much the high rates need to be for being a “sufficiently” high rate and renders the claim vague and indefinite.
Suggested language: Amend the language to recite “a high rate”.
Claims 14 and 16 lack antecedent basis for “indicate the presence of a bug” (Claim 14, line 2; claim 16, line 2).
Suggested language: Amend the phrase to recite “indicate a presence of a bug” for claims 14 and 16.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 17, 18 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Bhattacharya et al (U.S. PG Pub 2024/0061035 A1), hereinafter “Bhattacharya”.
As per claim 17, Bhattacharya discloses:
a method of testing an integrated circuit design under verification (DUV), the method comprising categorizing stimulus signal datasets of the DUV into categories in response to one or more of: related device behavior, waveform smoothness, or similarity in correlation scores comparing stimulus signals to corresponding response signals (Bhattacharya, par [0089] discloses devices, including defective versions and defect-free versions, interpreted as related device behavior, in the form of the device behaving a specific way, with one device having a possible deviation from its usually behavior due to a defect.)
generating multiple models, different ones of the models generated using stimulus data corresponding to stimulus signal datasets in corresponding ones of the categories (Bhattacharya, par [0092] discloses a MOSFET in a circuit designed with a defect and a defect-free MOSFET in a netlist for a simulation, with par [0088] adding the defects regarding circuits are defect models and defect-free devices, also interpreted as defect-free models.)
generating actual response data by applying stimulus signals of the corresponding stimulus signal datasets of the DUV to a simulation of the DUV (Bhattacharya, par [0072] discloses a simulation performed on a defective device, providing an output waveform of a CCB, indicated in par [0033] as a channel-connected blocks of a circuit device, simulated in parallel.)
generating predicted response data by applying the stimulus signals of the DUV in respective ones of the categories to ones of the models generated using respectively categorized stimulus data (Bhattacharya, par [0072] discloses a simulation performed on a defect-free device, providing an output waveform of the CCB, indicated in par [0033] as a channel-connected blocks of a circuit device, simulated in parallel.)
generating multiple error measurements, different ones of the error measurements corresponding to different ones of the stimulus signals (Bhattacharya, par [0071] discloses input stimuli provided into different CCB (channel connected blocks) of a circuit device, including defects, in which defects are provided into each CCB, and a simulation is performed and the output signals in the form of waveforms.)
the corresponding error measurement generated in response to a difference between actual response data of the corresponding stimulus signal, and predicted response data of the corresponding stimulus signal (Bhattacharya, par [0072] discloses a comparison of the defective and defect-free simulation output waveforms to determine the difference between the output waveforms, and the amount of difference between the output waveforms used to determine a possible defect densitization for the CCBs, in which par [0033] clarifies the defect sensitization as a measure of how likely the circuit design is to respond incorrectly when a particular defect (e.g., open circuit, short circuit, etc.) occurs in the circuit design.)
flagging as potentially bugged actual response data for which a corresponding one of the error measurements is greater than a threshold (Bhattacharya, par [0123] discloses a sensitization threshold to determine if the defects in the simulated devices are sensitized based on the difference between the defect-free and defective output waveforms, as a maximum difference value, and par [0127] discloses a set threshold, with the maximum difference value for the defect for a circuit used to indicate whether the defect is sensitized, in which a defect for a circuit with a maximum difference value higher than the threshold considered to be sensitized interpreted as an error or faulty circuit, with sensitization defined in par [0033] as a measure of how likely the circuit design is to respond incorrectly when a particular defect (e.g., open circuit, short circuit, etc.) occurs in the circuit design.)
For claim 18: The prior art of Bhattacharya discloses claim 18: The method of claim 17, wherein
the categories are first categories (Bhattacharya, par [0041] discloses an initial simulation using defect-free circuits with input probes.)
further comprising categorizing response signals into second categories in response to response signal behavior (Bhattacharya, par [0041] discloses using waveforms obtained by the probe inputs from the defect-free circuit design, adding defects, and simulating the circuit, now with defects. The use of the output waveforms used in a simulation with defects in the circuit are interpreted as a related device behavior type of category, using defect-free and defective versions of a circuit in the simulations.)
For claim 20, the prior art of Bhattacharya discloses claim 20: The method of claim 18, wherein
different error thresholds are selected for different response signals in response to corresponding response signal-specific minimum error magnitudes to be detected (Bhattacharya, par [0127] discloses maximum difference sensitization data for defects, with a sensitization threshold having a specified value for determining if a defect measurement is sensitized, and a different threshold used to determine if a different defect measurement is sensitized.)
Allowable Subject Matter
Claims 1 - 16 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 101 (for claims 12 – 16 above) and 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claim 1: The prior art of Bhattacharya et al (U.S. PG Pub 2024/0061035 A1) discloses simulation of a defect-free and a defective circuit and a threshold to determine if the defect for the simulated circuit is sensitized, indicating an incorrect response to occur in the circuit due to the defect, with Korchemny et al. (U.S. Patent 11,544,435 B1) discloses using previous signal values used to obtain measurement values for a segment of a waveform, obtaining a first segment of the waveform related to a circuit, obtaining a second segment of a waveform, and a future segment of a waveform, also considered a third segment of the waveform obtained based on sample values, Tully et al. (U.S. Patent 12,078,677 B1) discloses an initial voltage levels with set values in which a test pattern fails on a device, and adjusting voltage levels on a device under test when a test pattern passes, and input threshold levels, and Sultania et al. (U.S. Patent 11,734,080 B1) discloses a time slice of a signal from a stimulus file, and a partial waveform is produced, along with a threshold data size regarding a waveform with a tolerance limit.
However, none of the references cited, including the prior art of Bhattacharya, Korchemny, Tully, and Sultania, taken either alone or in combination with the prior art of record discloses a method of testing an integrated circuit design under verification, including the steps of using a first and second segment of data corresponding to stimulus signals of the design under verification, obtaining a first and second correlation measure in response to a stimulus-response behavior generated, the design under verification, and the second segment of data regarding the stimulus signal, when the first correlation measure is found to be less than a first threshold, the second fraction is increased, and an additional fraction associated with a third segment of the stimulus data added to the second segment based on the second correlation measure is less than a second threshold, in which the process is repeated when the correlation measures are found to be below the first or second threshold, in combination with the remaining elements and features of the claimed invention. It is for these reasons that the applicants’ invention defines over the prior art of record.
Dependent claims 2 - 11 are allowable under 35 U.S.C. 103 for depending from claim 1, an allowable base claim under 35 U.S.C. 103.
Claim 12: The prior art of Bhattacharya et al (U.S. PG Pub 2024/0061035 A1) discloses simulation of a defect-free and a defective circuit and a threshold to determine if the defect for the simulated circuit is sensitized, indicating an incorrect response to occur in the circuit due to the defect, with Korchemny et al. (U.S. Patent 11,544,435 B1) discloses using previous signal values used to obtain measurement values for a segment of a waveform, obtaining a first segment of the waveform related to a circuit, obtaining a second segment of a waveform, and a future segment of a waveform, also considered a third segment of the waveform obtained based on sample values, Tully et al. (U.S. Patent 12,078,677 B1) discloses an initial voltage levels with set values in which a test pattern fails on a device, and adjusting voltage levels on a device under test when a test pattern passes, and input threshold levels, and Sultania et al. (U.S. Patent 11,734,080 B1) discloses a time slice of a signal from a stimulus file, and a partial waveform is produced, along with a threshold data size regarding a waveform with a tolerance limit.
However, none of the references cited, including the prior art of A and B, taken either alone or in combination with the prior art of record discloses a method of testing an integrated circuit design under verification, including the steps of determining a bug in the design under verification based on a comparison of a maximum absolute running median filtered error and a threshold, in which the maximum absolute running median is obtained by z =
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, in combination with the remaining elements and features of the claimed invention. It is for these reasons that the applicants’ invention defines over the prior art of record.
Dependent claims 13 - 16 are allowable under 35 U.S.C. 103 for depending from claim 12, an allowable base claim under 35 U.S.C. 103.
Claim 19 is objected to as being dependent upon a rejected base claim under 35 U.S.C. 102, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art of Bhattacharya et al (U.S. PG Pub 2024/0061035 A1) discloses the limitations of claims 17, 18 and 20, and discloses simulation of a defect-free and a defective circuit and a threshold to determine if the defect for the simulated circuit is sensitized, indicating an incorrect response to occur in the circuit due to the defect, with Korchemny et al. (U.S. Patent 11,544,435 B1) discloses using previous signal values used to obtain measurement values for a segment of a waveform, obtaining a first segment of the waveform related to a circuit, obtaining a second segment of a waveform, and a future segment of a waveform, also considered a third segment of the waveform obtained based on sample values, Tully et al. (U.S. Patent 12,078,677 B1) discloses an initial voltage levels with set values in which a test pattern fails on a device, and adjusting voltage levels on a device under test when a test pattern passes, and input threshold levels, and Sultania et al. (U.S. Patent 11,734,080 B1) discloses a time slice of a signal from a stimulus file, and a partial waveform is produced, along with a threshold data size regarding a waveform with a tolerance limit.
However, none of the references cited, including the prior art of A and B, taken either alone or in combination with the prior art of record discloses:
Claim 19, wherein the generating error measurements normalizes ones of the error measurements corresponding to stimulus signals in same ones of the categories using same normalization factors.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CEDRIC D JOHNSON whose telephone number is (571)270-7089. The examiner can normally be reached M-Th 4:30am - 2:00pm, F 4:30am - 11:30am.
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/Cedric Johnson/ Primary Examiner, Art Unit 2186
August 8, 2026
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