Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Response to Arguments
Applicant's arguments filed 12/11/2025 have been fully considered but they are not persuasive.
Applicant argues that prior art fails to teach or render obvious “wherein a variation coefficient of an imaginary part of an impedance associated with an increase in frequency of the input signal indicates a negative value”. Examiner disagrees. The matching section of Imai comprises an inductance and a capacitance that are dependent on frequency (Xc = 1/(2πfC)). As long as the circuit is predominantly capacitive, the L-C circuit reactance X(fmax)-X(fmin) is a negative quantity. So for specific choice of L-C values and frequency band, a person of ordinary skill in the art can produce the claim limitation as part of routine engineering practice, thereby meeting the claim limitation.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, and 5 – 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Imai (US 20210384867 A1) as cited by the applicant.
Regarding Independent Claim 1, Imai teaches,
A combiner circuit (power amplifier circuit 200, Fig. 8) comprising:
a combiner section (the combiner section is comprised of converter 240 and the combining nodes between converter 240 and peaking amplifier 230, Fig. 8) configured to output a combined signal (signal after the combiner section, Fig. 8) by combining a first signal output (signal from carrier amplifiers 230, Fig. 8) from a carrier amplifier circuit (carrier amplifier 230, Fig. 8) and a second signal output (signal from peaking amplifier 230, Fig. 8) from a peak amplifier circuit (peaking amplifier 230, Fig. 8), the first signal being generated by amplifying a first distribution signal (signal RFin_a, Fig. 7. See paragraph [0063], “A power amplifier circuit 200 according to a second embodiment will be described with reference to FIGS. 6 to 8. FIG. 6 is a configuration diagram illustrating a schematic configuration of the power amplifier circuit 200 according to the second embodiment. FIG. 7 is a configuration diagram illustrating a modification of the power amplifier circuit 200 according to the second embodiment. FIG. 8 is a configuration diagram illustrating an example of a configuration of the power amplifier circuit 200 according to the second embodiment.”) distributed from an input signal (signal RFin, Fig. 7), the second signal being generated by amplifying a second distribution signal (signal RFin_b, Fig. 7) distributed from the input signal; and
a matching section (balun 260, Fig. 8, see paragraph [0067], “As illustrated in FIG. 8, the power amplifier circuit 200 performs matching between the impedance R.sub.L of the load 1000 and an output impedance as seen from the peaking amplifier 230 by using a balun 260. The balun 260 includes, for example, a matching-purpose transformer 261, an input-purpose capacitor 262, and an output-purpose capacitor 263.”) connected in series with the combiner section and configured to receive the combined signal, wherein a variation coefficient (the reflection coefficient quantifies how much of the input power is reflected back towards the power source due to impedance mismatches within the converter. See paragraph [0032], “Here, an output impedance may be calculated by using a reflection coefficient obtained from a traveling wave and a reflected wave that are measured from the load 1000 side when a transistor of each of the amplifiers 120 and 130 is biased without necessarily an idle current being caused to flow therethrough.”) of an imaginary part of an impedance associated with an increase in frequency of the input signal indicates a negative value, and the matching section is configured to match impedance between the combiner section and a load (load 1000, Fig. 8).
Regarding claim 3,
The combiner circuit according to Claim 1, wherein the matching section comprises a low-pass filter comprising an inductor and a capacitor (a single-stage low pass filter composed of an inductor 361 and a capacitor 362, Fig. 9. See paragraph [0072] “A power amplifier circuit 300 according to a third embodiment will be described with reference to FIG. 9. FIG. 9 is a configuration diagram illustrating an example of a configuration of the power amplifier circuit 300 according to the third embodiment. In the power amplifier circuit 300 according to the third embodiment, a description of things in common with the above-described embodiments is omitted, and only respects in which the third embodiment differs from the above-described embodiments will be described. In particular, similar function effects achieved by similar configurations are not described one by one.”)
Regarding claim 5,
The combiner circuit according to Claim 1, wherein the matching section comprises:
a first transformer (transformer 151, Fig. 5. Fig. 2 of the first embodiment shows a plurality of converters 150, each comprising a transformer 151) comprising a first input-side winding to which the combined signal is input, and a first output-side winding which is electromagnetic-field coupled with the first input-side winding (an input-side winding 151a and an output-side winding 151b, Fig. 5);
a first capacitor (capacitor 152, Fig. 5) connected in parallel with the first input-side winding; and
a second capacitor (capacitor 153, Fig. 5) connected in parallel with the first output-side winding.
Regarding claim 6,
The combiner circuit according to Claim 1, wherein the carrier amplifier circuit forms a differential amplifier circuit with a first carrier amplifier and a second carrier amplifier (carrier amplifier 220 in Fig. 7 is a differential amplifier composed of two amplifier elements as shown in Fig. 8, See paragraph [0063] as shown above).
Regarding claim 7,
The combiner circuit according to Claim 6, wherein the peak amplifier circuit forms a differential amplifier circuit with a first peak amplifier and a second peak amplifier (peaking amplifier 230 in Fig. 7 is a differential amplifier composed of two amplifier elements as shown in Fig. 8, See paragraph [0063] as shown above)
Regarding claim 8,
The combiner circuit according to Claim 7, wherein the combiner section comprises:
a first converter (converter 240, Fig. 7) electrically connected with an output terminal of each of the first carrier amplifier and the second carrier amplifier, the first converter being configured to convert impedance on an output side of the first carrier amplifier and the second carrier amplifier;
and a second converter (converter 250, Fig. 7) electrically connected with an output terminal of each of the first peak amplifier and the second peak amplifier, the second converter being configured to convert impedance on an output side of the first peak amplifier and the second peak amplifier.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Imai in view of Abdo et al. (US 20170085228 A1), hereinafter Abdo.
Regarding claim 4, Imai is silent regarding;
wherein the matching section comprises a bandpass filter having a first terminal electrically connected with the combiner section, and a second terminal electrically connected with an antenna on an opposite side of the combiner section.
Abdo discloses;
wherein the matching section comprises a bandpass filter (impedance matching circuits 2710 and 2712, Fig. 27, See paragraph [0102], “As discussed previously, each input impedance matching circuit 2710, 2712 may be implemented as a low pass filter circuit (e.g., input circuit 110, FIG. 1), a high pass filter circuit (e.g., input circuit 210, FIG. 2), or a bandpass filter circuit (e.g., input circuit 310, FIG. 3), which may include various configurations of inductors and capacitors (e.g., inductors 116, 216, 316, 317, 416, 417 and capacitors 114, 214, 314, 315, 414, 415)”) having a first terminal electrically connected with the combiner section, and a second terminal electrically connected with an antenna (load 2780 functions as an antenna, Fig. 27, See Paragraph [0097], “An input signal received at input node 2701 is amplified by amplifier system 2700 and provided to a load 2780 (e.g., an antenna) via output node 2770.”) on an opposite side of the combiner section (the filter is electrically connected to the combiner, which is composed of power divider 2740, and is electrically connected to the antenna, see Fig. 27).
Imai and Abdo are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a bandpass filter in Imai’s design in order to allow a specific range of frequencies while attenuating frequencies outside that range as it is well-understood in the art and a bandpass filter can be an alternative/equivalent matching circuit able to provide the same function (See paragraph [0105] as per Abdo, “According to an embodiment, the input impedance matching circuits 2710, 2712 are substantially identical to each other (e.g., low pass, high pass, or bandpass circuits), and the output impedance matching circuits 2730, 2732 also are substantially identical to each other (e.g., high pass, low pass, or bandpass circuits).”).
Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over the second embodiment of Imai in view of the first embodiment of Imai, hereinafter the first embodiment of Imai.
Regarding claim 9, the second embodiment of Imai is silent regarding:
The combiner circuit according to Claim 8, wherein the first converter comprises:
a second transformer comprising a second input-side having a first end electrically connected with the first carrier amplifier and a second end electrically connected with the second carrier amplifier, and a second output-side winding which is electromagnetic-field coupled with the second input-side winding;
a third capacitor electrically connected in parallel with the second input-side winding; and
a fourth capacitor electrically connected in series between the second output-side winding and the matching section.
The first embodiment of Imai discloses:
wherein the first converter comprises:
a second transformer (transformer 141, Fig. 5) comprising a second input-side (141a, Fig. 5) having a first end electrically connected with the first carrier amplifier and a second end electrically connected with the second carrier amplifier (transformer 141 is connected to the two carrier amplifiers of carrier amplifier 120, Fig. 5), and a second output-side winding (141b, Fig. 5) which is electromagnetic-field coupled with the second input-side winding;
a third capacitor (capacitor 142, Fig. 5) electrically connected in parallel with the second input-side winding; and
a fourth capacitor (capacitor 143, Fig. 5) electrically connected in series between the second output-side winding and the matching section.
Imai is considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a transformer with two capacitors, one connected in series between the transformer and the output matching circuit and one connected in parallel between the transformer and the carrier amplifiers in Imai’s second embodiment design as a DC block in order to protect components as it is well-understood in the art.
Regarding claim 10, the second embodiment of Imai is silent regarding:
The combiner circuit according to Claim 9, wherein the second transformer comprises:
a third transformer having a first end electrically connected with the first peak amplifier and a second end electrically connected with the second peak amplifier, and a third output-side winding which is electromagnetic-field coupled with the third input-side winding;
a fifth capacitor electrically connected in parallel with the third input-side winding; and
a sixth capacitor electrically connected in parallel with the third output-side winding.
The first embodiment of Imai discloses:
The combiner circuit according to Claim 9, wherein the second transformer comprises:
a third transformer (transformer 151, Fig. 5) comprising a third input-side winding (151a, Fig. 5) having a first end electrically connected with the first peak amplifier and a second end electrically connected with the second peak amplifier (transformer 151 is connected to the two peaking amplifiers of peaking amplifier 130, Fig. 5), and a third output-side winding (151b, Fig. 5) which is electromagnetic-field coupled with the third input-side winding;
a fifth capacitor (capacitor 152, Fig. 5) electrically connected in parallel with the third input-side winding; and
a sixth capacitor (capacitor 153, Fig. 5) electrically connected in parallel with the third output-side winding.
Imai is considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a transformer with two capacitors connected in parallel, one between the transformer and the carrier amplifiers, and one between the transformer and the output in Imai’s second embodiment design as a DC block in order to protect components as it is well-understood in the art.
Claims 11 – 12 are rejected under 35 U.S.C. 103 as being unpatentable over the second embodiment of Imai and the first embodiment of Imai in view of Mu (US 20160006400 A1), hereinafter Mu.
Regarding claim 11, The first embodiment of Imai discloses:
wherein:
a first end of the second output-side winding is electrically connected in series with the matching section via the fourth capacitor (capacitor 143 connects the transformer in series with the output of the transformer in the first embodiment, which in the second embodiment connects to the balun 262), and
the combiner circuit further comprises a seventh capacitor electrically connected in series between a second end of the second output-side winding and a first end of the third output-side winding.
First and second embodiments of Imai are silent regarding:
the combiner circuit further comprises a seventh capacitor electrically connected in series between a second end of the second output-side winding and a first end of the third output-side winding.
Mu discloses:
the combiner circuit further comprises a seventh capacitor (capacitor 370_i, Fig. 6) electrically connected in series between a second end of the second output-side winding (interconnection terminal 230_i-1, Fig. 6) and a first end of the third output-side winding (interconnection terminal 240_i, Fig. 6).
(See paragraph [0037], “In FIG. 6, the chain of auto transformers 210_1-210_N comprises a capacitor 370.sub.—i operatively connected in series with the auto transformers 210_1-210_N between the first auto transformer 210.sub.—i and the second auto transformer 210.sub.—i−1.”)
Imai and Mu are considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a capacitor connected in series between the two transformers in Imai’s second embodiment design in order to provide a DC open circuit between the power supply nodes as it is well-understood in the art.
Regarding claim 12, first and second embodiments of Imai are silent regarding:
The combiner circuit according to Claim 11, further comprising:
an eighth capacitor electrically connected in series between a second end of the third output-side winding and a reference potential.
Mu discloses:
The combiner circuit according to Claim 11, further comprising:
an eighth capacitor (capacitor 370a_i, Fig. 7) electrically connected in series between a second end of the third output-side winding (interconnection terminal 240_i, Fig. 7) and a reference potential (ground connected to interconnection terminal 240 via inductor 382_i and switch 380_i, Fig. 7).
(See paragraph [0041], “By selecting the resonance frequency of the series connection of capacitor 370a.sub.—i and the inductor 382.sub.—i at about a used RF frequency (such as a center frequency of an RF band used), a low-ohmic path to signal ground is provided from the interconnection terminal 240.sub.—i, whereby insertion losses in the auto-transformers 210.sub.—i-210_N can be largely reduced, or more or less eliminated.”)
Imai and Mu are considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a capacitor connected to a reference potential in Imai’s second embodiment design in order to reduce the insertion losses in the transformers as it is well-understood in the art.
Allowable Subject Matter
Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, the closest patent publication matches with the current invention is Imai et al. (US 20210384867 A1). Imai teaches a power amplifier with an arrangement that matches closely with the combiner circuit arrangement of the current invention; however, the arrangement in Imai fails to teach the equations (1) – (6) as claimed. Therefore, the power amplifier from Imai is not suitable for the application as claimed.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE E PINERO whose telephone number is (703)756-4746. The examiner can normally be reached M-F 8:00 AM - 5:00 PM (ET).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached on (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOSE E PINERO/
Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843