DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims Status
Claims 1-19 and 21-24 are currently pending, claims 1, 3-5, 8-9, 11, 14, 16, 18-19 are currently amended, claim 20 is cancelled and claims 21-24 are new.
Response to Arguments
Applicant amendment of claim 11 overcomes the previous objection, the objection to claim 11 is withdrawn.
Applicant’s arguments, see remarks, filed 05/05/2026, with respect to the rejection(s) of amended claim(s) 1, 8 and 16 under 35 U.S.C.103 have been fully considered but are not persuasive.
Regarding claim 1, Applicant argues that the prior art does not disclose the following limitations of amended claim 1 “…a controller having a current sense input, second and third inputs, and a control output...the second input configurable to program a current threshold, and the third input configurable to program a timer, the controller configurable to repeatedly turn on and off the transistor at a cycle period based on the timer and the current threshold to charge the capacitor...”.
Applicant argues that MATSUSHITA fails to disclose a timer and “the second input configurable to program a current threshold, and the third input configurable to program a timer” as recited in claim 1.
The examiner respectfully disagrees and explains that MATSUSHITA discloses a controller which detects the current through the FET 5 using a current detecting part [Fig.1, Item#6C and Col.6, lines 13-34) and turns off the FET 5 via gate driving part [Fig.1,6a]. The switch is kept in the off position until a next switching period arrives (See Col.2, lines 36-42 and Col.6, lines 25-36, disclose controlling the FET according to a switching period, interpreted as the timer). MATSUSHITA also discloses that the threshold current Ith is preset according to the upper limit of the withstand power of the FET (Col.6, lines 22-24) and that the operation of turning on the switch until a certain threshold current Ith is reached, turning off the switch until the next switching period arrives and repeating the process until the capacitor is charged (See Col.5, lines 28-34). However, MATSUSHITA does not disclose the controller is programmable via a second and third input to receive the threshold current and to program the timer. MATSUSHITA discloses that the parameters may be determined at the time of design.
MATSUSHITA as modified by BERNARDON was previously used to reject the programmable function of claims 19-20, BERNANDON discloses an inrush current limiting circuit comprising a controller which controls the switching function of a FET which is activated to charge a capacitor based on current threshold and a switching period. BERNANDON discloses the switching period may be a variable period (See Par.22). The examiner interpreted the variable period to be a programmable period.
Regarding applicant’s amendment to include a second and third input to program a current threshold and a timer, the examiner first explains that controllers are well known to be programmable in order to allow them to operate in different circuits. Otherwise, each application will require its own controller which is specifically designed to its specifications. Controllers are programmed wither wirelessly or via a wired connection via pins to set the parameters of the controller to according to the application at hand. The examiner further explains that it would have been an obvious design choice to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA and BERNARDON by using a programmable controller for the benefit of allowing the user to use the controller in a variety of applications with different switch maximum current ratings.
The examiner has also added new prior art reference BAURLE et al. (US 2012/0320640 A1) to address the newly added limitations of a programmable controller (See Figs.2-3, disclose a controller 270/370, an external programming circuit 285/385 and Par.22, disclose the external programming circuit is used to change parameters such as the current limit and the switching frequency and user programmable delay periods).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify MATSUSHITA and BERNARDON with the teachings of BAURLE by replacing the fixed controller with a programmable controller for the benefit of allowing the user to use the controller in a variety of applications with different switch maximum current ratings.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over MATSUSHITA et al. (US 10,128,651 B2, hereinafter MATSUSHITA) in view of BAURLE et al. (US 2012/0320640 A1, hereinafter BAURLE).
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Regarding claim 1, MATSUSHITA discloses a system, comprising:
a transistor having a control input (See Fig.1, discloses a transistor gate receiving a control signal from control unit 6) and first and second current terminals (See Fig.1, Item#5, discloses a transistor comprising a first terminal connected to power source 1 and second terminal connected to diode 9 and inductor 8);
a diode coupled between the second current terminal and a supply reference terminal (See Fig.1, Item#9);
an electronics unit having a supply voltage terminal, the electronics unit having a capacitor coupled between the supply voltage terminal and the supply reference terminal (See Fig.1, discloses a “Loas” comprising a capacitor 9 coupled between a supply voltage line in the upper branch and a ground at the bottom branch);
a cable coupled between the transistor and the electronics unit (See Fig.1, discloses a conductor connection between the capacitor 10 and the transistor 5), the cable having a parasitic inductance (See Fig.1, Item#8); and
a controller (See Fig.1, Item#6, discloses a control unit) having a current sense input (See Fig.1, Item#6C, discloses a current detecting part) and a control output (See Fig.1, Item#6a, discloses a gate driving part), the current sense input coupled to the first current terminal (See Fig.1, discloses the current sensing part 6c is connected to the first terminal of the transistor 5), and the control output coupled to the control input (See Fig.1, discloses the controller 6 gate driving part 6a is connected to the gate of the transistor 5), the controller configured to repeatedly turn on and off the transistor to charge the capacitor at a cycle period based on a timer and the current threshold (See Fig.3A and Col.2, lines 36-42, discloses the transistor 5 is turned on. Also See Col.2, lines 36-42 and Col.6, lines 13-24, disclose the transistor 5 is turned off when the measured current reaches a threshold Ith. Col.5, lines 28-34, disclose repeating the process of turning the transistor on and off to charge the capacitor and inhibiting inrush current), wherein each time the transistor is turned off, inductive energy in the parasitic inductance continues to charge the capacitor (See Fig.3B, discloses current IL flows from the inductance 8 to the capacitor 10 when the transistor 5 is turned off).
But MATSUSHITA does not disclose the cable having a length of at least one meter.
However, the examiner explains that the cable length is an obvious design choice, and it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed MATSUSHITA by changing the cable length to a desired length (such as 1 meter) for the benefit of providing power to a load at a specific distance.
However, MATSHUSHITA does not disclose the controller having second and third inputs, the second input is configurable to program a current threshold, and the third input configurable to program a timer.
BAURLE discloses a programmable power converter comprising a controller having second and third inputs, the second input is configurable to program a current threshold, and the third input configurable to program a timer (See Figs.2-3 and Pars.28 and 32, disclose current limit, switching frequency and a delay period are programmed by the user via external programming circuit 285/385).
MATSUSHITA and BAURLE are analogous art since they both deal with power supply circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA with the teachings of BAURLE by replacing the fixed controller with a programmable flexible controller for the benefit of allowing the user to use the controller in a variety of applications with different switch maximum current ratings.
Regarding claim 7, MATSUSHITA and BAURLE disclose the system of claim 1 as discussed above, wherein the capacitor is coupled between a supply voltage terminal and a supply reference terminal of an electronics unit (See MATSHUSHITA, Fig.1, discloses a capacitor 10 coupled between voltage supply terminal in the upper branch and ground coupled to the lower branch).
Claim(s) 3-6, 8-19 and 21-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over MATSUSHITA in view of BAURLE and in further view of BERNARDON et al. (US 2014/0009134 A1, hereinafter BERNARDON).
Regarding claims 8, 16, 21 and 23 (claim 8 is considered representative for limitation matching purposes), MATSUSHITA discloses a system, comprising:
a transistor having a control input and first and second current terminals (See Fig.1, Item#5, discloses a transistor comprising a first terminal connected to power source 1 and second terminal connected to diode 9 and inductor 8);
a capacitor (See Fig.1, Item#10);
a cable coupled between the transistor and the capacitor (See Fig.1, discloses a conductor connection between the capacitor 10 and the transistor 5); and
a controller (see Fig.1, Item#6, discloses a control unit) having a current sense input (See Fig.1, Item#6C, discloses a current detecting part) and a output (See Fig.1, Item#6a, discloses a gate driving part), the current sense input coupled to the first current terminal (See Fig.1, discloses the current sensing part 6c is connected to the first terminal of the transistor 5), and the output of the controller coupled to the control input, the controller configured to:
(a) turn on the transistor (See Fig.3A and Col.2, lines 36-42, discloses the transistor 5 is turned on);
(b) determine that a current through the transistor has reached a threshold (See Col.2, lines 36-42 and Col.6, lines 13-24, disclose monitoring the current to determine when it reaches a threshold value Ith to turn off the transistor) ;
(c) in response to the determination that the current has reached the threshold (See Col.2, lines 36-42 and Col.6, lines 13-24, disclose the transistor 5 is turned off when the measured current reaches a threshold Ith),
turn OFF the transistor (See Col.6, lines 28-36, disclose the transistor is turned off until the next switching period arrives).
However, MATSHUSHITA does not disclose the controller having second and third inputs, the second input is configurable to program a current threshold, and the third input configurable to program a timer and start a timer; and (d) upon expiration of the timer, repeat (a), (b), and (c).
BAURLE discloses a programmable power converter comprising a controller having second and third inputs, the second input is configurable to program a current threshold, and the third input configurable to program a timer (See Figs.2-3 and Pars.28 and 32, disclose current limit, switching frequency and a delay period are programmed by the user via external programming circuit 285/385).
MATSUSHITA and BAURLE are analogous art since they both deal with power supply circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA with the teachings of BAURLE by replacing the fixed controller with a programmable flexible controller for the benefit of allowing the user to use the controller in a variety of applications with different switch maximum current ratings.
However, MATSUSHITA and BAURLE do not disclose start a timer; and (d) upon expiration of the timer, repeat (a), (b), and (c).
BERNARDON discloses an inrush current limiting circuit, comprising a transistor, (c) in response to the determination that the current has reached the threshold, turn OFF the transistor and start a timer (See Par.22, discloses that “When the current during the inrush current phase reaches a predefined upper threshold, the switch 106 may be turned off (i.e. rendered non-conductive) by the controller 120 for a predefined period of time”. The predefined period of time is interpreted to be a setting of a timer until it expires then the switch is reconnected); and (d) upon expiration of the timer, repeat (a), (b), and (c) (See Par.22, disclose the process is repeated when the time expires, the switch is turned on again. MATSHUSHITA as modified by BAURLE and BERNARDON discloses that the current is monitored after the switch is turned on to determine when to switch it off and then switched back on when the timer expires).
MATSUSHITA, BAURLE and BERNARDON are analogous art since they all deal with power supply circuits
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA and BAURLE with the teachings of BERNARDON by setting a timer and turning the transistor on when the time expires for the benefit of ensuring the switch is turned on to resume the power delivery without the need to continuously monitor the current.
Regarding claim 3, MATSUSHITA and BAURLE disclose the system of claim 1 as discussed above, wherein the controller configured to:
(a) turn on the transistor (See MATSUSHITA, Fig.3A and Col.2, lines 36-42, discloses the transistor 5 is turned on);
(b) determine that a current through the transistor has reached the current threshold (See MATSUSHITA, Col.2, lines 36-42 and Col.6, lines 13-24, disclose monitoring the current to determine when it reaches a threshold value Ith to turn off the transistor) ;
(c) in response to the determination that the current has reached the threshold (See MATSUSHITA, Col.2, lines 36-42 and Col.6, lines 13-24, disclose the transistor 5 is turned off when the measured current reaches a threshold Ith), turn OFF the transistor (See MATSUSHITA , Col.6, lines 28-36, disclose the transistor is turned off until the next switching period arrives).
However, MATSUSHITA and BAURLE do not disclose start a timer; and (d) upon expiration of the timer, repeat (a), (b), and (c).
BERNARDON discloses an inrush current limiting circuit comprising a transistor, (c) in response to the determination that the current has reached the threshold, turn OFF the transistor and start a timer (See Par.22, discloses that “When the current during the inrush current phase reaches a predefined upper threshold, the switch 106 may be turned off (i.e. rendered non-conductive) by the controller 120 for a predefined period of time”. The predefined period of time is interpreted to be a setting of a timer until it expires then the switch is reconnected); and (d) upon expiration of the timer, repeat (a), (b), and (c) (See Par.22, disclose the process is repeated when the time expires, the switch is turned on again. MATSHUSHITA as modified by BERNARDON discloses that the current is monitored after the switch is turned on to determine when to switch it off).
MATSUSHITA, BAURLE and BERNARDON are analogous art since they all deal with power supply circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA and BAURLE with the teachings of BERNARDON by setting a timer and turning the transistor on when the time expires for the benefit of ensuring the switch is turned on to resume the power delivery without the need to continuously monitor the current.
Regarding claims 4, 9, 19, 22 and 24 (claim 9 is considered representative for limitation matching purposes), MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, wherein a timer is programmable (See BERNARDON, Par.22, discloses the off time may be fixed or variable. The time is set in the control unit 120 and is interpreted to be programmable since controllers are programmable processing units. Also, BAURLE discloses as shown in claim 1 rejection an external programming interface for programming the controller threshold current and frequency. MATSHUSHITA, Col.6, lines 13-15 also discloses changing the duty ratio, i.e. on period of the switch. The examiner interprets MATSHUSHITA as modified by BAURLE and BERNARDON to disclose a controller with an external programming interface to set the control parameters of the power supply).
However, MATSUSHITA, BAURLE and BERNARDON do not explicitly disclose the time is programmable based in a capacitance value of the capacitor and based on a target voltage and a target time period for charging the capacitor and the current threshold is programmable based on a current capability of the cable.
However, MATSHUSHITA further discloses the current threshold is programmable based on a current capability of the switching element (See Col.6, lines 22-24), also the examiner explains that capacitance of the capacitor is inversely proportional to the charging speed, that is as the capacitor increases in size it takes longer to charge the capacitor.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA, BAURLE and BERNARDON with the further teachings of MATSUSHITA by programming the threshold function as a function of the current capability of the cable (instead of the FET as disclosed by MATSUSHITA) for the benefit of protecting the cable against damage and to program the time based on a capacitance value of the capacitor and based on a target voltage and a target time period for charging the capacitor since capacitance is directly related to charging time for the benefit of allowing the capacitor to be fully charged.
Regarding claim 10, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, However, MATSUSHITA, BAURLE and BERNARDON do not disclose wherein the cable has a length of at least 1 meter.
However, the examiner explains that the length of the cable is an obvious design choice and it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed MATSUSHITA, BAURLE and BERNARDON by changing the cable length to a length such as 1 meter for the benefit of providing power to a load at a specific distance.
Regarding claim 11, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, however, MATSUSHITA, BAURLE and BERNARDON do not explicitly disclose wherein the cable includes an 8 AWG conductor and has a length of at least 1 meter.
However, the examiner explains that the conductor gauge and length are determined based on the specific application and the current value that flows through the conductor and it would have been obvious to one of ordinary skill in the art before the effective to modify the invention disclosed by MATSUSHITA, BAURLE and BERNARDON by using an appropriate size and length conductor for the benefit of safely conducting the current without risk of overheating or damage.
Regarding claim 12, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, further comprising a diode having an anode and a cathode (See MATSUSHITA, Fig.1, Item#9, discloses a diode), the anode coupled to the second current terminal (See MATSUSHITA, Fig.1, discloses the anode of diode 9 is connected to second current terminal of transistor 5) and the cathode coupled to a supply reference terminal (See MATSUSHITA, Fig.1, discloses the cathode of the diode 9 is coupled to ground).
Regarding claim 13, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, wherein the system is an automobile (See BERNARDON, Par.40, discloses the circuit may be used in an automotive application).
Regarding claims 14 and 18 (Claim 14 is considered representative for limitation matching purposes), MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, further comprising an automobile battery coupled to the first current terminal (See BERNARDON, Pars.40-41, disclose the operation is performed in a vehicle environment), and (a), (b), (c) and (d) are repeatedly performed until the capacitor is charged to a voltage of the automobile battery (See Claim 8 rejection discloses repeating the steps of the (a), (b), (c) and (d). BERNARDON, Par.22, discloses charging the capacitor until it reaches the voltage of the battery provided at input 102. For the benefit of continuing to operate application such as an airbag if connection with the battery is severed [Pars.40-41]).
Regarding claim 15, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, wherein the capacitor is coupled between a supply voltage terminal and a supply reference terminal of an electronics unit (See MATSUSHITA, Fig.1, discloses capacitor 10 coupled between supply voltage terminal at the top branch and ground at the bottom branch).
Regarding claim 17, MATSUSHITA, BAURLE and BERNARDON disclose the method for charging the capacitor of claim 16 as discussed above, further comprising continuing to charge the capacitor after turning off the transistor using energy stored a magnetic field of a parasitic inductance (See MATSUSHITA, Fig.3B, discloses a current IL output from the inductance 8 while the transistor 5 is opened and the current continues to charge the capacitor 10).
Regarding claim 5, MATSUSHITA, BAURLE and BERNARDON disclose the system of claim 8 as discussed above, further comprising an automobile battery coupled to the first current terminal (See BERNARDON, Pars.40-41, disclose the operation is performed in a vehicle environment), and (a), (b), and (c) are repeatedly performed until the capacitor is charged to a voltage of the automobile battery (See Claim 8 rejection discloses repeating the steps of the (a), (b) and (c). BERNARDON, Par.22, discloses charging the capacitor until it reaches the voltage of the battery provided at input 102. For the benefit of continuing to operate application such as an airbag if connection with the battery is severed [Pars.40-41]).
Regarding claim 6, MATSUSHITA and BAURLE disclose the system of claim 1 as discussed above, However, MATSUSHITA and BAURLE do not disclose wherein the system is an automobile.
BERNARDON discloses an inrush current limiting circuit in a system comprising an automobile (See BERNARDON, Par.40, discloses the circuit may be used in an automotive application).
MATSUSHITA, BAURLE and BERNARDON are analogous art since they all deal with power supply circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA and BAURLE with the teachings of BERNARDON by using the disclosed circuit in an automobile for the benefit of providing a vehicle circuit which protects the circuitry against inrush current.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over MATSUSHITA in view of BAURLE and in further view of YELAMOS RUIZ et al. (US 11,349,474 B1, hereinafter YELAMOZ).
Regarding claim 2, MATSUSHITA and BAURLE disclose the system of claim 1 as discussed above, wherein the transistor is a first transistor (See Fig.1, Item#5).
However, MATSUSHITA and BAIRLE do not disclose the system includes a second transistor coupled in parallel with the first transistor.
YELAMOZ discloses circuit comprising an inrush current limiting function, the circuit including a second transistor coupled in parallel with a first transistor (See Fig.6, Items#114 and 112 and Col.4, lines 36-47. Note: YELAMOZ further discloses that the inrush current protection switch 112 may comprise a plurality of switches connected in parallel as shown in Fig.1 and Col.4, lines 48-60).
MATSUSHITA, BAURLE and YELAMOZ are analogous art since they all deal with power supply circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by MATSUSHITA and BAURLE with the teachings of YELAMOZ by adding a second transistor in parallel with the first transistor for the benefit of reducing power losses during normal operation by using a second switch with lower resistance and using the inrush current limiting transistor during inrush current protection mode.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AHMED H OMAR whose telephone number is (571)270-7165. The examiner can normally be reached 10:00 am -7:00 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AHMED H OMAR/Primary Examiner, Art Unit 2859
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