Prosecution Insights
Last updated: April 19, 2026
Application No. 18/193,156

Electrochemical Spectroscopy with Amplitude Compensation

Non-Final OA §101§102§103
Filed
Mar 30, 2023
Examiner
KUAN, JOHN CHUNYANG
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
99%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
387 granted / 534 resolved
+4.5% vs TC avg
Strong +47% interview lift
Without
With
+46.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
38 currently pending
Career history
572
Total Applications
across all art units

Statute-Specific Performance

§101
27.9%
-12.1% vs TC avg
§103
31.6%
-8.4% vs TC avg
§102
10.8%
-29.2% vs TC avg
§112
23.5%
-16.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 534 resolved cases

Office Action

§101 §102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 6 and 15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/24/2025. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. MPEP 2106 outlines a two-part analysis for Subject Matter Eligibility as shown in the chart below. PNG media_image1.png 930 645 media_image1.png Greyscale Step 1, the claimed invention must be to one of the four statutory categories. 35 U.S.C. 101 defines the four categories of invention that Congress deemed to be the appropriate subject matter of a patent: processes, machines, manufactures and compositions of matter. Step 2, the claimed invention also must qualify as patent-eligible subject matter, i.e., the claim must not be directed to a judicial exception unless the claim as a whole includes additional limitations amounting to significantly more than the exception. Step 2A is a two-prong inquiry, as shown in the chart below. PNG media_image2.png 681 881 media_image2.png Greyscale Prong One asks does the claim recite an abstract idea, law of nature, or natural phenomenon? In Prong One examiners evaluate whether the claim recites a judicial exception, i.e. whether a law of nature, natural phenomenon, or abstract idea is set forth or described in the claim. If the claim recites a judicial exception (i.e., an abstract idea enumerated in MPEP § 2106.04(a), a law of nature, or a natural phenomenon), the claim requires further analysis in Prong Two. If the claim does not recite a judicial exception (a law of nature, natural phenomenon, or abstract idea), then the claim cannot be directed to a judicial exception (Step 2A: NO), and thus the claim is eligible at Pathway B without further analysis. Abstract ideas can be grouped as, e.g., mathematical concepts, certain methods of organizing human activity, and mental processes. Prong Two asks does the claim recite additional elements that integrate the judicial exception into a practical application? If the additional elements in the claim integrate the recited exception into a practical application of the exception, then the claim is not directed to the judicial exception (Step 2A: NO) and thus is eligible at Pathway B. This concludes the eligibility analysis. If, however, the additional elements do not integrate the exception into a practical application, then the claim is directed to the recited judicial exception (Step 2A: YES), and requires further analysis under Step 2B. Claims 1, 2, 9-11, 13, 14, and 16-23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Regarding claim 1, Step 1: Is the claim to a process, machine, manufacture or composition of matter? Yes. Step 2A: Is the claim directed to a law of nature, a natural phenomenon, or an abstract idea (judicially recognized exceptions)? Yes (see analysis below). Prong one: Whether the claim recites a judicial exception? (Yes). The claim recites: 1. An apparatus, comprising: a measurement circuit configured to receive an electrical signal of a device under test (DUT) and generate a measurement signal representing the electrical signal; a high-pass filter circuit configured to perform a high-pass filtering operation on the electrical signal or the measurement signal to generate a filtered measurement signal; and a processing circuit configured to generate a measurement spectrum of the DUT based on the filtered measurement signal. The above bold-faced limitations are directed to mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations; and/or mental processes – concepts performed in the human mind (or with a pen and paper). Prong two: Whether the claim recites additional elements that integrate the exception into a practical application of that exception? (No). The claim recites additional elements as underlined above. However, the measurement circuit is recited at high level of generality that it covers a broad range of measurement circuit for measuring a signal. It is too broad to meaningfully limit the claim and can be an insignificant extra-solution activity for collecting data for the abstract idea. See MPEP 2106.05(g). The high-pass filter circuit and the processing circuit are recited to perform data processing functions (i.e., abstract idea). They can be implemented by a conventional computer or processor to facilitate the application of the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements are insufficient to integrate the abstract idea into a practical application of the abstract idea. Step 2B: Does the claim recite additional elements (other than the judicial exception) that amount to significantly more than the judicial exception? No (see analysis below). The claim does not include additional elements that are sufficient to make the claim significantly more than the judicial exception. As discussed with respect to Step 2A Prong Two above, the additional element(s) in the claim are an insignificant extra-solution activity and to invoke a generic computer for its computing power to facilitate the application of the abstract idea, Also, it is routine and conventional to invoke a computer for data processing. See MPEP 2106.05(d). Considered as a whole, the claim does not amount to significantly more than the abstract idea. Claims 10 and 18 are similarly rejected by analogy to claim 1. Dependent claims 2, 9, 11, 13, 14, 16, 17, and 19-23 when analyzed as a whole respectively are held to be patent ineligible under 35 U.S.C. 101 because they either extend (or add more details to) the abstract idea or the additional recited limitation(s) (if any) fail(s) to establish that the claim(s) is/are not directed to an abstract idea, as discussed below: there is no additional element(s) in the dependent claims that sufficiently integrates the abstract idea into a practical application of, or makes the claims significantly more than, the judicial exception (abstract idea). The additional element(s) (if any) are mere instructions to apply an except, field of use, and/or insignificant extra-solution activities (applied to Step 2A_Prong Two and Step 2B; see MPEP 2016.05(f)-(h)) and/or well-understood, routine, or conventional (applied to Step 2B; see MPEP 2106.05(d)) to facilitate the application of the abstract idea. Note that claims 16 and 17 recite the electric signal includes a voltage signal or a current signal. However, the claim is merely to receive (see claim 10) the measurement signal of such signal(s). It is still an insignificant extra-solution activity for collecting data for the abstract idea. On the other hand, claims 3-5, 7, 8, and 12 are eligible under 35 USC 101. Claims 3 and 12 are eligible because the excitation circuit/operation is a meaningful limitation under step 2 analysis. Claims 4-5 are eligible because the analog-to-digital converter is a meaningful limitation under step 2 analysis. Claims 7 and 8 recites the electric signal includes a voltage signal or a current signal. This sufficiently limits the measurement circuit (see claim 1) to be a voltage and/or current measurement circuit (i.e., voltage/current sensor), which is a meaningful limitation. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 7, 8, 10-13, 16, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LOPEZ et al. (WO 2015177389 A1; hereinafter “LOPEZ”). Regarding claim 1, LOPEZ teaches an apparatus, comprising: a measurement circuit configured to receive an electrical signal of a device under test (DUT) and generate a measurement signal representing the electrical signal (i.e., “means for measuring voltage and current signals, Vbat, Ibat in the time domain of the energy storage element”; see translation p. 2, upper section); a high-pass filter circuit configured to perform a high-pass filtering operation on the electrical signal or the measurement signal to generate a filtered measurement signal (i.e., “the means for conditioning said measured voltage and current signals to conditioned voltage and current signals, Vbat_acond, lbat_acond comprise a high-pass filter to eliminate the continuous component of at least the measured voltage signal”; see translation p. 3, upper section); and a processing circuit configured to generate a measurement spectrum of the DUT based on the filtered measurement signal (i.e., “processing and control means configured to: [] analyze the energy of said signals in the domain of the voltage frequency V (f) and current l (f) digitized around the stimulus frequency; Y [] calculate an impedance vector Z (f)”; see translation p. 3, middle section; “Preferably the spectral content of the current stimulus is configurable at different frequencies so that different parts of the DUT can be analyzed whose correct operation against failure is observed at respective frequencies”; see translation p. 4, middle section). Regarding claim 2, LOPEZ further teaches: wherein the high-pass filter circuit is configured to attenuate a first component of the electrical signal or a second component of the measurement signal caused by charging or discharging of a battery (i.e., “the means for conditioning said measured voltage and current signals to conditioned voltage and current signals, Vbat_acond, lbat_acond comprise a high-pass filter to eliminate the continuous component of at least the measured voltage signal”; see translation p. 3, upper section; note that the “the continuous component” is the DC, or near-DC, component caused by charging or discharging the battery). Regarding claim 3, LOPEZ further teaches: an excitation circuit configured to provide an excitation signal having an excitation frequency to the DUT (i.e., “means for generating a current stimulus i (f) in the frequency domain with a given spectral content; means of transforming said current stimulus i (f) in the frequency domain to a current signal in the time domain; means for adjusting this current signal in the time domain to a charge level of the energy storage element and for exciting the energy storage element with this current signal adjusted in the time domain”; see translation p. 3, upper section); wherein the electrical signal represents a response of the DUT to the excitation signal (i.e., “measuring its electrical response in terms of voltage and current in the time domain”; see translation p. 4, middle section); and wherein a frequency response of the high-pass filter circuit is based on the excitation frequency (i.e., “This range of interest defines the cutoff frequency of the high pass filter”; see translation p. 3, middle section; “wherein the cut-off frequency of said high-pass filters (C23, R24; C23 ', R24') depends on the frequency spectrum of the current stimulus i (f)”; see translation p. 10, claim 5). Regarding claim 4, LOPEZ further teaches: an amplitude compensation circuit (see FIG. 6) including the high-pass filter circuit (i.e., high-pass filter formed by C23 and R24) and an analog-to-digital converter (ADC) (i.e., “analog-to-digital converter CAD 5”; see translation 8, lower section), the ADC configured to generate digital samples of the measurement signal (i.e., “digitize said conditioned voltage and current signals, Vbat_acond, lbat_acond”; see translation 5, upper section); and wherein the high-pass filter circuit is configured to perform the high-pass filtering operation on the measurement signal or the digital samples of the measurement signal (i.e., “The measured voltage signal Vbat is passed through a high-pass filter formed by a capacitor C23 of 10 mF and an R24 resistor of 1.6 kohm grounded; This high-pass filter lets the high frequency pass: it rejects the direct current and lets the signal pass from a frequency, in this particular example from 10 mHz. The amplifier 21 acts as a voltage follower (for which it uses a reference voltage Vref), obtaining a voltage at the output Vbat_acond, which is within the dynamic range of the analog-to-digital converter CAD 5”; see translation 8, lower section). Regarding claim 7, LOPEZ further teaches: wherein the electrical signal includes at least one of a voltage signal or a current signal (i.e., “means for measuring voltage and current signals, Vbat, Ibat in the time domain of the energy storage element”; see translation p. 2, upper section). Regarding claim 8, LOPEZ further teaches: wherein the electrical signal is a first electrical signal representing a voltage signal of the DUT (i.e., voltage measurement), the measurement signal is a first measurement signal (i.e., Vbat; see translation p. 2, upper section), the high-pass filtering operation is a first high-pass filtering operation (i.e., C23, R24), and the filtered measurement signal is a first filtered measurement signal (i.e., Vbat_acond; see FIG. 2 and FIG. 6); wherein the measurement circuit is configured to receive a second electrical signal representing a current signal of the DUT (i.e., current measurement) and generate a second measurement signal representing the current signal (i.e., Ibat; see translation p. 2, upper section); wherein the high-pass filter circuit is configured to perform a second high-pass filtering operation (i.e., C23’ and R24’) on the second electrical signal or the second measurement signal (i.e., Ibat) to generate a second filtered measurement signal (i.e. Ibat_acond; see FIG. 3); and wherein the processing circuit is configured to generate the measurement spectrum including an impedance spectrum based on the first and second filtered measurement signals i.e., “digitize said conditioned voltage and current signals, Vbat_acond, lbat_acond, and transform them into voltage signals V (t) and current l (t) digitized in the frequency domain; analyze the energy of said signals in the domain of the voltage frequency V (f) and current l (f) digitized around the stimulus frequency; Y [] calculate an impedance vector Z (f) as the ratio V (f) / I (f).”; see translation p. 5, upper section). Regarding claim 10, the claim recites the same substantive limitations as claim 1 in terms of the method involved, and is rejected by applying the same teachings. Regarding claim 11, the claim recites the same substantive further limitations as claim 2 and is rejected by applying the same teachings. Regarding claim 12, the claim recites the same substantive further limitations as claim 3 and is rejected by applying the same teachings. Regarding claim 13, the claim recites the same substantive further limitations as claim 4 and is rejected by applying the same teachings. Regarding claim 16, the claim recites the same substantive further limitations as claim 7 and is rejected by applying the same teachings. Regarding claim 17, the claim recites the same substantive further limitations as claim 8 and is rejected by applying the same teachings. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 9, 18-21, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over LOPEZ in view of Barsukov et al. (US 20220163592 A1; hereinafter “Barsukov”). Regarding claim 9, the prior art applied to the preceding linking claim(s) teaches the features of the linking claim(s). LOPEZ does not explicitly disclose: a windowing circuit configured to apply a window function to the filtered measurement signal. But Barsukov teaches: a windowing circuit configured to apply a window function to measurement signal (i.e., “Battery monitoring system 202 can control current measurement circuit 222 and voltage measurement circuit 224 to obtain samples of the respective current signal and voltage response signal within a measurement window. Controller circuit 220 can perform discrete Fourier transform (DFT) operations 320 on the current and voltage response signals samples to compute current and voltage response spectral components. Controller circuit 220 can perform DFT operations 320 using any suitable algorithms, such as fast Fourier transform (FFT) algorithms”; see [0040]). Since LOPEZ require a frequency transformation of the filtered signals (see translation p. 6, middle section), it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify LOPEZ in view of Barsukov, by incorporating a windowing circuit configured to apply a window function to the filtered measurement signal, as claimed. The rationale would be to facilitate the frequency domain transformation. Regarding claim 18, the claim recites the same substantive limitations as claim 1 and is rejected by applying the same teachings, except that the processor (i.e., the processing circuit in claim 1) is receiving the measurement signal and performing the high-pass filtering operation. However, Barsukov teaches: digitizing current/voltage measurement samples and digitally filtering the measurement samples (i.e., “Each of current measurement circuit 222 and voltage measurement circuit 224 can include pre-processing circuits, such as analog/digital filters, amplifiers, etc., to perform various pre-processing operations on the voltage/current signals. The pre-processing operations can include filtering operation to remove high frequency spectral components that can cause aliasing in the downstream sampling operation, amplification/attenuation operations, etc. Each of current measurement circuit 222 and voltage measurement circuit 224 can also include an analog-to-digital converter (ADC) to sample the pre-processed analog signal (e.g., a voltage across a battery cell 102, or a voltage across a resistive path to measure the current), and digitalize the signal sample”; see [0030]). Also, it is well-known to configured a processor to perform high-pass filtering operation digitally. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify LOPEZ in view of Barsukov by digitalizing the data processing such that the processor is receiving the measurement signal and performing the high-pass filtering operation, as claimed. The rationale would be to simplify the design and/or utilize the programmability of the processor for data processing. Regarding claim 19, the claim recites the same substantive further limitations as claim 2 and is rejected by applying the same teachings. Regarding claim 20, the claim recites the same substantive further limitations as claim 3 and is rejected by applying the same teachings. Regarding claim 21, as a result of modification applied to claim 18 above, the modified LOPEZ further teaches: storing instructions that, when executed by the processor, cause the processor to perform the high-pass filtering operation on digital samples of the measurement signal (see discussion of claim 18 above regarding digital processing). Regarding claim 23, the claim recites the same substantive further limitations as claim 8 and is rejected by applying the same teachings. Claims 5, 14, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over LOPEZ in view of Barsukov and Feeney et al. (US 20030130838 A1; hereinafter “Feeney”). Regarding claim 5, the prior art applied to the preceding linking claim(s) teaches the features of the linking claim(s). LOPEZ does not explicitly disclose: wherein the amplitude compensation circuit is configured to initialize a feedback value of the high-pass filter circuit to an average value of the measurement signal. But Barsukov teaches: digitizing current/voltage measurement samples and digitally filtering the measurement samples (i.e., “Each of current measurement circuit 222 and voltage measurement circuit 224 can include pre-processing circuits, such as analog/digital filters, amplifiers, etc., to perform various pre-processing operations on the voltage/current signals. The pre-processing operations can include filtering operation to remove high frequency spectral components that can cause aliasing in the downstream sampling operation, amplification/attenuation operations, etc. Each of current measurement circuit 222 and voltage measurement circuit 224 can also include an analog-to-digital converter (ADC) to sample the pre-processed analog signal (e.g., a voltage across a battery cell 102, or a voltage across a resistive path to measure the current), and digitalize the signal sample”; see [0030]). And Feeney (in the same endeavor of high-pass filtering) teaches: initializing a feedback value of a high-pass filter circuit to an average value of the measurement signal (i.e., “the high pass filter depends in part on its previous input and output values, also called filter initialization values or filter initial conditions. The estimate of direct current bias influence on the audio signal is used to determine filter initialization values 251. The high pass filter is initialized using the average sample value and at least one sample value from the first frame of audio data”; see [0018]). Also, it is well-known to configured a processor to perform high-pass filtering operation digitally. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify LOPEZ in view of Barsukov and Feeney to implement the high-pass filter as a digital filter, such that the amplitude compensation circuit is configured to initialize a feedback value of the high-pass filter circuit to an average value of the measurement signal, as claimed. The rationale would be to simplify the design and/or utilize the programmability of the processor for data processing; and to facilitate the initialization of the digital filter. Regarding claim 14, the claim recites the same substantive further limitations as claim 5 and is rejected by applying the same teachings. Regarding claim 22, the claim recites the same substantive further limitations as claim 5 and is rejected by applying the same teachings. Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. HOU et al. (CN 111580006 A) teaches an online measuring method of battery dynamic impedance, involving multi-tone excitation of a battery; filtering the direct current signal of the battery as the bias signal to obtain AC component; FFT the AC component; and calculating dynamic impedance of the battery. BAI (CN 101666861 A) teaches a detection device of storage battery including a CPU, an operation amplifier, a multi-path switch, a D/A converter, a large-power MOS tube, a coupled capacitor, a programmable band-pass filter and an A/D converter. Kim (US 20080303528 A1) teaches a method for measuring an effective component of the internal impedance of a stationary battery, involving high-pass or band-pass filtering a response signal of the battery upon an excitation signal; A/D converting the filtered signal; and calculating impedance of the battery based on the converted signal. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN C KUAN whose telephone number is (571)270-7066. The examiner can normally be reached M-F: 9:00AM-5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached at (571) 272-2302. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN C KUAN/Primary Examiner, Art Unit 2857
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Prosecution Timeline

Mar 30, 2023
Application Filed
Dec 08, 2025
Non-Final Rejection — §101, §102, §103 (current)

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Prosecution Projections

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Expected OA Rounds
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Grant Probability
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3y 1m
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