DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are presented for examination.
The drawing is objected 37 CFR 1.83(a) and minor informality.
Claims 1-20 are rejected 35 USC § 112 (b).
Claims 1, 3, 6-8, 11,13- 16 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020.
Claims 2, 5 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020. Further in the view of Kasprowicz; Christopher (US 11704715 B2)
Claims 4 and 9 -10 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Itoko 2, Toshinari, and Takashi Imamichi. "Scheduling of operations in quantum compiler." 2020 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2020.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Lin, Wan-Hsuan, et al. "Domain-specific quantum architecture optimization." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12.3 (2022): 624-637.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Itoko 2, Toshinari, and Takashi Imamichi. "Scheduling of operations in quantum compiler." 2020 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2020 further in the view of Lin, Wan-Hsuan, et al. "Domain-specific quantum architecture optimization." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12.3 (2022): 624-637.
This action is Non final rejection.
Information Disclosure Statement
The IDS submitted on 03/31/2023 , 05/02/2023, 07/08/2024, 12/12/2024, 04/04/2025, 11/06/2025 , 05/20/2026 are reviewed and considered. See attached documents.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “an
indication of the quantum hardware provider” in physical qubit connectivity information must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to because Fig 7. Should be 3 SWAPS not 4 SWAP according to [0016] and [0130]. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1,6 and 16 recites the limitation of “ Providing encoded SAT solver problem to a SAT Solver”. There is no full definition of SAT in the claims. The
specification does not disclose their definition either. Therefore, these claims are indefinite because no proper interpretation can be ascertained. All dependent claims also inherit the limitation and deficiency of its parent claim and is rejected for similar reason. So claims 1-20 are rejected by the above reason.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 6-8, 11,13- 16 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020.
As of claim 1, Itoko 1 teaches one or more computing devices of a service provider network configured to implement a quantum computing service, wherein the quantum computing service is configured to enable execution of quantum circuits using a plurality of quantum hardware devices; and (Col 1, line 20- 26
A quantum computer has a quantum circuit including physical quantum bits, or qubits, and couplings. Each physical qubit stores a logical qubit, and each coupling is a connection between a pair of physical qubits that is configured to facilitate execution of a quantum operation on a pair of logical qubits stored therein. Col. 5 line 62-63, Apparatus 140 may also be dedicated hardware for controlling quantum computing device 110)
one or more computing devices of the service provider network configured to implement a quantum compilation service configured to map a logical quantum circuit for execution using a given one of the quantum hardware devices, wherein to implement the quantum compilation service, the one or more computing devices are further configured to:(Col. 5-line 16-22, A “quantum operation” may be represented by a function block. For example, a function block may represent a quantum gate or a combination of quantum gates in a GUI for programming quantum computing algorithms. In this application, a “quantum operation” may be abbreviated to an “operation” if it is explicitly to be applied to one or more qubits… col. 6 line 3 -10 Apparatus 140 maps a plurality of operations in an operation sequence to be executed on quantum computing device 110. For example, apparatus 140 assigns logical qubits to physical qubits 120a to 120d. Apparatus 140 also inserts one or more swap operations for swapping a pair of logical qubits stored in a pair of physical qubits 120 in order to move a pair of logical qubits to be used by an operation to physical qubits 120 that are coupled by a coupling 130).
wherein the one or more computing devices that implement the quantum computing service are further configured to submit the quantum circuit mapping for use in execution of the logical quantum circuit using the given quantum hardware device ( Col 5 line 62 – 66, Apparatus 140 may also be dedicated hardware for controlling quantum computing device 110. Apparatus 140 obtains an operation sequence including a plurality of operations to be executed on a quantum circuit. The operation sequence is a sequence of quantum operations. The operation sequence is, for example, a program code including quantum operations or a logical quantum circuit including logical quantum gates…Col 6 line 3-5 Apparatus 140 obtains an operation sequence including a plurality of operations to be executed on a quantum circuit. The operation sequence is a sequence of quantum operations)
Itoko 1 does not explicitly teach receive a request to generate a quantum circuit mapping, wherein the request comprises: logical quantum circuit information corresponding to the logical quantum circuit; physical qubit connectivity information corresponding to the given quantum hardware device; and a number of SWAP gates to be used in the quantum circuit mapping; encode the quantum circuit mapping as a SAT solver problem, wherein to encode the quantum circuit mapping, the one or more computing devices are further configured to generate a Conjunctive Normal Form (CNF) equation that represents the quantum circuit mapping based, at least in part, on: the request; and a layout-transition-based order encoding scheme; provide the encoded SAT solver problem to a SAT solver; and responsive to receiving results of the SAT solver, generate the quantum circuit mapping, wherein the quantum circuit mapping is generated based, at least in part, on the number of SWAP gates indicated in the request; and provide the quantum circuit mapping to the quantum computing service.
While Molavi teaches receive a request to generate a quantum circuit mapping, wherein the request comprises: (section : “Our MAXSAT approach”, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate).
logical quantum circuit information corresponding to the logical quantum circuit;( Fig. 3: Running example and overview
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physical qubit connectivity information corresponding to the given quantum hardware device; and (Fig. 3: Running example and overview
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encode the quantum circuit mapping as a SAT solver problem, wherein to encode the quantum circuit mapping, the one or more computing devices are further configured to generate a Conjunctive Normal Form (CNF) equation that represents the quantum circuit mapping based, at least in part, on: the request; and ( section: “Sketching-like encoding” We encode every possible SWAP as a Boolean variable, where assigning the variable to true denotes performing a SWAP of a specific pair of adjacent physical qubits. We therefore ask the MAXSAT solver to minimize the number of SWAP variables set to true...“Our MAXSAT approach” , Roughly speaking, given a circuit and a connectivity graph, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate)
provide the encoded SAT solver problem to a SAT solver; and (section iV , “Soft Constraints and Optimality” fig. 5 fully formalizes all of the hard and soft constraints that our encoding generates. So, if we are given a circuit C and a connectivity graph G, we can use our encoding to generate a MAXSAT instance (Hard, Soft) whose solution results in an optimal QMR solution).
provide the quantum circuit mapping to the quantum computing service,
section II, “AN ILLUSTRATIVE EXAMPLE” , In order to execute a quantum circuit on a particular device, the compiler maps the logical qubits that appear in the circuit to appropriate physical qubits such that every two-qubit gate can be applied).
Itoko 1 and Molavi are considered to be analogous to the claimed invention since they focus on quantum circuit qubit mapping. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filing date to integrate Molavi teaching of using requests including logical quantum circuit, physical qubit connectivity information and SAT solver to provide a quantum circuit mapping on Itoko 1 computing device.
The motivation would have been to improve quantum computing mapping with cost reduction by using MAXSAT and by reduce the amount of added noise, which may render a quantum computation useless (Molavi, abstract).
The modified model does not explicitly teach a number of SWAP gates to be used in the quantum circuit mapping, a layout-transition-based order encoding scheme; responsive to receiving results of the SAT solver, generate the quantum circuit mapping, wherein the quantum circuit mapping is generated based, at least in part, on the number of SWAP gates indicated in the request.
While Zhu teaches a number of SWAP gates to be used in the quantum circuit mapping; (Page 361, INPUT A quantum circuit , a coupling graph G, and a number k. OUTPUT Yes, if can be transformed to satisfy G’s NN constraint using at most k SWAP gates; no, otherwise).
responsive to receiving results of the SAT solver, generate the quantum circuit mapping, wherein the quantum circuit mapping is generated based, at least in part, on the number of SWAP gates indicated in the request; and (page 361, INPUT A quantum circuit , a coupling graph G, and a number k. OUTPUT Yes, if can be transformed to satisfy G’s NN constraint using at most k SWAP gates; no, otherwise.
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Zhu is considered to be analogous to the claimed invention, since it teaches quantum circuits mapping. Therefore it would be obvious for a person of ordinary skill in the art before the effective filing date to integrate Zhu teaching of setting a number of SWAP gate to be used and generate a quantum circuit mapping based on the number of SWAP as it is shown above on Fig. 4, into the modified model.
The motivation would have been to find a mapping from logical qubits in the quantum circuit to the physical qubits in the quantum computer in order to minimize non-NN interactions and to find the best way to move logical qubits, i.e., reduces the number of SWAP gates as less as possible (Zhu, section 2.2).
While the modified model does not explicitly teach a layout-transition-based order encoding scheme.
While Tan teaches a layout-transition-based order encoding scheme (Section 4 and 4.2, “approach and encoding variable”, In this section, we discuss preprocessing, the objectives, the variable encoding scheme, and the constraints of our proposed optimal layout synthesizer for quantum computing (OLSQ). Then, we introduce some variations to the notion of time to make the synthesizer transition-based (TB-OLSQ), which greatly increases efficiency with little or no performance degradation).
Tan is considered to be analogous to the claimed invention, since it teaches Optimal Layout Synthesis for Quantum Computing. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filling date to integrate Tan’s teaching of transitional based model in to the modified model to generate a quantum circuit mapping.
The motivation would have been to generate optimal layout synthesis, which transforms quantum programs to meet these hardware limitations by reduces time and space complexity exponentially compared to some leading optimal approaches (Tan, abstract).
As of claim 3, the modified model teaches all the limitations of claim 1, and Molavi also teaches encode one or more alternative quantum circuit mappings as one or more alternative SAT solver problems, wherein to encode the one or more alternative quantum circuit mappings, the one or more computing devices of the service provider network configured to implement the quantum compilation service are further configured to generate one or more alternative CNF equations that represent the respective one or more alternative quantum circuit mappings based, at least in part, on: (section ii, “Our MAXSAT approach” Roughly speaking, given a circuit and a connectivity graph, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate. Specifically, the crucial bit of our encoding is that we model all possible SWAP operations as Boolean variables; for example, swap p0,p1 would have a corresponding Boolean variable in every location it could be placed in the circuit. Then, if a Boolean variable is assigned to true in the solution to the MAXSAT problem, the corresponding SWAP is inserted into the circuit; otherwise, it is not… section IV. “OPTIMAL QMR VIA MAXSAT” our encoding will define a set of hard constraints and a set of soft constraints, (Hard, Soft), constituting a MAXSAT instance. A solution to this MAXSAT instance yields an optimal solution to the QMR problem, specifically, (1) an optimal map sequence, M1,...,M|C| , and (2) a sequence of SWAPs before every two-qubit gate to perform routing. The soft constraints aim to minimize the number of inserted SWAPs).
the logical quantum circuit information; (section III. “QUBIT MAPPING AND ROUTING” Quantum circuit. We will use C to denote a quantum circuit over logical qubits, Logic = {q0,q1,...}.).
the physical qubit connectivity information; and (figure 3 (b) Physical qubit connectivity graph
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provide the one or more encoded alternative SAT solver problems to the SAT solver in parallel with the encoded SAT solver problem (section IX. “DISCUSSION”, We see two avenues for scaling our MAXSAT approach to stay ahead of the growth in the number of qubits: First, we can employ parallel SAT-solving strategies. All of our experiments used a single-threaded solver).
Zhu also teaches one or more alternative quantities of SWAP gates indicated in the request or in one or more additional requests; and (page 261
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Claims 8 and 20 are also in the same scope as that of claim 3, therefore claims 8 and 20 are rejected under the same rational as of claim 3.
As of claim 6, Itoko 1 teaches one or more computing devices of the service provider network configured to implement a quantum compilation service configured to map a logical quantum circuit for execution using a given one of the quantum hardware devices, wherein to implement the quantum compilation service, the one or more computing devices are further configured to:(Col. 5-line 16-22, A “quantum operation” may be represented by a function block. For example, a function block may represent a quantum gate or a combination of quantum gates in a GUI for programming quantum computing algorithms. In this application, a “quantum operation” may be abbreviated to an “operation” if it is explicitly to be applied to one or more qubits… col. 6 line 3 -10 Apparatus 140 maps a plurality of operations in an operation sequence to be executed on quantum computing device 110. For example, apparatus 140 assigns logical qubits to physical qubits 120a to 120d. Apparatus 140 also inserts one or more swap operations for swapping a pair of logical qubits stored in a pair of physical qubits 120 in order to move a pair of logical qubits to be used by an operation to physical qubits 120 that are coupled by a coupling 130).
Itoko 1 does not explicitly teach receive a request to generate a quantum circuit mapping, wherein the request comprises: logical quantum circuit information corresponding to the logical quantum circuit; physical qubit connectivity information corresponding to the quantum hardware device; and a number of SWAP gates to be used in the quantum circuit mapping; encode the quantum circuit mapping as a SAT solver problem, wherein to encode the quantum circuit mapping, the one or more computing devices are further configured to generate a Conjunctive Normal Form (CNF) equation that represents the quantum circuit mapping based, at least in part, on: a layout-transition-based order encoding scheme; and the request; provide the encoded SAT solver problem to a SAT solver; receive results of the SAT solver; determine a mapping recommendation based, at least in part, on the results of the SAT solver; and provide the mapping recommendation.
While Molavi teaches receive a request to generate a quantum circuit mapping, wherein the request comprises: (section : “Our MAXSAT approach”, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate).
logical quantum circuit information corresponding to the logical quantum circuit;( Fig. 3: Running example and overview
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physical qubit connectivity information corresponding to the given quantum hardware device; and (Fig. 3: Running example and overview
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encode the quantum circuit mapping as a SAT solver problem, wherein to encode the quantum circuit mapping, the one or more computing devices are further configured to generate a Conjunctive Normal Form (CNF) equation that represents the quantum circuit mapping based, at least in part, on: the request; and ( section: “Sketching-like encoding” We encode every possible SWAP as a Boolean variable, where assigning the variable to true denotes performing a SWAP of a specific pair of adjacent physical qubits. We therefore ask the MAXSAT solver to minimize the number of SWAP variables set to true...“Our MAXSAT approach” , Roughly speaking, given a circuit and a connectivity graph, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate)
provide the encoded SAT solver problem to a SAT solver; and (section iV , “Soft Constraints and Optimality” fig. 5 fully formalizes all of the hard and soft constraints that our encoding generates. So, if we are given a circuit C and a connectivity graph G, we can use our encoding to generate a MAXSAT instance (Hard, Soft) whose solution results in an optimal QMR solution).
receive results of the SAT solver; (section; “Soft Constraints and Optimality”, if we are given a circuit C and a connectivity graph G, we can use our encoding to generate a MAXSAT instance (Hard,Soft) whose solution results in an optimal QMR solution. Given a model I |=(Hard,Soft), we can extract a valid map sequence from the assignments of the Boolean variables of the form map(q,p,k) by setting Mk(q)= p exactly when I assigns map(q,p,k) to true).
determine a mapping recommendation based, at least in part, on the results of the SAT solver; and provide the mapping recommendation (section III. “QUBIT MAPPING AND ROUTING” , Optimal qubit mapping and routing (QMR). An optimal solution to the QMR problem is a map sequence M1,...,M|C| that minimizes the cost of routing qubits between adjacent maps in the sequence; formally: min |C|−1 ∑ i=1 cost(Mi,Mi+1) where cost(M,M) is the smallest number of SWAP operations needed to go from M to M. Example 2: Continuing our running example: Only one swap operation happens, right before the fourth gate, making the total cost 1. So, M3 = M2 = M1. Before the fourth gate, the physical qubits p2 and p3 are swapped, resulting in the map M4 that is the same as M1 except that M4(q2)= p3 and M4(q3) = p2… section V. “A LOCALLY OPTIMAL RELAXATION” , Example 10: Consider again the map on the bottom right in Fig. 6. Let us suppose that we want to backtrack and find a different mapping from this one for the first slice. In order to guarantee that we do not return the same mapping again when re-invoking the MAXSAT solver, we add the following hard constraint:
¬map(q0,p1,2)∧map(q1,p0,2)∧map(q2,p2,2)
This constraint is exactly the negation of the encoding of the mapping that we wish to exclude).
Itoko 1 and Molavi are considered to be analogous to the claimed invention since they focus on quantum circuit qubit mapping. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filing date to integrate Molavi teaching of using requests including logical quantum circuit, physical qubit connectivity information and SAT solver to provide a quantum circuit mapping on Itoko 1 computing device.
The motivation would have been to improve quantum computing mapping with cost reduction by using MAXSAT and by reduce the amount of added noise, which may render a quantum computation useless (Molavi, abstract).
The modified model does not explicitly teach a number of SWAP gates to be used in the quantum circuit mapping, a layout-transition-based order encoding scheme;
While Zhu teaches a number of SWAP gates to be used in the quantum circuit mapping; (Page 361, INPUT A quantum circuit , a coupling graph G, and a number k. OUTPUT Yes, if can be transformed to satisfy G’s NN constraint using at most k SWAP gates; no, otherwise).
Zhu is considered to be analogous to the claimed invention, since it teaches quantum circuits mapping. Therefore it would be obvious for a person of ordinary skill in the art before the effective filing date to integrate Zhu teaching of setting a number of SWAP gate to be used and generate a quantum circuit mapping based on the number of SWAP into the modified model.
The motivation would have been to find a mapping from logical qubits in the quantum circuit to the physical qubits in the quantum computer in order to minimize non-NN interactions and to find the best way to move logical qubits, i.e., reduces the number of SWAP gates as less as possible (Zhu, section 2.2).
While the modified model does not explicitly teach a layout-transition-based order encoding scheme.
While Tan teaches a layout-transition-based order encoding scheme (Section 4 and 4.2, “approach and encoding variable”, In this section, we discuss preprocessing, the objectives, the variable encoding scheme, and the constraints of our proposed optimal layout synthesizer for quantum computing (OLSQ). Then, we introduce some variations to the notion of time to make the synthesizer transition-based (TB-OLSQ), which greatly increases efficiency with little or no performance degradation).
Tan is considered to be analogous to the claimed invention, since it teaches Optimal Layout Synthesis for Quantum Computing. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filling date to integrate Tan’s teaching of transitional based model in to the modified model to generate a quantum circuit mapping.
The motivation would have been to generate optimal layout synthesis, which transforms quantum programs to meet these hardware limitations by reduces time and space complexity exponentially compared to some leading optimal approaches (Tan, abstract).
Claim 16 is in the same scope as that of claim 6, therefore claim 16 is rejected under the same rational as of claim 6.
As of claim 7, the modified model teaches all the limitations of claim 6, and Molavi also teaches wherein the one or more computing devices are further configured to coordinate execution of the encoded SAT solver problem on one or more computing devices configured to perform SAT solving (section II. “AN ILLUSTRATIVE EXAMPLE” QMR is an optimization problem, we use a MAXSAT solver, which builds upon a SAT solver to find an optimal satisfying assignment… section IV. “OPTIMAL QMR VIA MAXSAT”, B. MaxSAT Encoding of Optimal QMR
We will now present our MAXSAT encoding for optimally solving the QMR problem. Our encoding uses two sets of Boolean variables: the map variables, which represent the sequence of maps M1,...,M|C| , and the swap variables, which represent where SWAPs are inserted in the circuit).
As of claim 11, the modified model teaches all the limitations of claim 6, and Molavi also teaches wherein the physical qubit connectivity information comprises: a list of physical qubits; and (section III. “QUBIT MAPPING AND ROUTING” Phys={p0,p1,...} is the set of physical qubits
a list of edges that connect respective ones of the physical qubits (section III. “QUBIT MAPPING AND ROUTING”, Edges ⊆ Phys×Phys is the set of edges connecting physical qubits).
As of claim 13 the modified model teaches all the limitations of claim 6, and Molavi also teaches wherein: the request further comprises time-out information, wherein the time-out information comprises instructions to terminate the request provided to the SAT solver if a solution is not determined via the SAT solver within a given amount of time ( section II. “Our MAXSAT approach”, Therefore, a benefit of using a MAXSAT solver is that, even for large circuits where the solver cannot efficiently find an optimal solution, the solver may be terminated early to extract the best solution found so far (if it has progressed past the first loop iteration).
As of claim 14 the modified model teaches all the limitations of claim 6, and Molavi also teaches wherein to determine the mapping recommendation, the one or more computing devices are further configured to: determine that the results comprise two or more satisfiable solutions; (section IV. “OPTIMAL QMR VIA MAXSAT”, The SAT problem. In the satisfiability problem (SAT), we are given a Boolean formula and our goal is to find an assignment to the variables that makes the formula true—a model of the formula. Example 3: Consider the following formula, where a,b,c are Boolean variables: (¬a∧b)→c This formula is satisfiable because there is a model that makes it true. One such model is: I =[a→false, b → true, c → true]).
generate the quantum circuit mapping, wherein the quantum circuit mapping is generated based, at least in part, on a selected one of the two or more satisfiable solutions ( section II. “AN ILLUSTRATIVE EXAMPLE”, we generate a set of Boolean formulas (constraints) whose optimal satisfying assignment corresponds to an initial mapping of logical to physical qubits and a set of SWAP operations to be inserted before each two-qubit gate … if a Boolean variable is assigned to true in the solution to the MAXSAT problem, the corresponding SWAP is inserted into the circuit; otherwise, it is not).
As of claim 15, the modified model teaches all the limitations of claim 6, and Tan also teaches one or more gate scheduling conditions, corresponding to implementations of respective gates of the logical quantum circuit information with respect to given SWAP gates of the number of SWAP gates, for the quantum circuit mapping, wherein the one or more gate scheduling conditions are represented by respective Boolean variables; ( Section 4.2 encoding variable
Mapping 𝜋𝑡 𝑞: at time 𝑡, logical qubit 𝑞 is mapped to the physical qubit 𝜋𝑡 𝑞, 𝜋𝑡 𝑞 ∈ 𝑃.
Time coordinates 𝑡𝑙: gate 𝑔𝑙 is being executed at time 𝑡𝑙, 0 ≤𝑡𝑙 ≤𝑇 −1.
• Space coordinates 𝑥𝑙: if 𝑔𝑙 ∈ 𝐺1, then logical qubit 𝑔𝑙.𝑞 is mapped to physical qubit 𝑥𝑙, 𝑥𝑙 ∈ 𝑃; if 𝑔𝑙 ∈ 𝐺2, then the two physical qubits, to which 𝑔𝑙.𝑞 and 𝑔𝑙.𝑞′ are mapped, are connected by edge 𝑥𝑙, 𝑥𝑙 ∈ 𝐸. • Use of SWAP gate𝜎𝑡 𝑘 : if 𝜎𝑡 𝑘 = 1, then there is a SWAP gate on edge 𝑒𝑘 and the last time slot it takes is 𝑡 (as SWAP gates may take multiple time slots); otherwise, 𝜎𝑡 𝑘 = 0).
Molavi also teaches one or more qubit mapping conditions, corresponding to mappings of given logical qubits of the logical quantum circuit information to one or more physical qubits of the physical qubit connectivity information, respectively, for the quantum circuit mapping, wherein the one or more qubit mapping conditions are represented by additional respective Boolean variables; and (section IV. “OPTIMAL QMR VIA MAXSAT”, 1, Mapping Constraints: We start by describing the constraints that specify that our map sequence is valid. We will use the Boolean variable map (q, p, k) to denote that, for a logical qubit q ∈ Logic and a physical qubit p ∈ Phys, q maps to p right before the kth gate of the circuit. In other words, if map(q,p,k) is assigned true, then this means that Mk(q) = p).
one or more SWAP selection operand conditions, corresponding to implementations of respective SWAP gates of the number of SWAP gates, for the quantum circuit mapping, wherein the one or more SWAP operand selection conditions are represented by other respective Boolean variables (section IV. “OPTIMAL QMR VIA MAXSAT”, Hard B: Executing two-qubit gates. Specifically, for every inserted SWAP with unknown parameters, we create a number of Boolean variables denoting every possible instantiation of the parameters. Formally, the Boolean variable swap(p,p,k,i) denotes that the ith SWAP inserted before gate k is over physical qubits p and p. (If both parameters are set to the same qubit, then the SWAP is considered a no-op).
Claim 19 is in the same scope as that of claim 15, therefore claim 19 is rejected under the same rational as of claim 15.
Claims 2, 5 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020. Further in the view of Kasprowicz; Christopher (US 11704715 B2)
As of claim 2, the modified model teaches all the limitation of claim 1, and Molavi also teaches the one or more computing devices are further configured to implement the SAT solver; ( section ii, “Our MAXSAT approach”, A MAXSAT solver is typically implemented as a loop that queries a SAT solver for better and better solutions, until it arrives at an optimal one).
the one or more computing devices of the service provider network configured to implement the quantum compilation service are further configured to provide the encoded SAT solver problem to the SAT solver via the optimization problem service (section . IV. “OPTIMAL QMR VIA MAXSAT”, MAXSAT is the optimization analogue of the classical Boolean satisfiability problem, SAT. … We will now present our MAXSAT encoding for optimally solving the QMR problem).
The modified model does not explicitly teach one or more computing devices of the service provider network configured to implement an optimization problem service, wherein: to implement the optimization problem service.
While Kasprowicz teaches one or more computing devices of the service provider network configured to implement an optimization problem service, wherein: to implement the optimization problem service (Col 29, line 50-53, In some embodiments, a quantum computing service may further include hardware specific optimizers that optimize the translated quantum circuits based on characteristics of a particular type of quantum computing hardware)
Kasprowicz is considered to be analogous to the claimed invention since it teaches quantum computing service. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filling date to integrate Kasprowicz’s teaching of using optimization problem service into the modified model to optimize quantum circuit mapping.
The motivation would have been to perform one or more optimizations to reduce an overall number of quantum operators in a translated quantum circuit that is a translated version of the received quantum computing object (Kasprowicz, Col. 6 line 4 -8).
As of claim 5, the modified model teaches all the limitation of claim 1, and Itoko 1 also teaches provide the inputs of the request to the quantum compilation service (Col 23 line 56 -60, The computer 1200 also includes input/output units such as a communication interface 1222, a hard disk drive 1224, a DVD-ROM drive 1226 and an IC card drive, which are connected to the host controller 1210 via an input/output controller 1220).
The modified model does not explicitly teach wherein the service provider network is configured to: provide an interface to accept inputs of the request.
While Kasprowicz teaches wherein the service provider network is configured to: provide an interface to accept inputs of the request; (col 27 line 64-66, At 828, the quantum computing service receives user input defining a particular quantum circuit via the user-directed quantum circuit definition interface).
Kasprowicz is considered to be analogous to the claimed invention since it teaches quantum computing service. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filling date to integrate Kasprowicz’s teaching of provide an interface to accept inputs of the request into the modified model to generate quantum circuit mapping.
The motivation would have been to perform one or more optimizations to reduce an overall number of quantum operators in a translated quantum circuit that is a translated version of the received quantum computing object (Kasprowicz, Col. 6 line 4 -8).
As of claim 12 the modified model teaches all the limitations of claim 6, and Molavi, also teaches the physical qubit connectivity information comprises an indication of the quantum hardware provider ( Figure 3.
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Section VII. “IMPLEMENTATION AND EVALUATION”, And Except in the evaluation of Q4, the connectivity graph used is the IBM Q20 Tokyo architecture with 20 qubits, depicted in Fig. 9b. T).
The modified model does not explicitly teach wherein: the quantum hardware device is a quantum hardware device of a quantum hardware provider; the quantum hardware provider is accessible to the quantum compilation service via the service provider network.
While Kasprowicz teaches wherein: the quantum hardware device is a quantum hardware device of a quantum hardware provider;(Abstract A quantum computing service includes connections to multiple quantum hardware providers that are configured to execute quantum circuits using quantum computers based on different quantum technologies).
the quantum hardware provider is accessible to the quantum compilation service via the service provider network; (Col 3 line 3-8, Various embodiments of methods, systems, and computer-readable media for cloud-based access to quantum computing resources are described. Using the techniques described herein, quantum computing resources that are hosted “in the cloud” can be accessed by client computing devices).
Kasprowicz is considered to be analogous to the claimed invention since it teaches quantum computing service. Therefore it would be obvious for a person of ordinary skill in the art, before the effective filling date to integrate Kasprowicz’s teaching of using quantum hardware device into the modified model to quantum circuit mapping.
The motivation would have been to perform one or more optimizations to reduce an overall number of quantum operators in a translated quantum circuit that is a translated version of the received quantum computing object (Kasprowicz, Col. 6 line 4 -8).
Claims 4 and 9 -10 are rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Itoko 2, Toshinari, and Takashi Imamichi. "Scheduling of operations in quantum compiler." 2020 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2020.
As of claim 4, the modified model teaches all the limitations of claim 1, and Molavi also teaches the logical quantum circuit information comprises
a logical quantum circuit; and (Fig. 3: Running example and overview
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).
The modified model of Itoko 1– Molavi- Zhu- Tan does not explicitly teach the one or more computing devices of the service provider network configured to implement the quantum compilation service are further configured to determine, based, at least in part, on the logical quantum circuit, a list of logical qubits and a list of gates to be performed on respective ones of the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates, performed on respective logical qubits of the list of logical qubits, on other respective gates, performed on the respective logical qubits.
While Itoko 2, teaches the one or more computing devices of the service provider network configured to implement the quantum compilation service are further configured to determine, based, at least in part, on the logical quantum circuit, a list of logical qubits and a list of gates to be performed on respective ones of the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates, performed on respective logical qubits of the list of logical qubits, on other respective gates, performed on the respective logical qubits (section III. PROBLEM A. “Quantum Operation Scheduling” We define quantum operation scheduling as the problem of finding a schedule for a given quantum circuit… Each of the quantum operations has acting qubits and its own processing time. A quantum circuit is given as a sequence: e.g., [H(1);CX(1; 2);X(2)]. Here, H(1) denotes a Hadamard gate acting on qubit 1, CX(1; 2) denotes a Controlled-NOT (or CNOT) gate acting on control qubit 1 and target qubit 2, and X(2) denotes a NOT gate acting on qubit 2…. Fig. 2. We call the graph representing the dependencies among gates in a circuit the dependency graph. In contrast, if we consider that CX(1; 2) and X(2) commute, we have a different dependency graph: H(1) must precede CX(1; 2), but there is no restriction on X(2), so we can obtain a shorter schedule (makespan = 2), as shown in Fig. 3).
Itoko 2 is considered to be analogous to the claimed invention since it teaches scheduling quantum operations. Therefore it would be obvious for a person of ordinary skill in the art to in integrate Itoko 2’s teaching of gates scheduling based in terms of one or more dependencies into the modified model which comprises a list of gates, a list of logical qubits and logical quantum circuit to generate a quantum circuit mapping.
The motivation would have been to execute a quantum operations in a shortest total execution time for the problem of scheduling quantum operations in a given circuit. It also demonstrated that quantum operations scheduling can be interpreted as a special type of job-shop problem where we consider the commutation between quantum operations to make room for optimization ( Itoko 2 , conclusion).
Claim 10 is in the same scope as that of claim 4, therefore claim 10 is rejected under the same rational as of claim 4.
As of claim 9, the modified model teaches all the limitations of claim 6 and Molavi also teaches wherein the logical quantum circuit information comprises:
a list of logical qubits; and (section III. “QUBIT MAPPING AND ROUTING”, Quantum circuit. We will use C to denote a quantum circuit over logical qubits, Logic = {q0,q1,...}. Specifically, a circuit C is a sequence of gate applications, where each gate is an operation that applies to one or two logical qubits).
The modified model does not explicitly teach a list of gates to be performed on respective ones of the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates performed on respective logical qubits of the list of logical qubits on other respective gates performed on the respective logical qubits.
While Itoko 1 teaches a list of gates to be performed on respective ones of the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates performed on respective logical qubits of the list of logical qubits on other respective gates performed on the respective logical qubits.( section III. “PROBLEM A “. Quantum Operation Scheduling, We define quantum operation scheduling as the problem of finding a schedule for a given quantum circuit… Each of the quantum operations has acting qubits and its own processing time. A quantum circuit is given as a sequence: e.g., [H(1);CX(1; 2);X(2)]. Here, H(1) denotes a Hadamard gate acting on qubit 1, CX(1; 2) denotes a Controlled-NOT (or CNOT) gate acting on control qubit 1 and target qubit 2, and X(2) denotes a NOT gate acting on qubit 2…. Fig. 2. We call the graph representing the dependencies among gates in a circuit the dependency graph. In contrast, if we consider that CX(1; 2) and X(2) commute, we have a different dependency graph: H(1) must precede CX(1; 2), but there is no restriction on X(2), so we can obtain a shorter schedule (makespan = 2), as shown in Fig. 3).
Itoko 2 is considered to be analogous to the claimed invention since it teaches scheduling quantum operations. Therefore it would be obvious for a person of ordinary skill in the art to in integrate Itoko 2’s teaching of gates scheduling based in terms of one or more dependencies into the modified model which comprises a list of gates, a list of logical qubits and logical quantum circuit to generate a quantum circuit mapping.
The motivation would have been to execute a quantum operations in a shortest total execution time for the problem of scheduling quantum operations in a given circuit. It also demonstrated that quantum operations scheduling can be interpreted as a special type of job-shop problem where we consider the commutation between quantum operations to make room for optimization ( Itoko 2 , conclusion).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Lin, Wan-Hsuan, et al. "Domain-specific quantum architecture optimization." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12.3 (2022): 624-637.
As of claim 17, the modified model teaches all the limitations of claim 16, and Molavi also teaches wherein: said encoding the quantum circuit mapping further comprises: generating a list of physical qubits based, at least in part, on the physical qubit connectivity information; and (Fig. 3: Running example and overview
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Section II. AN ILLUSTRATIVE EXAMPLE, Fig. 3(b), which illustrates a small device with four physical qubits, p0,..., p3).
generating a list of edges that connect respective ones of the physical qubits based, at least in part, on the physical qubit connectivity information; and (section III. “QUBIT MAPPING AND ROUTING” Edges ⊆ Phys×Phys is the set of edges connecting physical qubits).
The modified model does not explicitly teach the generating the CNF equation is further based, at least in part, on the list of physical qubits and on the list of edges.
While Lin teaches the generating the CNF equation is further based, at least in part, on the list of physical qubits and on the list of edges (Page 6, the qubit mapping must be consistent with the gate mapping. For a gate g ∈ G1 acting on physical qubit v and circuit moment t, we have
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Lin is considered to be analogous to the claimed invention since it teaches quantum computation and optimization. Therefore it would be obvious to try for a person of ordinary skill in the before the effective filing date to generate CNF equation based on the list of physical qubits and on the list of edges using Lin’s teaching of generating the CNF equation using a gate and physical qubit.
The motivation would have been to improve the fidelity of quantum applications by integrates quantum circuit compilation into architecture optimization and by using algorithm to search for the optimal architecture for circuit compilation under hardware-specific constraints (Lin, conclusion).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Itoko 1; Toshinari ( US 11010518 B2) in the view of Molavi, Abtin, et al. "Qubit mapping and routing via maxsat." 2022 55th IEEE/ACM international symposium on Microarchitecture (MICRO). IEEE, 2022 in the view of Zhu, Pengcheng, et al. "The complexity of quantum circuit mapping with fixed parameters." Quantum Information Processing 21.10 (2022): further in the view of Tan, Bochen, and Jason Cong. "Optimal layout synthesis for quantum computing." Proceedings of the 39th International Conference on Computer-Aided Design. 2020 further in the view of Itoko 2, Toshinari, and Takashi Imamichi. "Scheduling of operations in quantum compiler." 2020 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2020 further in the view of Lin, Wan-Hsuan, et al. "Domain-specific quantum architecture optimization." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12.3 (2022): 624-637.
As of claim 18, the modified model teaches all the limitations of claim 16 and Molavi also teaches wherein: said encoding the quantum circuit mapping further comprises: generating a list of logical qubits based, at least in part, on the logical quantum circuit information; and ( Fig. 3: Running example and overview
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Section II. “AN ILLUSTRATIVE EXAMPLE”
Fig. 3(b), which illustrates a small device with four physical qubits, p0,..., p3).
The modified model does not explicitly teach generating a list of gates to be performed on respective ones the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates performed on respective logical qubits of the list of logical qubits on other respective gates performed on the respective logical qubits; and the generating the CNF equation is further based, at least in part, on the list of logical qubits and on the list of gates.
While Itoko 2 teaches generating a list of gates to be performed on respective ones the logical qubits, wherein the list of gates is ordered in terms of one or more dependencies of outcomes of respective gates performed on respective logical qubits of the list of logical qubits on other respective gates performed on the respective logical qubits; and (section III. “PROBLEM A” . Quantum Operation Scheduling, We define quantum operation scheduling as the problem of finding a schedule for a given quantum circuit… Each of the quantum operations has acting qubits and its own processing time. A quantum circuit is given as a sequence: e.g., [H(1);CX(1; 2);X(2)]. Here, H(1) denotes a Hadamard gate acting on qubit 1, CX(1; 2) denotes a Controlled-NOT (or CNOT) gate acting on control qubit 1 and target qubit 2, and X(2) denotes a NOT gate acting on qubit 2…. Fig. 2. We call the graph representing the dependencies among gates in a circuit the dependency graph. In contrast, if we consider that CX(1; 2) and X(2) commute, we have a different dependency graph: H(1) must precede CX(1; 2), but there is no restriction on X(2), so we can obtain a shorter schedule (makespan = 2), as shown in Fig. 3).
Itoko 2 is considered to be analogous to the claimed invention since it teaches scheduling quantum operations. Therefore it would be obvious for a person of ordinary skill in the art to in integrate Itoko 2’s teaching of gates scheduling based in terms of one or more dependencies into the modified model which comprises a list of gates, a list of logical qubits and logical quantum circuit to generate a quantum circuit mapping.
The motivation would have been to execute a quantum operations in a shortest total execution time for the problem of scheduling quantum operations in a given circuit. It also demonstrated that quantum operations scheduling can be interpreted as a special type of job-shop problem where we consider the commutation between quantum operations to make room for optimization ( Itoko 2 , conclusion).
The modified model of Itoko 1-Molavi- Zhu- Tan-Itoko 2, does not explicitly teach the generating the CNF equation is further based, at least in part, on the list of logical qubits and on the list of gates.
While Lin teaches the generating the CNF equation is further based, at least in part, on the list of logical qubits and on the list of gates (Page 6 , the qubit mapping must be consistent with the gate mapping. For a gate g ∈ G1 acting on physical qubit v and circuit moment t, we have:
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Lin is considered to be analogous to the claimed invention since it teaches quantum computation and optimization. Therefore it would be obvious to try for a person of ordinary skill in the before the effective filing date to generate CNF equation based on the list of logical qubits and on the list of gates using Lin’s teaching of generating the CNF equation using a gate and physical qubit, and gate and edge.
The motivation would have been to improve the fidelity of quantum applications by integrates quantum circuit compilation into architecture optimization and by using algorithm to search for the optimal architecture for circuit compilation under hardware-specific constraints (Lin, conclusion).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Richardson; David R. (US 10592216 B1, Date Published 2020-03-17) is similar to the claimed invention since it also teaches development of environment for programming quantum resources by receiving information associated with a quantum algorithm.
Richardson; David R. (US 10817337 B1, Date Published 2020-10-27) is similar to the claimed invention since it also teaches cloud-based access to quantum computing resource and a quantum computing resource is accessible to the computing instance and is selected based at least in part on input from a user associated with the request.
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/ABRHAM ALEHEGN TAMIRU/Examiner, Art Unit 2188
/RYAN F PITARO/Supervisory Patent Examiner, Art Unit 2188
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