DETAILED ACTION
This office action is responsive to amendment filed on April 6, 2026 in this application Jo et al., U.S. Patent Application No. 18/194,082, (Filed March 31, 2023) (“Jo”). Claims 1 – 20 were pending. Claims 1 – 20 are amended. Claims 1 – 20 are pending.
Applicants' arguments have been carefully and respectfully considered and found not persuasive. Accordingly, this action has been made FINAL.
Response to Arguments
1. With respect to Applicant’s argument on pgs. 9 – 11 of the Applicant’s Remarks (“Remarks”) stating that the claim amendments overcome the 101 rejections, examiner respectfully agrees. See infra § Claim Rejections - 35 USC §101.
2. With respect to Applicant’s argument on pgs. 11 – 15 of the Remarks stating that the claim amendments overcome the 112 rejections, examiner respectfully agrees in part, however in light of Applicant’s amendments please see the new 112 rejections infra.
3. With respect to Applicant’s argument on pgs. 15 - 18 of the Remarks stating that prior art reference Pan fails to teach aspects of the newly amended limitation, examiner respectfully disagrees, however, in light of the amendments and in the interests of compact prosecution prior art reference Dickenson is added which, in combination with Pan, teaches these limitations. See infra § Claim Rejections - 35 USC §103 § Claims 1 & 9.
Dickenson teaches intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046. Therefore, the current prior art teaches the argued aspects of the newly amended limitation.
4. With respect to Applicant’s argument on pgs. 18 - 19 of the Remarks stating that prior art references fail to teach the delay/pause being a random amount, examiner respectfully neither agrees nor disagrees, however, in light of the amendments and in the interests of compact prosecution prior art reference Masser is added. See infra § Claim Rejections - 35 USC §103 § Claim 1. Masser teaches a delay of a random amount may be added to a function under test to identify timing related issues. Masser at Abstract; id. at ¶ 0037 & claim 2. Therefore, the current prior art teaches the delay/pause being a random amount.
Claim Rejections - 35 USC § 101
In light of Applicant’s amendments, the rejections made under 35 USC 101 are withdrawn.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 17 - 20, are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 17 – 20 are rejected under 35 U.S.C. 112(a) because the claim recites “correlation score.” The specification does not appear to support a correlation score since the specification does not mention such a score nor does the word correlation or any of its roots or derivative appear in the specification. While the specification repeatedly mentions a causality score the claimed correlation score appears to be distinguished from the causality score in that when choosing to claim a score the term causality appears to have been intentionally not selected to describe the score.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 1 is rejected as being indefinite. Claim 1 recites “a predicted arrival time” it is unclear if “a predicted arrival time” is a quantity of time that it will take for either a target instrumentation point to arrive at a location or for something to arrive at the point, or if “arrival time” means a particular time of day for arrival by the point or arrival at the point. Claims 2 – 4, 9, and 14 – 17 (17 for predicted visit) are rejected for similar reasoning. Claims 2 – 13 are rejected as depending on claim 1. Claims 15 and 16 are rejected as depending on claim 14. Claims 18 – 20 are rejected as depending on claim 14.
Claim 1 is rejected as being indefinite. It is unclear if the duration of the pausing is for the random amount of time or if “based on” means some function is applied to the random amount of time such as a modulo 2 (i.e. randomly calculating) which would have the effect of randomly selecting between one pause or another. Claim 14 is rejected for similar reasoning. Claims 2 – 13 are rejected as depending on claim 1. Claims 15 and 16 are rejected as depending on claim 14.
Claim 1 is rejected as being indefinite. Claim 1 recites “measure of a causal relationship.” It is unclear if the measure is intended to be “of” the claimed “relationship” or is a measure related to or based on the relationship. The claim further recites that the measure “corresponds to a degree to which execution of the source task affects execution of the target task.” However, this further introduces uncertainty as to whether the measure is “of” the “relationship,” “corresponds to a degree,” or is of the “degree” itself. The specification provides a definition for the claim term “causal relationship” stating “A causal relationship is one in which a first event in a first task is required to cause a second event in a second task”. Jo at ¶ 0049. This represents a binary dependency relationship where two tasks are either causal or not. It is unclear how a “measure” can be taken “of” such a binary relationship. The claim affirmatively recites that the causal relationship exists by stating “of a causal relationship between the source instrumentation point and the target instrumentation point.” It is therefore unclear if the measure is intended to be a measurement “of” the claimed “relationship” or is a measure of some other metric that is related to or based on the relationship but is not “of” the relationship itself.
Claims 7, 8 (including for “degree of a causal relationship”), 13, and 14 (for “determining causality information of a causality relationship…causality information indicates how strongly”) are rejected for similar reasoning. Claims 2 – 13 are rejected as depending on claim 1. Claims 15 and 16 are rejected as depending on claim 14.
Claim 1 is rejected as being indefinite. Claim 1 recites “determine a measure.” It is unclear if the measure is intended to be a numerical quantity, a quality or strength, or a purpose or goal of the causal relationship. While claims may be broadly claimed, it is unclear in this case the functional nature of how the claimed “measure” relates to the determination step and the causal relationship element.
Claims 7, 8, and 13, are rejected for similar reasoning. Claims 2 – 13 are rejected as depending on claim 1.
Claim 1 is rejected as being indefinite. Claim 1 recites a measure of the causal relationship “corresponds to a degree to which execution of the source task affects execution of the target task.” It is unclear how the recited measure corresponds to the degree since in one aspect a measure and a degree are synonyms. Since both terms are being used in the claim it is suggested that the meanings are intended to be different but it is unclear as to how that difference is to be understood.
Claims 2 – 13 are rejected as depending on claim 1.
Claim 2 is rejected as being indefinite. Claim 2 recites “determine predicted arrival times of instrumentation points to be executed in the source task” (emphasis added). It is unclear for which instrumentation points predicted arrival times are determined, those the instrumented code expects to be executed, or those which are actually executed. The limitation “to be executed” is not merely broad but rather it is unclear whether it means intended to be executed based on the instrumented code or which are actually to be executed.
Claim 15 is rejected for similar reasoning.
Claim 2 is rejected as being indefinite. Claim 2 recites “determine predicted arrival times.” It is unclear if the determination is of preexisting predicted arrival times or if the determination is the act of predicting the existence/amount of the times of arrival of instrumentation points.
Claim 15 is rejected for similar reasoning.
Claim 3 is rejected as being indefinite. Claim 3 recites train a model to predict “based on a mismatch.” It is unclear if it is the training of the model or the model’s prediction which are “based on” the mismatch.
Claim 9 is rejected for similar reasoning. Claims 10 and 11 are rejected as depending on claim 9.
Claim 8 is rejected as being indefinite. Claim 8 includes various recitations of “probability”. It is unclear if the recited probability is intended to mean “likelihood” or is intended to mean a percentage or ratio.
Claim 10 is rejected as being indefinite. Claim 10 recites “collect the time information for each of the plurality of instrumentation points identified based on pieces of calling context information.” It is unclear if the time information is collected based on the pieces of calling context information or if the plurality of instrumentation points are identified based on calling context information where the time information is collected for those identified instrumentation points, i.e. are the pieces of calling context used to identify the instrumentation points or to collect time information.
Claim 14 is rejected as being indefinite. It is unclear whether the application is actually executed since the executing limitation are conditioned on “while” which under the broadest reasonable interpretation can mean that the limitations would not be performed while the application is not executing. This also would make the determining limitation indefinite since the captured arrival time and predicted arrival time would not have been determined/captured. Claims 15 & 16 are rejected as depending on claim 14.
Claim 14 is rejected as being indefinite. It is unclear if “the source task and target task” refer to the source and target tasks introduced in lines 3 – 4 or in line 5. Claims 15 & 16 are rejected for similar reasons and as depending on claim 14.
Claim 14 is rejected as being indefinite. Claim 14 recites the term “strongly” which is a relative term which renders the claim indefinite. The term " strongly" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Claims 15 & 16 are rejected as depending on claim 14.
Claim 14 is rejected as being indefinite. There is a lack of antecedent basis for “the target instrumentation point” which has not previously been introduced in the claim or in a claim from which it depends. Claims 15 & 16 are rejected as depending on claim 14.
Claim 16 is rejected as being indefinite. There is a lack of antecedent basis for “the instrumentation points determined to have a mismatch” which has not previously been introduced in the claim or in a claim from which it depends.
Claim 17 is rejected as being indefinite. Claim 17 recites “the execution units including a source execution unit…the execution units further including a target execution unit.” It is unclear if each execution unit comprises both a source and target unit or if at least one execution unit IS a source execution unit and at least one execution unit IS a target execution unit.
Claims 18 – 20 are rejected as depending on claim 17.
Claim 20 is rejected as being indefinite. The term “related” in claim 20 is a relative term which renders the claim indefinite. The term " related " is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claim Rejections 35 U.S.C. §103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 2, 4 – 10, 13 – 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Pan et al., United States Patent Application Publication No. 2009/0320021 (Published December 24, 2009 filed June 19, 2008) (“Pan”) in view of Dickenson, United States Patent Application Publication No. 2013/0332913 (Published December 12, 2013, filed June 11, 2012) (“Dickenson”) and Masser et al., United States Patent Application Publication No. 2013/0091383 (Published April 11, 2013, filed October 5, 2011) (“Masser”).
Claims 1 and 14
With respect to claims 1 and 14, Pan teaches the invention as claimed including an electronic device comprising:
one or more processors; a memory storing instructions configured to cause the one or more processors to: install instrumentation points in tasks of an application, the instrumentation points including a source instrumentation point installed in a source task and a target instrumentation point installed in a target task, wherein the source task and the target task are configured to execute in parallel on the one or more processors, and wherein each task comprises a respective sequence of instructions executable by the one or more processors, execute the tasks of the application in parallel, the executing including executing source instrumentation code associated with the source instrumentation point and target instrumentation code associated with target instrumentation point, … and wherein the execution of the target instrumentation code comprises capturing an arrival time of execution arriving at the target instrumentation point, …between the source instrumentation point and the target instrumentation point …generated by the source instrumentation point. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution).}
However, Pan doesn’t explicitly teach the limitation:
wherein the execution of the source instrumentation code comprises a pause that pauses the source task for a delay amount… determine a predicted arrival time of the target instrumentation point, and determine a measure of a causal relationship …based on observation of a delay in the target instrumentation point based on the captured arrival time and the predicted arrival time, wherein the measure of the causal relationship corresponds to a degree to which execution of the source task affects execution of the target task. {Dickenson does teach this limitation. Dickenson teaches that tracking delays between instrumentation points in parallel threads, as taught in Pan, may include intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to identify performance improvements. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0045.
Pan and Dickenson are analogous art because they are from the “same field of endeavor” and are both from the same “problem-solving area.” Specifically, they are both from the field of application monitoring, and both are trying to solve the problem of how to detect anomalous application performance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine tracking delays between instrumentation points in parallel threads, as taught in Pan, with inserting intentional delays, as taught in Dickenson. Dickenson teaches that delays are of “delta” amount. Id. at ¶ 0036. Therefore, one having ordinary skill in the art would have been motivated to combine tracking delays between instrumentation points in parallel threads, as taught in Pan, with inserting intentional delays, as taught in Dickenson, for the purpose of using a known delay-based instrumentation fault detection method with a system that uses instrumentation delays to detect faults.}
However, Pan and Dickenson doesn’t explicitly teach the limitation:
that is based on a random value, {Masser does teach this limitation. Masser teaches that inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, may include where a delay of a random amount may be added to a function under test to identify timing related issues. Masser at Abstract; id. at ¶ 0037 & claim 2.
Pan, Dickenson, and Masser are analogous art because they are from the “same field of endeavor” and are both from the same “problem-solving area.” Specifically, they are both from the field of application monitoring, and both are trying to solve the problem of how to detect anomalous application performance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, with inserting delays of random amount, as taught in Masser. Dickenson teaches that delays are of “delta” amount. Id. at ¶ 0036. Therefore, one having ordinary skill in the art would have been motivated to combine inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, with inserting delays of random amount, as taught in Masser, for the purpose of using a known delay-based instrumentation fault detection method with a system that uses instrumentation delays to detect faults.}
Claims 2 and 15
With respect to claims 2 and 15, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to: select the source task from among the tasks of the application, select the source instrumentation point based on it being in the selected source task, and {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution).}
determine predicted arrival times of instrumentation points to be executed in the source task based on the duration of the pause. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0045.}
Claim 4
With respect to claims 4, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to select an instrumentation point having a variance between (i) a inter-arrival time of the selected instrumentation point and (ii) a captured inter-arrival time of the selected instrumentation point that exceeds a threshold variance to be the source instrumentation point from among the installed instrumentation points. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays beyond threshold amounts in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
predicted {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 5
With respect to claims 5, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to determine the … of the target instrumentation point, the inter-arrival times comprising amounts of times between consecutive visits to the target instrumentation point. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays beyond threshold amounts in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
delay amount based further on a statistical distribution of inter-arrival times {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 6
With respect to claims 6, Pan, Dickenson, and Masser, teach the invention as claimed including:
for the source instrumentation point from a first delay amount, …of the target instrumentation point, wherein the inter-arrival times are amounts of time between consecutive visits to the target instrumentation point. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
wherein the instructions are further configured to cause the one or more processors to increase the delay amount, wherein the first delay amount is determined based on a distribution of inter-arrival times {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 7
With respect to claims 7, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the measure of the causal relationship corresponds to a relationship between the delay amount generated by the source instrumentation point and an observed delay amount of the target instrumentation point. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 8
With respect to claims 8, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to determine the measure of the causal relationship based on a comparison between a probability that a captured arrival time for the target instrumentation point conforms to an original arrival- time distribution of the target instrumentation point and a probability that the captured arrival time for the target instrumentation point conforms to a delayed-arrival- time distribution of the target instrumentation point, the original arrival-time distribution comprising a distribution of amounts of time between consecutive visits to the target instrumentation point when there are no instrumentation-induced pauses, and the delayed- arrival-time distribution comprising a distribution of amounts of time between consecutive visits to the target instrumentation point when there are instrumentation-induced pauses. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 9
With respect to claims 9, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to: collect time information of the instrumentation points by iteratively executing the application, …other than the source instrumentation point based on an analysis of the collected time information, {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
generate a predicted arrival time of an instrumentation point …and select the target instrumentation point based on a mismatch between a previously-captured arrival time of the target instrumentation point and a previously-determined predicted arrival time of the target instrumentation point. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 10
With respect to claims 10, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to collect the time information for each of the instrumentation points identified based on pieces of calling context information of the respective instrumentation points. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
Claim 13
With respect to claims 13, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the instructions are further configured to cause the one or more processors to: generate a profile configured to control a processor core setting or a processor core allocation, wherein the profile is generated based on the causal relationship measure. {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold); id. at ¶¶ 0141 & 0144 (performance evaluator performed on multi-core CPU).}
Claim 16
With respect to claims 16, Pan, Dickenson, and Masser, teach the invention as claimed including:
wherein the determining of the causality information comprises: collecting time information of the instrumentation points based on iteratively executing the application; generating a predicted arrival time of an instrumentation point that is not the source instrumentation point based on an analysis of the collected time information; {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
and selecting, as the target instrumentation point, one of the instrumentation points determined to have a mismatch between a previously-captured arrival time of the target instrumentation point and a previously-determined predicted arrival time of the instrumentation point. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 18
With respect to claim 18, Pan and Dickenson, teach the invention as claimed including:
the inter-arrival times being times between consecutive visits to the target instrumentation code. {A plurality of delays between dependent threads and threads on which it depends are tracked where the delays may be varied such as being beyond a threshold time. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
However, Pan and Dickenson doesn’t explicitly teach the limitation:
wherein durations of the pauses vary randomly, and wherein the correlation score is determined based further on a statistical distribution of the inter-arrival times of the target instrumentation code, {Masser does teach this limitation. Masser teaches that inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, may include where a delay of a random amount may be added to a function under test to identify timing related issues. Masser at Abstract; id. at ¶ 0037 & claim 2.
Pan, Dickenson, and Masser are analogous art because they are from the “same field of endeavor” and are both from the same “problem-solving area.” Specifically, they are both from the field of application monitoring, and both are trying to solve the problem of how to detect anomalous application performance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, with inserting delays of random amount, as taught in Masser. Dickenson teaches that delays are of “delta” amount. Id. at ¶ 0036. Therefore, one having ordinary skill in the art would have been motivated to combine inserting delays using instrumentation points in parallel threads, as taught in Pan and Dickenson, with inserting delays of random amount, as taught in Masser, for the purpose of using a known delay-based instrumentation fault detection method with a system that uses instrumentation delays to detect faults.}
Claims 17, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Pan et al., United States Patent Application Publication No. 2009/0320021 (Published December 24, 2009 filed June 19, 2008) (“Pan”) in view of Dickenson, United States Patent Application Publication No. 2013/0332913 (Published December 12, 2013, filed June 11, 2012) (“Dickenson”)
Claim 17
With respect to claim 17, Pan teaches the invention as claimed including a method comprising:
inserting instrumentation code into execution units of an application, wherein the execution units are processes or threads some of which are configured to execute in parallel with respect to each other, the execution units including a source execution unit comprising inserted source instrumentation code, the execution units further including a target execution unit comprising inserted target instrumentation code; executing the application, including: executing the source instrumentation code, …executing the target execution unit in parallel with the source instrumentation code, wherein each time the target instrumentation code is executed a visit time is captured for the target execution unit, wherein each visit time corresponds to a time at which the target instrumentation code is executed; {Instrumentation points are added to dependent threads in the form of using event tracing to instrument various thread to thread communications and capture the trace data of the threads to identify timestamps and track delays in performance of a dependent thread due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113, 0132; id. at ¶¶ 0005 & 0119 (synchronous thread execution).}
However, Pan doesn’t explicitly teach the limitation:
wherein each time the source instrumentation code is executed it induces pauses of execution of the source execution unit; … determining predicted visit times of the target instrumentation code; and determining a correlation score indicating an extent to which execution of the source execution unit affects execution of the target execution unit based on the captured visit times and the predicted visit times. {Dickenson does teach this limitation. Dickenson teaches that tracking delays between instrumentation points in parallel threads, as taught in Pan, may include intentionally intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.
Pan and Dickenson are analogous art because they are from the “same field of endeavor” and are both from the same “problem-solving area.” Specifically, they are both from the field of application monitoring, and both are trying to solve the problem of how to detect anomalous application performance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine tracking delays between instrumentation points in parallel threads, as taught in Pan, with inserting intentional delays, as taught in Dickenson. Dickenson teaches that delays are of “delta” amount. Id. at ¶ 0036. Therefore, one having ordinary skill in the art would have been motivated to combine tracking delays between instrumentation points in parallel threads, as taught in Pan, with inserting intentional delays, as taught in Dickenson, for the purpose of using a known delay-based instrumentation fault detection method with a system that uses instrumentation delays to detect faults.}
Claim 19
With respect to claims 19, Pan and Dickenson, teach the invention as claimed including:
wherein a second execution unit includes second target instrumentation code, wherein the executing the application further comprises executing the second target instrumentation code which captures second visit times of the second target instrumentation code, and wherein the method further comprises: based on the second visit times, determining second correlation score indicating an extent to which execution of the second execution unit is affected by execution of the source execution unit. {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Claim 20
With respect to claims 20, Pan and Dickenson, teach the invention as claimed including:
further comprising: determining that the target execution unit is causally related to the source execution unit by comparing the [correlation score] to a threshold; and determining that the second target execution unit is not causally related to the source execution unit by comparing the [correlation score] to a threshold. {Instrumentation points are added to dependent threads to identify and track delays in performance of identified dependent threads due to a delay from a thread on which it depends. Pan at Abstract; id. at ¶¶ 0002, 0053, 0078, 0115 - 0119, 0090, 0113; id. at ¶¶ 0005 & 0119 (synchronous thread execution); id. at ¶¶ 0085, 0090, 0093 (threshold).}
correlation score {Intentionally inserting the instrumentation point delays of an unknown delta amount into the source code on one thread in order to see the impact of the delay on other processes of the program and to use statistical analysis of the delay effects to identify differences between expected and actual performance results. Dickenson at Abstract; id. at ¶¶ 0020 – 0022, 0028, 0032, 0036 - 0038, 0043 – 0046.}
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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//T.H./ September 24, 2026
Examiner, Art Unit 2199
/LEWIS A BULLOCK JR/Supervisory Patent Examiner, Art Unit 2199
