DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This communication is responsive to application filed on 05/09/2023.
Claims 1-20 are presented for examination.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/28/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The non-statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A non-statutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on non-statutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a non-statutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are provisionally rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of co-pending Application No. 18/195,265 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other as seen below.
Instant Application’259
Co-pending Application 18/195,265
1. An electronic circuit simulation post-processing system comprising:
a trained machine learning model that is trained with first simulation results associated with a first electronic circuit and measured results obtained from a physical implementation of the first electronic circuit, the trained machine learning model configured to generate augmented simulation results;
a simulator executing on one or more computer processors that simulate a second electronic circuit that is different than the first electronic circuit and generates second simulation results; and
a post processor including the trained machine learning model that executes on one or more computing devices with computer-executable instructions that, when executed, causes the post processor to augment the second simulation results based on the trained machine learning model.
2. The electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model is further trained with bill of material information about the first electronic circuit.
3. The electronic circuit simulation post-processing system of claim 2 wherein the trained machine learning model further receives bill of material information about the second electronic circuit.
4. The electronic circuit simulation post-processing system of claim 1 wherein the first and second electronic circuits are analog circuits.
5. The electronic circuit simulation post-processing system of claim 1 wherein the computer-executable instructions, when executed, further causes the one or more computing devices to: retrain the trained machine learning model using second measured results obtained from the second electronic circuit; and transmit the retrained machine learning model to the post processor such that the post processor uses the retrained machine learning model generate augmented simulation results associated with a third electronic circuit.
6. The electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model uses a gradient tree boosting, ensemble model.
7. The electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model uses at least one of the group consisting of: linear regression, least absolute shrinkage and selection operator (LASSO), support vector regression (SVR), random forest algorithms, or bayesian ridge regression.
8. The electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model is trained to augment simulation results associated with at least one of the group consisting of: output power, error vector magnitude, current, and an output matching network (OMN).
9. The electronic circuit simulation post-processing system of claim 1 wherein the first simulation results, the measured results, and/or a bill of materials are used to train the trained machine learning model include at least one of the group consisting of: a surface mount component, a power amplifier variable, inductor data, capacitance data, input matching network (IMN) data, IMN inductor data, output matching network (OMN) data, OMN inductor data, OMN capacitor data, resistance data, resistance data, transistor base resistance (RBB), current, voltage, frequency, WiFi enable, multichip data, circuit architectural information, and silicon on insulator data.
10. The electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model reduces errors in the second simulation results, the errors including at least one of the group consisting of coding errors, thermal modeling errors, surface mount component (SMT) modeling errors, multi-chip module (MCM) modeling errors, mixed-signal integrated circuit errors, process variation errors, and harmonic balance errors.
11. The electronic circuit simulation post-processing system of claim 1 further comprising computer-executable code that generates first simulation results corresponding to the measured results.
1. A dual-mode power amplifier simulation system comprising:
a trained machine learning model that is trained with first simulation results associated with a first power amplifier circuit and measured results associated with a physical implementation of the first power amplifier circuit, the trained machine learning model is configured to generate augmented simulation results;
a simulator executing on one or more computer processors that simulates a dual-mode power amplifier circuit and generates dual-mode simulation results; and
a post processor including the trained machine learning model that executes on one or more computing devices with computer-executable instructions that, when executed, causes the post processor to augment the dual- mode simulation results for the dual-mode power amplifier based on the trained machine learning model associated with the first power amplifier circuit.
2. The dual-mode power amplifier simulation system of claim 1 wherein the trained machine learning model is further trained with bill of material information about the first power amplifier circuit.
3. The dual-mode power amplifier simulation system of claim 2 wherein the trained machine learning model further receives bill of material information about the dual- mode power amplifier circuit.
4. The dual-mode power amplifier simulation system of claim 1 wherein the first power amplifier circuit and the dual mode power amplifier circuit are multi-chip modules.
5. The dual-mode power amplifier simulation system of claim 1 wherein the computer-executable instructions, when executed, further causes the one or more computer processors to retrain the trained machine learning model using second measured results obtained from the second electronic circuit.
6. The dual-mode power amplifier simulation system of claim 1 wherein the trained machine learning model uses a gradient tree boosting, ensemble model.
7. The dual-mode power amplifier simulation system of claim 1 wherein the trained machine learning model uses at least one of the group consisting of: linear regression, least absolute shrinkage and selection operator (LASSO), support vector regression (SVR), random forest algorithms, or bayesian ridge regression.
8. The dual-mode power amplifier simulation system of claim 1 wherein the trained machine learning model is trained to augment simulation results associated with at least one of the group consisting of: output power, error vector magnitude, current, and an output matching network (OMN).
9. The dual-mode power amplifier simulation system of claim 1 wherein the simulation results associated with the first power amplifier circuit, the measured results, and/or a bill of materials are used to train the trained machine learning model include at least one of the group consisting of: a surface mount component, a power amplifier variable, inductor data, capacitance data, input matching network (IMN) data, IMN inductor data, output matching network (OMN) data, OMN inductor data, OMN capacitor data, resistance data, resistance data, transistor base resistance (RBB), current, voltage, frequency, WiFi enable, multichip data, circuit architectural information, and silicon on insulator data.
10. The dual-mode power amplifier simulation system of claim 1 wherein the trained machine learning model reduces errors in the simulation results associated with the dual-mode power amplifier circuit, the errors including at least one of the group consisting of coding errors, thermal modeling errors, surface mount component (SMT) modeling errors, multi-chip module (MCM) modeling errors, mixed-signal integrated circuit errors, process variation errors, and harmonic balance errors.
11. The dual-mode power amplifier simulation system of claim 1 further comprising computer-executable code that generates first simulation results corresponding to the measured results.
12. A computer-implemented method comprising: storing a trained machine learning model that is trained with first simulation results associated with a first electronic circuit and measured results obtained from a physical implementation of the first electronic circuit; generating, with one or more computer processors, second simulation results associated with a second electronic circuit that is different than the first electronic circuit; and augmenting the second simulation results with the trained machine learning model that executes on one or more computing devices with computer-executable instructions.
13. The computer-implemented method of claim 12 wherein the trained machine learning model is further trained with bill of material information about the first electronic circuit.
14. The computer-implemented method of claim 12 wherein the trained machine learning model further receives bill of material information about the second electronic circuit.
15. The computer-implemented method of claim 12 wherein the first and second electronic circuits are analog circuits.
16. The computer-implemented method of claim 12 further comprising: retraining the trained machine learning model using second measured results obtained from the second electronic circuit; and augmenting third simulation results associated with a third electronic circuit with the retrained machine learning model.
17. The computer-implemented method of claim 12 wherein the trained machine learning model uses a gradient tree boosting, ensemble model.
18. The computer-implemented method of claim 12 wherein the trained machine learning model uses at least one of the group consisting of: linear regression, least absolute shrinkage and selection operator (LASSO), support vector regression (SVR), random forest algorithms, or bayesian ridge regression.
19. The computer-implemented method of claim 12 wherein the trained machine learning model is trained to augment simulation results associated with at least one of the group consisting of: output power, error vector magnitude, current, and an output matching network (OMN).
20. The computer-implemented method of claim 12 wherein the first simulation results, the measured results, and/or a bill of materials are used to train the trained machine learning model include at least one of the group consisting of: a surface mount component, a power amplifier variable, inductor data, capacitance data, input matching network (IMN) data, IMN inductor data, output matching network (OMN) data, OMN inductor data, OMN capacitor data, resistance data, resistance data, transistor base resistance (RBB), current, voltage, frequency, WiFi enable, multichip data, circuit architectural information, and silicon on insulator data
12. A computer-implemented method comprising: storing a trained machine learning model that is trained with first simulation results associated with a first power amplifier circuit and measured results obtained from a physical implementation of the first power amplifier circuit; generating, with one or more computer processors, second simulation results associated with a dual-mode power amplifier circuit that is different than the first power amplifier circuit; and augmenting the second simulation results with the trained machine learning model that executes on one or more computing devices with computer-executable instructions.
13. The computer-implemented method of claim 12 wherein the trained machine learning model is further trained with bill of material information about the first power amplifier electronic circuit.
14. The computer-implemented method of claim 12 wherein the trained machine learning model further receives bill of material information about the dual mode power circuit.
15. The computer-implemented method of claim 12 wherein the first power amplifier circuit includes a mode switch to adjust an output matching impedance, and the dual-mode power amplifier has an array of mode select switches to adjust an output matching impedance.
16. The computer-implemented method of claim 12 further comprising: retraining the trained machine learning model using second measured results obtained from the dual-mode power amplifier circuit; and augmenting third simulation results associated with another dual-mode power amplifier circuit with the retrained machine learning model.
17. The computer-implemented method of claim 12 wherein the trained machine learning model uses a gradient tree boosting, ensemble model.
18. The computer-implemented method of claim 12 wherein the trained machine learning model uses at least one of the group consisting of: linear regression, least absolute shrinkage and selection operator (LASSO), support vector regression (SVR), random forest algorithms, or bayesian ridge regression.
19. The computer-implemented method of claim 12 wherein the trained machine learning model is trained to augment simulation results associated with at least one of the group consisting of: output power, error vector magnitude, current, and an output matching network (OMN).
20. The computer-implemented method of claim 12 wherein the first simulation results, the measured results, and/or a bill of materials are used to train the trained machine learning model include at least one of the group consisting of: a surface mount component, a power amplifier variable, inductor data, capacitance data, input matching network (IMN) data, IMN inductor data, output matching network (OMN) data, OMN inductor data, OMN capacitor data, resistance data, resistance data, transistor base resistance (RBB), current, voltage, frequency, WiFi enable, multichip data, circuit architectural information, and silicon on insulator data.
This is a provisional non-statutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over US Publication No. 2021/0173011 A1 issued to KAJBAF et al in view of US Publication No. 2021/0081592 A1 issued to Dandy et al.
1. KAJBAF et al discloses an electronic circuit simulation post-processing system comprising:
a trained machine learning model that is trained with first simulation results associated with a first electronic circuit and measured results obtained from a physical implementation of the first electronic circuit, the trained machine learning model configured to generate augmented simulation results (See: par [0051] An exemplary Simulation and Measurement Platform implementation of a software and hardware integrated platform for a physics-based artificial intelligence (AI) configured to combine measurement and simulation may permit a user to acquire data from measurement instruments, process the data, and synthesize the measured and simulated data in a single environment; [0052] An exemplary Simulation and Measurement Platform may be configured to provide an integrated software and hardware environment facilitating the data measurement, simulation, visualization, correlation, and management for these design stages, with a cohesive integrated software and hardware platform capable of communicating and interacting with various devices and instruments, including, for example: measurement instruments; control electronic boards (for example, data acquisition (DAQ), analog to digital converter (ADC)/digital to analog converter (DAC), single-board computer, programmable logic controller (PLC), relay, and the like); control motorized moving structures or robotic arms; and, exchange data with simulation tools, computer-aided design (CAD), and printed circuit board (PCB) layout tools; [0055] the software may be configured to use artificial intelligence models to create an augmented physical environment (APE) through the graphical user interface (GUI) for easy correlation of physical measured data with simulated data in a virtual environment in the software platform);
a post processor including the trained machine learning model that executes on one or more computing devices with computer-executable instructions that, when executed, causes the post processor to augment the second simulation results based on the trained machine learning model (See: Abstract, Apparatus and associated methods relate to augmenting a device model identified by artificial intelligence, with measurements of physical parameters, iteratively validating and verifying the augmented model until the augmented model satisfies a quality criterion determined as a function of the artificial intelligence, and automatically synthesizing an interactive simulation and measurement environment, based on the model. The model may be identified by the artificial intelligence based on measurement of a device operating characteristic. The physical parameter measurements the model is augmented with may be determined by the artificial intelligence, based on the model. The model may include a component, sub-system, and system model, permitting validation and verification through multiple levels. Various implementations may automatically generate a measurement scenario including communication commands configured to validate and verify the augmented model. Some designs may provide visualization of synthesized simulation and measurement output generated as a function of the validated and verified augmented model).
KAJBAF et al does not specify but Dandy et al discloses a simulator executing on one or more computer processors that simulate a second electronic circuit that is different than the first electronic circuit and generates second simulation results (See: [0022] The simulator accepts the input values and, at operation 104, uses a circuit simulator to generate simulated output values that are stored in the particular instance that was used to generate the output values. The output values simulated by the simulator and stored in the dataset in operation 104 may include current, voltage, etc., as shown in Table 1; [0023] At 106, a training dataset that includes the simulation model component parameters from operation 102 and the corresponding simulated values produced in operation 104 are provided as training data input to a machine learning facility. Table 1 may be considered an overly simplified training dataset for explanation purposes; [0034] Either or both of the internal memory 328 and the external storage 330 may store a simulation model, such as a circuit simulation model. The processor(s) 322 of the computing device 320 may be configured to receive information for parameters of certain components of the simulation model, simulate values for each of the simulation model component parameters, and provide them as input to the machine learning facility 312).
It would have been obvious before the effective filing date to combine simulation correction using measurements and deep learning as taught by Dandy et al to physics-based artificial intelligence integrated simulation and measurement platform method of KAJABAF et al would be to improve predicted results of a simulation model (Dandy et al, par [0011]).
2. KAJBAF et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model is further trained with bill of material information about the first electronic circuit (See: par [0057] The software may then generate (or acquire from a third-party software) a physics-based behavioral model which represents the relevant electrical or electromagnetic behavior of the components or sub-systems under test and the relationship between components and the system level evaluation. Once individual components of the simulation and measurement processes are verified, the components can be used as a tool for understanding the system behavior which are otherwise difficult to characterize).
3. KAJBAF et al discloses the electronic circuit simulation post-processing system of claim 2 wherein the trained machine learning model further receives bill of material information about the second electronic circuit (See: par [0057] The software may then generate (or acquire from a third-party software) a physics-based behavioral model which represents the relevant electrical or electromagnetic behavior of the components or sub-systems under test and the relationship between components and the system level evaluation. Once individual components of the simulation and measurement processes are verified, the components can be used as a tool for understanding the system behavior which are otherwise difficult to characterize).
4. Dandy et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the first and second electronic circuits are analog circuits (See: [0017] [0017] For a Serial Data Link simulation, the model parameters may include—but are not limited to—transmitter and receiver equalization, s-parameters, impulse response, other filter responses, inter-symbol interference, and analog model characteristics, for example).
5. KAJBAF et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the computer-executable instructions, when executed, further causes the one or more computing devices to: retrain the trained machine learning model using second measured results obtained from the second electronic circuit (See: abstract, Apparatus and associated methods relate to augmenting a device model identified by artificial intelligence, with measurements of physical parameters, iteratively validating and verifying the augmented model until the augmented model satisfies a quality criterion determined as a function of the artificial intelligence, and automatically synthesizing an interactive simulation and measurement environment, based on the model. The model may be identified by the artificial intelligence based on measurement of a device operating characteristic. The physical parameter measurements the model is augmented with may be determined by the artificial intelligence, based on the model. The model may include a component, sub-system, and system model, permitting validation and verification through multiple levels. Various implementations may automatically generate a measurement scenario including communication commands configured to validate and verify the augmented model. Some designs may provide visualization of synthesized simulation and measurement output generated as a function of the validated and verified augmented model); and transmit the retrained machine learning model to the post processor such that the post processor uses the retrained machine learning model generate augmented simulation results associated with a third electronic circuit (See: Abstract, Apparatus and associated methods relate to augmenting a device model identified by artificial intelligence, with measurements of physical parameters, iteratively validating and verifying the augmented model until the augmented model satisfies a quality criterion determined as a function of the artificial intelligence, and automatically synthesizing an interactive simulation and measurement environment, based on the model; [0084] FIG. 7 depicts a schematic view of an exemplary integrated simulation and measurement setup. In FIG. 7, the setup schematic 700 depicts an exemplary synthesis of measurement and simulation scenario. The software and hardware implementation of the exemplary measurement scenario is described. The goal of the illustrated scenario is to measure the transfer function of the DUT 110. In the illustrated example, DUT 110 may be a radio frequency (RF) attenuator or amplifier. The transfer function of the DUT 110 will be measured using the measurement instrument 135. In the depicted example, the measurement instrument 135 is a vector network analyzer (VNA). A VNA is a measurement instrument capable of measuring scattering parameters (S-parameters) of a device under test (DUT). In the depicted example, the loss of an attenuator or gain of an amplifier is measured based on measuring two port insertion loss (or gain) also known as S21 parameter as a function of frequency. The depicted setup schematic 700 of the physical measurement for this scenario includes input 705 of the DUT 110 connected to port 1 710 of the VNA and output 715 of DUT 110 connected to port 2 720 of the VNA using coaxial cables. Port 1 710 of the VNA transmits an RF signal toward the DUT 110 and port 2 720 of the VNA receives the attenuated (in case DUT 110 is an attenuator) or amplified (in case DUT 110 is an amplifier) signal from the DUT 110. The ratio of the received voltage on port 2 720 over the transmitted voltage on port 1 710 is defined as S21 parameter).
6. Dandy et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model uses a gradient tree boosting, ensemble model (See: [0025] Operation 108 may use supervised machine learning or unsupervised machine learning. Supervised machine learning as used herein generally refers to machine learning that is based upon training sets that contain labeled data. Unsupervised machine learning generally refers to ‘learning’ on training sets that contain mostly unlabeled data to train the neural network. The machine learning facility may apply a particular technique, such as a Bayesian approach, Random Forest, regression models, or classification models).
7. Dandy et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model uses at least one of the group consisting of: linear regression, least absolute shrinkage and selection operator (LASSO), support vector regression (SVR), random forest algorithms, or Bayesian ridge regression (See: [0025] Operation 108 may use supervised machine learning or unsupervised machine learning. Supervised machine learning as used herein generally refers to machine learning that is based upon training sets that contain labeled data. Unsupervised machine learning generally refers to ‘learning’ on training sets that contain mostly unlabeled data to train the neural network. The machine learning facility may apply a particular technique, such as a Bayesian approach, Random Forest, regression models, or classification models).
9. Dandy et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the first simulation results, the measured results, and/or a bill of materials are used to train the trained machine learning model include at least one of the group consisting of: a surface mount component, a power amplifier variable, inductor data, capacitance data, input matching network (IMN) data, IMN inductor data, output matching network (OMN) data, OMN inductor data, OMN capacitor data, resistance data, resistance data, transistor base resistance (RBB), current, voltage, frequency, WiFi enable, multichip data, circuit architectural information, and silicon on insulator data (See: [0052] Example 6 is the method of any one of examples 1-5, in which the set of training data comprises a set of training data created using Monte Carlo simulations; [0053] Example 7 is the method of any one of examples 1-6, in which the simulation model is a circuit simulation model, and wherein the circuit simulation model includes at least one component selected from the group consisting of: a resistor, a transistor, a capacitor, an inductor, a diode, an operational amplifier, a voltage source, a current source, and a transmission line; [0054] Example 8 is the method of any one of examples 1-7, in which the simulation model is a circuit simulation model, and wherein the at least one parameter is selected from the group consisting of: resistance, impedance, temperature coefficient, parasitic capacitance, transmission line length, transmission line width, material dielectric constant, and geometry).
10. Dandy et al discloses the electronic circuit simulation post-processing system of claim 1 wherein the trained machine learning model reduces errors in the second simulation results, the errors including at least one of the group consisting of coding errors, thermal modeling errors, surface mount component (SMT) modeling errors, multi-chip module (MCM) modeling errors, mixed-signal integrated circuit errors, process variation errors, and harmonic balance errors (See: par [0028] For example, if the DC gain of a certain measurement had a ±2% accuracy, then signals that were up to 2% higher and up to 2% lower could be stored as an additional training set or as additional instances of the original training set. The machine learning network could then be improved (i.e., updated or retrained) in an operation 206 with the additional instances or new training dataset as described above. The result after re-training the machine learning network in operation 206 would be a set of nominal model parameters, each of which would have a certain range of uncertainty due to measurement errors).
11. KAJBAF et al discloses the electronic circuit simulation post-processing system of claim 1 further comprising computer-executable code that generates first simulation results corresponding to the measured results (See: [0007] The physical parameter measurements the model is augmented with may be determined by the artificial intelligence, based on the model. The model may include a component, sub-system, and system model, permitting validation and verification through multiple levels. Various implementations may automatically generate a measurement scenario including communication commands configured to validate and verify the augmented model. Some designs may provide visualization of synthesized simulation and measurement output generated as a function of the validated and verified augmented model).
As per Claims 12-20: The instant claims recite substantially same limitation as the above rejected claims 1-11, and therefore rejected under the same rationale.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIBROM K GEBRESILASSIE whose telephone number is (571)272-8571. The examiner can normally be reached M-F 9:00 AM-5:30 PM.
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KIBROM K. GEBRESILASSIE
Primary Examiner
Art Unit 2189
/KIBROM K GEBRESILASSIE/Primary Examiner, Art Unit 2189
07/24/2026
Prosecution Insights