Non-Final Rejection
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application was filed with claims 1-20, which are pending.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2021/0280740 (“Akatsuka”).
Regarding claim 1, Akatsuka discloses a nanocrystal array comprising: a plurality of nanorods 30 arranged in an array ([0039]), each of the plurality of nanorods comprising a nanorod buffer layer 22, a first type semiconductor layer 38, a tunnel junction layer 37, a second type semiconductor layer 36, a multi-quantum well 34, and another first type semiconductor 32 layer successively stacked on each other. See Fig. 10, [0095], [0027]-[0029], [0032]. Note that layers 38,37,36,34,32 are in the opposite order in Fig. 10, but Akatsuka also discloses that these layers may be arranged in the claimed order. [0124].
Regarding claim 2, each nanorod column can be defined as a “unit cell” and these are arranged periodically as seen in the figures.
Regarding claim 4, Akatsuka discloses the multi-quantum well comprises a plurality of InGaN well layers and a plurality of GaN barrier layers, the InGaN and GaN layers are alternately stacked on each other, each of the InGaN well layers is arranged between adjacent GaN barrier layers. [0028]. While Akatsuka does not specify, it is clear that InGaN layers are the well layers and GaN the barriers, because InGaN has a lower bandgap than GaN; a person skilled in the art knows this is how quantum wells are made.
Regarding claim 5, Akatsuka discloses the cross section of the nanorods is a circle or a polygon. While a polygon is the genus for the claimed species (triangular or hexagonal) the examiner finds that this is sufficient to anticipate the claim. A person of ordinary skill would at once envisage the subject matter of the claim, so the claim is anticipated. MPEP 2131.02 III. This is so given that triangle and hexagon are two of the lower order polygons, so it is clear that when Akatsuka says “polygon” you would expect those to be involved as part of the disclosure. It would be silly, for example, for the skilled artisan to read polygon and envisage a 13 sided or 17 sided polygon but ignore those lower like a triangle. And if Akatsuka wanted to avoid triangles and use for example rectangles only or rectangles or higher it could have simply said exactly that.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Akatsuka in view of Krishnamoorthy et al., Low resistance GaN/InGaN/GaN tunnel junctions, Applied Physics Letters, vol. 102, 113503 (March 2013) (“Krishnamoorthy”).
Regarding claim 3, the first type semiconductor layer 38 is an N-type GaN layer, the second type semiconductor layer 36 is a P-type GaN layer; the tunnel junction layer 37 comprises an N-type GaN heavily doped layer adjacent to the first type semiconductor layer, a P-type GaN heavily doped layer adjacent to the second type semiconductor layer. [0027], [0029], [0032].
Akatsuka does not disclose that the tunnel junction has an InGaN layer located between the N-type GaN heavily doped layer and the P-type GaN heavily doped layer. However, such tunnel junctions were already known. See Krishnamoorthy, abstract. It would have been obvious to a person of ordinary skill in the art to use this as the material of the tunnel junction as it has a low resistance, as taught by Krishnamoorthy.
Claims 6-9, 16-17, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Akatsuka in view of US 2001/0011730 (“Saeki”), and further in view of US 2022/0200233 (“Noda”), and further in view of US 2009/0321738 (“Kim”).
Regarding claim 6, Akatsuka describes a laser device comprising a substrate 10 having a first and second opposing surface, a nanocrystal array on the substrate and comprising the limitations of claim 1 as discussed above, and an electrode 70 on the nanocrystal array.
There is not disclosed a conductive layer between the nanocrystal array and electrode. Saeki teaches that in semiconductor light emitting devices it was known to include a contact layer with high carrier concentration (i.e. conductive) between the electrode and the rest of the device. [0067]-[0068]. It would have been obvious to a person of ordinary skill in the art to do so as this lowers the contact resistance, as taught by Saeki.
There is not disclosed the first surface of the substrate is recessed toward the second surface forming a hole, and a drain electrode formed in the hole. Noda teaches that a light emitting device made of a plurality of nanorods 85 may be formed on a drain electrode 32 (of transistor 30, and integral with 70/72) in a substrate 10. Fig. 1, [0025], [0037]. It would have been obvious to a person of ordinary skill in the art to include a transistor and drain as it drives the light emitting element, as taught by Noda. [0024]. In Noda the transistor is made by doped impurities in the substrate. A person of ordinary skill would recognize that a transistor can instead be made by electrodes in a hole in the substrate. For example, Kim describes in Fig. 1 a light emitting device with a plurality of nanorods 34 on top of a transistor 20 for driving the light emission, with the nanorods mounted on various layers having recessed holes and a drain electrode via 31,28 therein. [0029]-[0030]. It would have been obvious to a person of ordinary skill in the art to use drain electrodes rather than merely doped impurity layers, as the art has recognized this as an alternative way of implementing transistors for driving the light emitting element. See MPEP 2144.06 (substituting known equivalents for the same purpose obvious). Alternatively, this would have been a simple substitution of one known element to yield predictable results. MPEP 2143 I.B. The base device of Akatsuka+Noda differs from the claim by using a different type of drain electrode, but the similar type is found in Kim. A person of ordinary skill could have substituted one for the other and the result would have been predictable because it yields the same type of device doing the same thing—a light emitting array of nanorods driven by a transistor, just a different structure of transistor.
Regarding claim 7, Akatsuka includes layer 60 which may be called a selective growth layer, wherein the selective growth layer defines a plurality of through holes, each of the plurality of through holes extends through the selective growth layer, the at least and the plurality of nanorods is formed by growing in the plurality of through holes. When in the combination of claim 6 it may be considered that layer 60 is on and exposes the drain electrode, which will be in the substrate below.
Regarding claim 8, Akatsuka layer 60 meets these materials. [0025].
Regarding claim 9, Akatsuka shows electrode 70, but these electrode shapes are not shown. The examiner takes Official Notice that annular electrodes for lasers are known in the art. It would have been obvious to a person of ordinary skill in the art to use one as that shape as it includes an open area for easier laser output. Additionally, a change in shape is obvious absent evidence that the particular shape provides a significant result. MPEP 2144.04 IV.B.
Claim 16 is a display device comprising: a casing; and a laser device located in the casing, the laser device comprising: the same limitations as the laser of claim 6. That laser is taught as above. Akatsuka further discloses that its laser may be in a casing as a projector device. Fig. 11, [0103]-[0105], [0115]. Akatsuka also discloses that it may be used in a display device rather than a projector device. [0122].
The limitations of claims 17 and 19-20 are the same as claims 2 and 4-5, and are described by Akatsuka as in the above rejections of claims 2 and 4-5.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Akatsuka, Saeki, Noda, and Kim as applied to claim 16, and further in view of Krishnamoorthy.
Parent claim 16 is taught by the references as above. The limitations of claim 18 are the same as claim 3, and are taught by Akatsuka and Krishnamoorthy as in the rejection of claim 3.
Allowable Subject Matter
Claims 10-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 10, there is not taught or disclosed in the prior art a laser as in claim 6 having the specific features of the substrate as claimed, particularly that the at least one hole (for the drain electrode) passes through the semiconductor layer and extends into the silicon substrate, each of the at least one hole defines a sidewall and a bottom surface connected to the sidewall, the bottom surface is inclined with the silicon substrate, and a (111) crystal plane of the silicon substrate is exposed from the bottom surface.
Claims 11-15 are dependent claims and allowable for the same reasons.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to James Menefee whose telephone number is (571)272-1944. The examiner can normally be reached M-F 7-4.
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/JAMES A MENEFEE/ Primary Examiner, Art Unit 2828