DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/26/2026 has been entered.
Response to Amendment
Applicant’s amendment dated 03/26/2026, in which claims 1, 3-4, 21-22, 27 were amended, claims 6-20 were cancelled, claims 29-34 were added, has been entered.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to foreign application KR10-2022-0092552 filed on 07/26/2022 and foreign application KR10-2022-0066516 filed on 05/31/2022. The foreign applications are not in English. The certified copied of the foreign priority application KR10-2022-0092552 and the foreign priority application KR10-2022-0066516 have been received.
Filing Dates for the Claims — All Claims Not Entitled to Priority Date
To be entitled to the filing date of the foreign priority application KR10-2022-0092552 that is not in English, an English translation of the non-English language foreign applications KR10-2022-0092552 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d).
To be entitled to the filing date of the foreign application KR10-2022-0066516 that is not in English, an English translation of the non-English language foreign applications KR10-2022-0066516 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d).
The foreign application must adequately support the claimed subject matter, meaning satisfy the written description and enablement requirements of 35 U.S.C. 112(a). See MPEP §§ 215 and 216. 37 C.F.R. 1.55(g)(3)(ii)-(iii). To demonstrate compliance with 35 U.S.C. 112(a), applicant should point to support for their claimed subject matter in their translations.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5, 21, 29-31 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, claim 1 recites the limitation "the upper surface of the first electrode layer" in line 16. There is insufficient antecedent basis for this limitation in the claim.
For the purpose of this Action, the above limitation of claim 1 will be interpreted and examined as --an upper surface of the first electrode layer--.
Claims depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5, 21, 29-31 are rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (US Pat. 5262352) in view of Lindsay et al. (US Pat. 10141330), Pohlman, III (US Pub. 20180254317) and Kondo et al. (US Pub. 20120199815).
Regarding claims 1, 4, 5, Woo et al. discloses in Fig.8, Fig. 11 a method of forming a wiring structure, the method comprising:
forming a first insulation layer [12] on an upper surface of a substrate [10];
forming a first electrode layer [26] on an upper surface of the first insulation layer [12];
forming a second insulation layer [28] on an upper surface of the first electrode layer [26];
forming a second electrode layer [30] on an upper surface of the second insulation layer [28];
forming a third insulating layer [32] on an upper surface of the second electrode layer [30];
etching the third insulation layer [32] through a first etching process to form an opening [37] in the third insulation layer [32] to expose a portion of an upper surface of the second electrode layer [30][it obvious that to form opening in the second electrode layer, upper surface of the second electrode layer must be removed to expose];
removing the portion of the second electrode layer [30] exposed in the opening [37] through an etching process to expose a portion of the second insulation layer [28] in the opening [37];
etching the portion of the second insulation layer [28] exposed in the opening [37] through a second etching process to expose a portion of an upper surface of the first electrode layer [26] in the opening [37]; and
filling the opening to form a contact plug [38] in the opening [37] after exposing the portion of the upper surface of the first electrode layer [26].
Woo et al. fails to explicitly disclose in embodiment of Fig. 11
etching the third insulation layer through a first dry etching process using an etching gas including fluorine (F);
etching the second insulation layer through a second dry etching process using an etching gas including fluorine (F);
wherein the first second electrode layer serves as an etch stop layer in the first dry etching process;
wherein the second insulation layer is not removed in the first dry etching process.
Woo et al. discloses in Fig. 1-Fig. 2, columns 3-4
etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F) [“Dielectric layer 20 is preferably a TEOS based oxide…oxides may be etched using, for example, a CHF3 and O2 plasma or a C2F6 plasma …dielectric layer 20 is reactive ion etched (RIE)”];
etching the second insulation layer [16] through a second dry etching process using an etching gas including fluorine (F) [“Dielectric layer 16 is preferably a TEOS based oxide…oxides may be etched using, for example, a CHF3 and O2 plasma or a C2F6 plasma …Dielectric layer 16 is RIE etched”.
Lindsay et al. discloses in Fig. 5A, Fig. 6A, Fig. 7A, column 12, lines 30-37, column 14, lines 50-67
etching the third insulation layer [106e] through a first dry etching process [Fig. 5A];
etching the second insulation layer [106d] through a second dry etching process [Fig. 6A];
wherein the first second electrode layer [104e] serves as an etch stop layer in the first dry etching process [Fig. 5A];
wherein the second insulation layer [106d] is not removed in the first dry etching process [Fig. 5A].
[“a portion of the fifth insulating structure 106e of the fifth tier 110e of the stack structure 103 underlying the second dielectric structure 116b, and the exposed portion of the fourth insulating structure 106d may be selectively removed using at least one other etching process (e.g., at least one other anisotropic etching process, such as another anisotropic dry etching process) to expose another portion of the fifth conductive structure 104e and a portion of the fourth conductive structure 104d”]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Lindsay et al. and columns 3-4 of Woo et al. into the method of Fig. 11 of Woo et al. to include etching the third insulation layer through a first dry etching process using an etching gas including fluorine (F); etching the second insulation layer through a second dry etching process using an etching gas including fluorine (F); wherein the first second electrode layer serves as an etch stop layer in the first dry etching process; wherein the second insulation layer is not removed in the first dry etching process. The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable method and etchant for selectively etching the insulation layers to expose upper surface of the underlying conductive structure for further process [column 12, lines 30-37, column 14, lines 50-67 of Lindsay et al.; columns 3-4 of Woo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Woo et al. fails to disclose
removing the portion of the second electrode layer through a reactive ion etching (RIE) process using oxygen plasma.
Woo et al. discloses in column 4, lines 35-40
removing the portion of the second electrode layer [17 and 18] using oxygen plasma [“An etch process using an SF6 /oxygen plasma may be used to simultaneously etch both a silicide layer and a polysilicon layer”].
Woo et al. further discloses in column 7, lines 45-49 that “Each of the conductive layers 26, 30, and 34 is… any known conductive or semiconductive material.”
Pohlman, III discloses the electrode layers [10] including graphene.
Kondo et al. discloses in Fig. 8B, paragraph [0105]
removing a portion of a layer [12] including graphene through a reactive ion etching (RIE) process using oxygen plasma [oxygen plasma].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Kondo et al. and Pohlman, III into the method of Woo et al. to include the electrode layers including graphene; removing the portion of the first electrode layer through the reactive ion etching (RIE) process using oxygen plasma. The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable alternative materials of the electrode layers to allow for denser design, to form graphene based decoupling capacitors capable of responding to transient current loads in a few picoseconds and recover as quickly, and do not exhibit electromigration issues of normal metallization, thus improving device performance [paragraph [0019], [0024]-[0027] of Pohlman, III]; providing suitable method for removing a portion of the graphene layer [paragraph [0105] of Kondo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 3, Woo et al. discloses etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F). Pohlman, III discloses the electrode layer [10] including graphene.
Thus, etching the third insulation layer [20] using the etching gas including fluorine (F) as disclosed by Woo et al. to expose the upper surface of the second electrode layer including graphene as suggested by Pohlman, III would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer”.
Regarding claim 21, Lindsay discloses etching the third insulation layer [106e] through a first dry etching process to expose the upper surface of the second electrode layer [104e]. Woo et al. discloses etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F). Pohlman, III discloses the electrode layer [10] including graphene. Thus, etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F) as disclosed by Woo et al. to expose the upper surface of the second electrode layer including graphene as suggested by Lindsay and Pohlman, III would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer, and the fluorinated graphene serves as an etch stop layer in the first dry etching process.” “Where the claimed and prior art products …are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).”
Regarding claims 29-31, Woo et al. discloses in Fig. 11
wherein the second electrode layer [30] contacts a side surface of the contact plug [38];
wherein the contact plug [38] extends through the second electrode layer [30];
wherein the contact plug [38] is electrically connected to the first electrode layer [26] and the second electrode layer [30].
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (US Pat. 5262352) in view of Lindsay et al. (US Pat. 10141330), Kondo et al. (US Pub. 20120199815) and Pohlman, III (US Pub. 20180254317) as applied to claim 1 above and further in view of Aleman et al. (US Pub. 20200259065).
Regarding claim 2, Woo et al. fails to disclose
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6).
Woo et al. discloses in column 7, lines 45-49 that “the dielectric layers 28, 32, and 36 may be any known insulator or any dielectric material discussed herein.”
Pohlman, III discloses the (third and second) insulation layers [14 and 16] including hexagonal boron nitride (h-BN).
Aleman et al. discloses in paragraph [0008]
etching a layer of hexagonal boron nitride (hBN) through a dry etching process using an etching gas including fluorine (F);
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6) [xenon difluoride (XeF2)].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Aleman et al. and Pohlman, III into the method of Woo et al. to include the (third and second) insulation layers including hexagonal boron nitride (h-BN) and wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6). The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable alternative materials of the insulation layers to allow for denser design, to form graphene based decoupling capacitors capable of responding to transient current loads in a few picoseconds and recover as quickly, and do not exhibit electromigration issues of normal metallization, thus improving device performance [paragraph [0019], [0024]-[0027] of Pohlman, III]; providing suitable etchant for removing a portion of the layer of hexagonal boron nitride (hBN) [paragraph [0008] of Aleman et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claims 22, 24-28, 32-34 are rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (US Pat. 5262352) in view of Lindsay et al. (US Pat. 10141330), Pohlman, III (US Pub. 20180254317), Shegai et al. (US Pub. 20230118913).
Regarding claims 22, 25, 26 and 28, Woo et al. discloses in Fig.8, Fig. 11 a method of forming a wiring structure, the method comprising:
forming a first insulation layer [12] on an upper surface of a substrate [10];
forming a first electrode layer [26] on an upper surface of the first insulation layer [12];
forming a second insulation layer [28] on an upper surface of the first electrode layer [26];
forming a second electrode layer [30] on an upper surface of the second insulation layer [28];
forming a third insulating layer [32] on an upper surface of the second electrode layer [30];
etching the third insulation layer [32] through a first etching process to form an opening [37] in the third insulation layer [32] to expose a portion of an upper surface of the second electrode layer [30][it obvious that to form opening in the second electrode layer, upper surface of the second electrode layer must be removed to expose];
removing the portion of the second electrode layer [30] exposed in the opening [37] through an etching process to expose a portion of the second insulation layer [28] in the opening [37];
etching the portion of the second insulation layer [28] exposed in the opening [37] through a second etching process to expose a portion of an upper surface of the first electrode layer [26] in the opening [37]; and
filling the opening to form a contact plug [38] in the opening [37] after exposing the portion of the first electrode layer [26].
Woo et al. fails to explicitly disclose in embodiment of Fig. 11
etching the third insulation layer through a first dry etching process using an etching gas including fluorine (F);
etching the second insulation layer through a second dry etching process using an etching gas including fluorine (F);
wherein the first second electrode layer serves as an etch stop layer in the first dry etching process;
wherein the second insulation layer is not removed in the first dry etching process.
Woo et al. discloses in Fig. 1-Fig. 2, columns 3-4
etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F) [“Dielectric layer 20 is preferably a TEOS based oxide…oxides may be etched using, for example, a CHF3 and O2 plasma or a C2F6 plasma …dielectric layer 20 is reactive ion etched (RIE)”];
etching the second insulation layer [16] through a second dry etching process using an etching gas including fluorine (F) [“Dielectric layer 16 is preferably a TEOS based oxide…oxides may be etched using, for example, a CHF3 and O2 plasma or a C2F6 plasma …Dielectric layer 16 is RIE etched”.
Lindsay et al. discloses in Fig. 5A, Fig. 6A, Fig. 7A, column 12, lines 30-37, column 14, lines 50-67
etching the third insulation layer [106e] through a first dry etching process [Fig. 5A];
etching the second insulation layer [106d] through a second dry etching process [Fig. 6A];
wherein the first second electrode layer [104e] serves as an etch stop layer in the first dry etching process [Fig. 5A, column 12, lines 35-37, “The first aperture 120a may terminate (e.g., end, stop) at an upper surface of the fifth conductive structure 104e of the fifth tier 110e of the stack structure 103”];
wherein the second insulation layer [106d] is not removed in the first dry etching process [Fig. 5A].
[“a portion of the fifth insulating structure 106e of the fifth tier 110e of the stack structure 103 underlying the second dielectric structure 116b, and the exposed portion of the fourth insulating structure 106d may be selectively removed using at least one other etching process (e.g., at least one other anisotropic etching process, such as another anisotropic dry etching process) to expose another portion of the fifth conductive structure 104e and a portion of the fourth conductive structure 104d”]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Lindsay et al. and columns 3-4 of Woo et al. into the method of Fig. 11 of Woo et al. to include etching the third insulation layer through a first dry etching process using an etching gas including fluorine (F); etching the second insulation layer through a second dry etching process using an etching gas including fluorine (F); wherein the first second electrode layer serves as an etch stop layer in the first dry etching process; wherein the second insulation layer is not removed in the first dry etching process. The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable method and etchant for selectively etching the insulation layers to expose upper surface of the underlying conductive structure for further process [column 12, lines 30-37, column 14, lines 50-67 of Lindsay et al.; columns 3-4 of Woo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Woo et al. fails to disclose
removing the portion of the second electrode layer through a reactive ion etching (RIE) process using hydrogen plasma;
wherein the reactive ion etching (RIE) process includes oxygen plasma.
Woo et al. discloses in column 7, lines 45-49 that “Each of the conductive layers 26, 30, and 34 is… any known conductive or semiconductive material.”
Pohlman, III discloses the electrode layers [10] including graphene.
Shegai et al. discloses in paragraph [0006]
removing the portion of the second electrode layer through a reactive ion etching (RIE) process using hydrogen plasma; wherein the reactive ion etching (RIE) process includes oxygen plasma. [“a method of anisotropic dry etching of graphene using sequential oxygen and hydrogen plasma was reported.”]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Shegai et al. and Pohlman, III into the method of Woo et al. to include the electrode layers including graphene; removing the portion of the first electrode layer through a reactive ion etching (RIE) process using hydrogen plasma; wherein the reactive ion etching (RIE) process includes oxygen plasma. The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable alternative materials of the electrode layers to allow for denser design, to form graphene based decoupling capacitors capable of responding to transient current loads in a few picoseconds and recover as quickly, and do not exhibit electromigration issues of normal metallization, thus improving device performance [paragraph [0019], [0024]-[0027] of Pohlman, III]; providing suitable method for removing a portion of the graphene layer [paragraph [0006] of Shegai et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 24, Woo et al. discloses etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F). Pohlman, III discloses the electrode layer [10] including graphene.
Thus, etching the third insulation layer [20] using the etching gas including fluorine (F) as disclosed by Woo et al. to expose the upper surface of the second electrode layer including graphene as suggested by Pohlman, III would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer”.
Regarding claim 27, Lindsay discloses etching the third insulation layer [106e] through a first dry etching process to expose the upper surface of the second electrode layer [104e] which serves as an etch stop layer during the first dry etching process. Woo et al. discloses etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F). Pohlman, III discloses the electrode layer [10] including graphene. Thus, etching the third insulation layer [20] through a first dry etching process using an etching gas including fluorine (F) as disclosed by Woo et al. to expose the upper surface of the second electrode layer including graphene as suggested by Lindsay and Pohlman, III would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer, and the fluorinated graphene serves as an etch stop layer in the first dry etching process.” “Where the claimed and prior art products …are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).”
Regarding claims 32-34, Woo et al. discloses in Fig. 11
wherein the second electrode layer [30] contacts a side surface of the contact plug [38];
wherein the contact plug [38] extends through the second electrode layer [30];
wherein the contact plug [38] is electrically connected to the first electrode layer [26] and the second electrode layer [30].
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (US Pat. 5262352) in view of Lindsay et al. (US Pat. 10141330), Pohlman, III (US Pub. 20180254317), Shegai et al. (US Pub. 20230118913) as applied to claim 22 above and further in view of Aleman et al. (US Pub. 20200259065).
Regarding claim 23, Woo et al. fails to disclose
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6).
Woo et al. discloses in column 7, lines 45-49 that “the dielectric layers 28, 32, and 36 may be any known insulator or any dielectric material discussed herein.”
Pohlman, III discloses the (third and second) insulation layers [14 and 16] including hexagonal boron nitride (h-BN).
Aleman et al. discloses in paragraph [0008]
etching a layer of hexagonal boron nitride (hBN) through a dry etching process using an etching gas including fluorine (F);
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6) [xenon difluoride (XeF2)].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Aleman et al. and Pohlman, III into the method of Woo et al. to include the (third and second) insulation layers including hexagonal boron nitride (h-BN) and wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6). The ordinary artisan would have been motivated to modify Woo et al. in the above manner for the purpose of providing suitable alternative materials of the insulation layers to allow for denser design, to form graphene based decoupling capacitors capable of responding to transient current loads in a few picoseconds and recover as quickly, and do not exhibit electromigration issues of normal metallization, thus improving device performance [paragraph [0019], [0024]-[0027] of Pohlman, III]; providing suitable etchant for removing a portion of the layer of hexagonal boron nitride (hBN) [paragraph [0008] of Aleman et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Response to Arguments
Applicant’s arguments with respect to claims 1-5, 21-34 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Overall, Applicant’s arguments are not persuasive. The claims stand rejected.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited art discloses similar materials, devices and methods.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday.
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/SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893
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