DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment dated 08/28/2026, in which claims 1, 22 were amended, claims 6-20 were cancelled, has been entered.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to foreign application KR10-2022-0092552 filed on 07/26/2022 and foreign application KR10-2022-0066516 filed on 05/31/2022. The foreign applications are not in English. The certified copied of the foreign priority application KR10-2022-0092552 and the foreign priority application KR10-2022-0066516 have been received.
Filing Dates for the Claims — All Claims Not Entitled to Priority Date
To be entitled to the filing date of the foreign priority application KR10-2022-0092552 that is not in English, an English translation of the non-English language foreign applications KR10-2022-0092552 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d).
To be entitled to the filing date of the foreign application KR10-2022-0066516 that is not in English, an English translation of the non-English language foreign applications KR10-2022-0066516 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d).
The foreign application must adequately support the claimed subject matter, meaning satisfy the written description and enablement requirements of 35 U.S.C. 112(a). See MPEP §§ 215 and 216. 37 C.F.R. 1.55(g)(3)(ii)-(iii). To demonstrate compliance with 35 U.S.C. 112(a), applicant should point to support for their claimed subject matter in their translations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 21, 30 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto et al. (US Pat. 4977105) in view of Sato et al. (US Pub. 20200152817), Woo et al. (KR101436849B1) and Kondo et al. (US Pub. 20120199815).
Regarding claim 1, Okamoto et al. discloses in Fig. 2A-2B, 2F-2G, column 4, lines 29-38, column 5, lines 11-16, 39-44 a method of forming a wiring structure, the method comprising:
alternately and repeatedly stacking electrode layers [3, 5, 8] and insulation layers [2, 4, 6, 9] on a substrate [1], the stacking comprising:
forming a first insulation layer [2] on an upper surface of the substrate [1];
forming a first electrode layer [3] on an upper surface of the first insulation layer [2];
forming a second insulation layer [4] on an upper surface of the first electrode layer [3];
forming a second electrode layer [5] on an upper surface of the second insulation layer [4]; and
forming a third insulation layer [6] on an upper surface of the second electrode layer [5];
etching the third insulation layer [6] through a first dry etching process using an etching gas including fluorine (F) to form an opening [12] in the third insulation layer [6] to expose a portion of the upper surface of the second electrode layer [5][column 5, lines 41-44, “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas and the conductive layers 5 and 8 are etched by a plasma etching using (CCl4 +O2) gas”];
removing a portion of the second electrode layer [5] exposed in the opening [12] through a reactive ion etching (RIE) process to expose a portion of the second insulation layer [4] directly under the second electrode layer [5] in the opening [12][column 5, lines 41-44, “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas and the conductive layers 5 and 8 are etched by a plasma etching using (CCl4 +O2) gas”];
etching the portion of the second insulation layer [4] directly under the second electrode layer [5] exposed in the opening [12] through a second dry etching process using an etching gas including fluorine (F) to expose a portion of the upper surface of the first electrode layer [3] in the opening [12][column 5, lines 41-44 “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas” and column 7, lines 54-64, “the insulating layers 4a and 9a and the insulating film 18 are made of the same material, silicon oxide…the insulating layer 4a is made of silicon nitride, a plasma etching using a CF4 gas may be employed to selectively etch the insulating layer 4 only”]; and
filling the opening to form a contact plug [11] in the opening [12] after exposing the portion of the upper surface of the first electrode layer [3][column 7, lines 65-68, column 8, lines 1-4].
Okamoto et al. fails to disclose
the electrode layers including graphene and the insulation layers including hexagonal boron nitride (h-BN);
the first insulation layer including hexagonal boron nitride (h-BN);
the first electrode layer including graphene;
the second insulation layer including hexagonal boron nitride (h-BN);
the second electrode layer including graphene;
the third insulating insulation layer including hexagonal boron nitride (h-BN).
Woo et al. discloses in Fig. 1a,
the electrode layers [120/110] including graphene and the insulation layers [110/120] including hexagonal boron nitride (h-BN) [“a multi-layered structure in which different kinds of two-dimensional nanostructured materials such as graphene and hexagonal boron nitride are alternately stacked”…“The first material and the second material may be boron nitride, and more preferably, any one of the first material and the second material may be graphene. Here, the first material layer 110 and the second material layer 120”… “the multi-layer structure may include a graphene layer 110 and a hexagonal boron nitride layer 120 that are sequentially disposed”].
Sato et al. discloses in Fig. 6B, Fig. 7A, Fig. 15, paragraph [0053], [0064]
the electrode layers [11] including graphene and the insulation layers [17] including hexagonal boron nitride (h-BN);
the first insulation layer [first layer 17] including hexagonal boron nitride (h-BN);
the first electrode layer [first layer 11] including graphene;
the second insulation layer [second layer 17] including hexagonal boron nitride (h-BN);
the second electrode layer [second layer 11] including graphene;
the third insulating insulation layer [third layer 17] including hexagonal boron nitride (h-BN).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Woo et al. and Sato et al. into the method of Okamoto et al. to include the electrode layers including graphene and the insulation layers including hexagonal boron nitride (h-BN); the first insulation layer including hexagonal boron nitride (h-BN); the first electrode layer including graphene; the second insulation layer including hexagonal boron nitride (h-BN); the second electrode layer including graphene; the third insulating insulation layer including hexagonal boron nitride (h-BN). The ordinary artisan would have been motivated to modify Okamoto et al. in the above manner for the purpose of providing suitable alternative materials of the electrode layers and the insulation layers to form a high-performance composite having excellent physical properties and exhibiting high electron mobility.
Okamoto et al., Sato et al. and Woo et al. fails to disclose
removing the portion of the second electrode layer exposed in the opening through the reactive ion etching (RIE) process using oxygen plasma.
Okamoto et al. discloses in column 5, lines 41-44, removing the portion of the second electrode layer exposed in the opening through a plasma etching using a gas containing oxygen [(CCl4 +O2) gas].
Sato et al. and Woo et al. disclose
the second electrode layers including graphene.
Kondo et al. discloses in Fig. 8B, paragraph [0105]
removing a portion of a layer [12] including graphene through a reactive ion etching (RIE) process using oxygen plasma [oxygen plasma].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Kondo et al. into the method of Okamoto et al., Sato et al. and Woo et al. to include removing the portion of the second electrode layer exposed in the opening through the reactive ion etching (RIE) process using oxygen plasma. The ordinary artisan would have been motivated to modify Okamoto et al., Sato et al. and Woo et al. in the above manner for the purpose of providing suitable method for removing a portion of the graphene layer [paragraph [0105] of Kondo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 2, Okamoto et al. discloses in column 7, lines 60-64
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6) [CF4].
Regarding claim 3, Okamoto et al. discloses column 5, lines 41-44, etching the third insulation layer [6] using the etching gas including fluorine (F) to expose the portion of the upper surface of the second electrode layer. Sato et al. and Woo et al. disclose the second electrode layer including graphene. Thus, etching the third insulation layer [6] using the etching gas including fluorine (F) as disclosed by Okamoto et al. to expose the upper surface of the second electrode layer including graphene as suggested by Sato et al. and Woo et al. would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer”.
Regarding claims 4-5, Okamoto et al. discloses in Fig. 2B, column 5, lines 39-44
wherein the second electrode layer [5] serves as an etch stop layer in the first dry etching process [“The insulating layer 9, the conductive layer 8, the insulating layer 6 and the conductive layer 5 are selectively and serially etched”];
wherein the second insulation layer [4] is not removed in the first dry etching process.
Regarding claim 21, Okamoto et al. discloses column 5, lines 41-44, etching the third insulation layer [6] using the etching gas including fluorine (F) to expose the portion of the upper surface of the second electrode layer. Sato et al. and Woo et al. disclose the second electrode layer including graphene. Thus, etching the third insulation layer [6] using the etching gas including fluorine (F) as disclosed by Okamoto et al. to expose the upper surface of the second electrode layer including graphene as suggested by Sato et al. and Woo et al. would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer, and the fluorinated graphene serves as an etch stop layer in the first dry etching process.” “Where the claimed and prior art products …are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).”
Regarding claim 30, Okamoto et al. discloses in Fig. 3B
wherein the contact plug [11] extends through the second electrode layer [5].
Claims 22-28, 33 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto et al. (US Pat. 4977105) in view of Sato et al. (US Pub. 20200152817), Woo et al. (KR101436849B1) and Shegai et al. (US Pub. 20230118913).
Regarding claims 22 and 28, Okamoto et al. discloses in Fig. 2A-2B, 2F-2G, column 4, lines 29-38, column 5, lines 11-16, 39-44 a method of forming a wiring structure, the method comprising:
alternately and repeatedly stacking electrode layers [3, 5, 8] and insulation layers [2, 4, 6, 9] on a substrate [1], the stacking comprising:
forming a first insulation layer [2] on an upper surface of the substrate [1];
forming a first electrode layer [3] on an upper surface of the first insulation layer [2];
forming a second insulation layer [4] on an upper surface of the first electrode layer [3];
forming a second electrode layer [5] on an upper surface of the second insulation layer [4]; and
forming a third insulation layer [6] on an upper surface of the second electrode layer [5];
etching the third insulation layer [6] through a first dry etching process using an etching gas including fluorine (F) to form an opening [12] in the third insulation layer [6] to expose a portion of the upper surface of the second electrode layer [5][column 5, lines 41-44, “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas and the conductive layers 5 and 8 are etched by a plasma etching using (CCl4 +O2) gas”];
removing a portion of the second electrode layer [5] exposed in the opening [12] through a reactive ion etching (RIE) process to expose a portion of the second insulation layer [4] directly under the second electrode layer [5] in the opening [12][column 5, lines 41-44, “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas and the conductive layers 5 and 8 are etched by a plasma etching using (CCl4 +O2) gas”];
etching the portion of the second insulation layer [4] directly under the second electrode layer [5] exposed in the opening [12] through a second dry etching process using an etching gas including fluorine (F) to expose a portion of the upper surface of the first electrode layer [3] in the opening [12][column 5, lines 41-44 “the insulating 9 and 6 are etched by a plasma etching using (CHF3 +O2) gas” and column 7, lines 54-64, “the insulating layers 4a and 9a and the insulating film 18 are made of the same material, silicon oxide…the insulating layer 4a is made of silicon nitride, a plasma etching using a CF4 gas may be employed to selectively etch the insulating layer 4 only”]; and
filling the opening to form a contact plug [11] in the opening [12] after exposing the portion of the upper surface of the first electrode layer [3][column 7, lines 65-68, column 8, lines 1-4].
Okamoto et al. fails to disclose
the electrode layers including graphene and the insulation layers including hexagonal boron nitride (h-BN);
the first insulation layer including hexagonal boron nitride (h-BN);
the first electrode layer including graphene;
the second insulation layer including hexagonal boron nitride (h-BN);
the second electrode layer including graphene;
the third insulating insulation layer including hexagonal boron nitride (h-BN).
Woo et al. discloses in Fig. 1a,
the electrode layers [120/110] including graphene and the insulation layers [110/120] including hexagonal boron nitride (h-BN) [“a multi-layered structure in which different kinds of two-dimensional nanostructured materials such as graphene and hexagonal boron nitride are alternately stacked”…“The first material and the second material may be boron nitride, and more preferably, any one of the first material and the second material may be graphene. Here, the first material layer 110 and the second material layer 120”… “the multi-layer structure may include a graphene layer 110 and a hexagonal boron nitride layer 120 that are sequentially disposed”].
Sato et al. discloses in Fig. 6B, Fig. 7A, Fig. 15, paragraph [0053], [0064]
the electrode layers [11] including graphene and the insulation layers [17] including hexagonal boron nitride (h-BN);
the first insulation layer [first layer 17] including hexagonal boron nitride (h-BN);
the first electrode layer [first layer 11] including graphene;
the second insulation layer [second layer 17] including hexagonal boron nitride (h-BN);
the second electrode layer [second layer 11] including graphene;
the third insulating insulation layer [third layer 17] including hexagonal boron nitride (h-BN).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Woo et al. and Sato et al. into the method of Okamoto et al. to include the electrode layers including graphene and the insulation layers including hexagonal boron nitride (h-BN); the first insulation layer including hexagonal boron nitride (h-BN); the first electrode layer including graphene; the second insulation layer including hexagonal boron nitride (h-BN); the second electrode layer including graphene; the third insulating insulation layer including hexagonal boron nitride (h-BN). The ordinary artisan would have been motivated to modify Okamoto et al. in the above manner for the purpose of providing suitable alternative materials of the electrode layers and the insulation layers to form a high-performance composite having excellent physical properties and exhibiting high electron mobility.
Okamoto et al., Sato et al. and Woo et al. fail to disclose
removing the portion of the second electrode layer through the reactive ion etching (RIE) process using hydrogen plasma;
wherein the reactive ion etching (RIE) process includes oxygen plasma.
Okamoto et al. discloses in column 5, lines 41-44, removing the portion of the second electrode layer exposed in the opening through a plasma etching using a gas containing oxygen [(CCl4 +O2) gas].
Sato et al. and Woo et al. disclose
the second electrode layers including graphene.
Shegai et al. discloses in paragraph [0006]
removing the portion of the second electrode layer including graphene through a reactive ion etching (RIE) process using hydrogen plasma; wherein the reactive ion etching (RIE) process includes oxygen plasma [“a method of anisotropic dry etching of graphene using sequential oxygen and hydrogen plasma was reported.”]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Shegai et al. into the method of Okamoto et al., Sato et al. and Woo et al. to include removing the portion of the first electrode layer through a reactive ion etching (RIE) process using hydrogen plasma; wherein the reactive ion etching (RIE) process includes oxygen plasma. The ordinary artisan would have been motivated to modify Okamoto et al., Sato et al. and Woo et al. in the above manner for the purpose of providing suitable method for removing a portion of the graphene layer [paragraph [0006] of Shegai et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 23, Okamoto et al. discloses in column 7, lines 60-64
wherein the etching gas includes xenon difluoride (XeF2), carbon tetrafluoride (CF4) or sulfur hexafluoride (SF6) [CF4].
Regarding claim 24, Okamoto et al. discloses column 5, lines 41-44, etching the third insulation layer [6] using the etching gas including fluorine (F) to expose the portion of the upper surface of the second electrode layer. Sato et al. and Woo et al. disclose the second electrode layer including graphene. Thus, etching the third insulation layer [6] using the etching gas including fluorine (F) as disclosed by Okamoto et al. to expose the upper surface of the second electrode layer including graphene as suggested by Sato et al. and Woo et al. would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer”.
Regarding claims 25-26, Okamoto et al. discloses in Fig. 2B, column 5, lines 39-44
wherein the second electrode layer [5] serves as an etch stop layer in the first dry etching process [“The insulating layer 9, the conductive layer 8, the insulating layer 6 and the conductive layer 5 are selectively and serially etched”];
wherein the second insulation layer [4] is not removed in the first dry etching process.
Regarding claim 27, Okamoto et al. discloses column 5, lines 41-44, etching the third insulation layer [6] using the etching gas including fluorine (F) to expose the portion of the upper surface of the second electrode layer. Sato et al. and Woo et al. disclose the second electrode layer including graphene. Thus, etching the third insulation layer [6] using the etching gas including fluorine (F) as disclosed by Okamoto et al. to expose the upper surface of the second electrode layer including graphene as suggested by Sato et al. and Woo et al. would result to “wherein etching the third insulation layer includes forming fluorinated graphene through a reaction between the fluorine (F) included in the etching gas and the second electrode layer, and the fluorinated graphene serves as an etch stop layer in the first dry etching process.” “Where the claimed and prior art products …are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).”
Regarding claim 33, Okamoto et al. discloses in Fig. 3B
wherein the contact plug [11] extends through the second electrode layer [5].
Claims 29 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto et al. (US Pat. 4977105) in view of Sato et al. (US Pub. 20200152817), Woo et al. (KR101436849B1) and Kondo et al. (US Pub. 20120199815) as applied to claim 1 above and further in view of Woo et al. (US Pat. 5262352), hereafter Woo352.
Regarding claims 29 and 31, Okamoto et al. fails to disclose
wherein the second electrode layer contacts a side surface of the contact plug;
wherein the contact plug is electrically connected to the first electrode layer and the second electrode layer.
Woo352 discloses in Fig. 11, column 8, lines 16-23
wherein the second electrode layer [30] contacts a side surface of the contact plug [38];
wherein the contact plug [38] is electrically connected to the first electrode layer [26] and the second electrode layer [30].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Woo352 into the method of Okamoto et al. to include wherein the second electrode layer contacts a side surface of the contact plug; wherein the contact plug is electrically connected to the first electrode layer and the second electrode layer. The ordinary artisan would have been motivated to modify Okamoto et al. in the above manner for the purpose of providing alternative configuration of interconnection structure [column 8, lines 16-23 of Woo352].
Claims 32 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto et al. (US Pat. 4977105) in view of Sato et al. (US Pub. 20200152817), Woo et al. (KR101436849B1) and Shegai et al. as applied to claim 22 above and further in view of Woo et al. (US Pat. 5262352), hereafter Woo352.
Regarding claims 32 and 34, Okamoto et al. fails to disclose
wherein the second electrode layer contacts a side surface of the contact plug;
wherein the contact plug is electrically connected to the first electrode layer and the second electrode layer.
Woo352 discloses in Fig. 11, column 8, lines 16-23
wherein the second electrode layer [30] contacts a side surface of the contact plug [38];
wherein the contact plug [38] is electrically connected to the first electrode layer [26] and the second electrode layer [30].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Woo352 into the method of Okamoto et al. to include wherein the second electrode layer contacts a side surface of the contact plug; wherein the contact plug is electrically connected to the first electrode layer and the second electrode layer. The ordinary artisan would have been motivated to modify Okamoto et al. in the above manner for the purpose of providing alternative configuration of interconnection structure [column 8, lines 16-23 of Woo352].
Response to Arguments
Applicant’s arguments with respect to claims 1-5, 21-34 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made FINAL.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893
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