DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 11-12, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang, et al., Non-Patent Literature “Quantum State Preparation with Optimal Circuit Depth: Implementations and Applications” (“Zhang”) in view of Bergholm, et al., Non-Patent Literature “Quantum circuits with uniformly controlled one-qubit gates” (“Bergholm”) and further in view of Delfosse, et al., US Pre-Grant Publication 2022/0198311A1 (“Delfosse”).
Regarding claim 1, Zhang discloses:
A method for generating a quantum state preparation circuit,…, (Zhang, pg. 1 col. 1, “The speed limit of quantum state preparation is a question with fundamental and practical interests, determining the efficiency of inputting classical data into a quantum computer [A method for generating a quantum state preparation circuit, executed by a computer device,].”).
and comprising: configuring, based on one or more parameters of the quantum state preparation circuit, an input register for the quantum state preparation circuit and determining a number of auxiliary quantum bits; (Zhang, pg. 1 col. 2, “Without loss of generality, the task of quantum state preparation is to prepare j𝜓i from an initial product state j0i 𝑛 [an input register for the quantum state preparation circuit] using single-and two-qubit gates [and comprising: configuring, based on one or more parameters of the quantum state preparation circuit,]. We have the following result. Theorem 1 (Arbitrary quantum state preparation). With only single-and two-qubit gates, an arbitrary 𝑛-qubit quantum state can be deterministically prepared with a circuit depth Θ¹𝑛º and 𝑂¹𝑁º ancillary qubits [and determining a number of auxiliary quantum bits;].”).
configuring a copy register and a target register for the quantum state preparation circuit according to the number of the auxiliary quantum bits; (Zhang, pg. 2 col. 1, “We perform partial fanout; partial fanout is interpreted as copying qubits (i.e. configuring a copy register) [Fig. 1(c)] (with parameters determined by the coefficients 𝑎𝑘 of the target state j𝜓i) layer-by-layer from the root of 𝐻 [and a target register for the quantum state preparation circuit according to the number of the auxiliary quantum bits;].”).
obtaining a diagonal unitary matrix quantum circuit by performing circuit construction through the input register, the copy register, and the target register…; (Zhang, pg. 2 col. 1, “We perform partial fanout [through the input register, the copy register,] [Fig. 1(c)] (with parameters determined by the coefficients 𝑎𝑘 of the target state j𝜓i [and the target register…;]) layer-by-layer from the root of 𝐻. At the 𝑙th step, if a node at 𝐻𝑙1 is at state j1i, we flip one of its children in a superposition way. After 𝑛 steps, each layer of 𝐻 has exactly one excitation (qubit at state j1i), and the parent of an excitation is also an excitation. Following by one layer of single qubit phase gates [obtaining a diagonal unitary matrix quantum circuit by performing circuit construction] on all leaves”).
While Zhang teaches a quantum state preparation circuit with multiple supplementary qubits, Zhang does not explicitly teach:
…executed by a computer device…
…according to a quantum bit copy mode, the quantum bit copy mode being obtained based on a grid restriction condition…
combining the diagonal unitary matrix quantum circuit and a single bit quantum gate to obtain at least one uniformly controlled gate circuit corresponding to the diagonal unitary matrix quantum circuit;
and generating the quantum state preparation circuit based on the at least one uniformly controlled gate circuit.
Delfosse teaches …executed by a computer device… (Delfosse, claim 15, “One or more tangible computer-readable storage media storing computer-executable instructions for executing a computer process, the computer process comprising: […executed by a computer device…]”).
Zhang and Delfosse are both in the same field of endeavor (i.e. quantum circuits). It would have been obvious for a person having ordinary skill in the art before the effective filing date of the claimed invention to combine Zhang and Delfosse to teach the above limitation(s). The motivation for doing so is that a computer and its components are required in order to provide classical information to the quantum circuit.
Delfosse further teaches …according to a quantum bit copy mode, the quantum bit copy mode being obtained based on a grid restriction condition… (Delfosse, ⁋82, “Using the bridge ancilla qubits discussed above with respect to FIGS. 7B and 8A, column-based and row-based measurement gadgets can be constructed and used to copy the total parity of a set of target data qubits to a readout qubit […according to a quantum bit copy mode,]. To accomplish the forgoing in a minimum-depth circuit implementation, the measurement circuit and associated product graph 800 is split into two subcircuits—one for the X stabilizers and one for the Z stabilizers.”, and Delfosse, ⁋20, “As used herein, a quantum circuit is said to provide local 2D connectivity when the circuit includes a 2D grid of qubits that limits multi-qubit operations [the quantum bit copy mode being obtained based on a grid restriction condition…] (e.g., gates) to pairs of nearest-neighboring qubits.”).
Zhang and Delfosse are both in the same field of endeavor (i.e. quantum circuits). It would have been obvious for a person having ordinary skill in the art before the effective filing date of the claimed invention to combine Zhang and Delfosse to teach the above limitation(s). The motivation for doing so is that copying bits as stabilizer measurements ensures the accuracy of the qubits (cf. Delfosse, ⁋25, “When the stabilizer measurement outcomes change, this corresponds to one or more qubit errors in the quantum state that are projected by the measurement. The outcome is either 0 (trivial) or 1. If the outcome of a measurement is 1, this indicates the presence of an error on the data qubits measured.”).
While Zhang in view of Delfosse teaches a quantum state preparation circuit with multiple supplemental qubits and copied qubits, the combination does not explicitly teach:
combining the diagonal unitary matrix quantum circuit and a single bit quantum gate to obtain at least one uniformly controlled gate circuit corresponding to the diagonal unitary matrix quantum circuit;
and generating the quantum state preparation circuit based on the at least one uniformly controlled gate circuit.
Bergholm teaches:
combining the diagonal unitary matrix quantum circuit and a single bit quantum gate to obtain at least one uniformly controlled gate circuit corresponding to the diagonal unitary matrix quantum circuit; (Bergholm, pg. 2 col. 2, “The main difference between the presented construction and the original quantum multiplexor [9] is that we can effect the multiplexing operation using a fixed diagonal gate D [corresponding to the diagonal unitary matrix quantum circuit;] between the one-qubit gates. The tradeoff is an additional diagonal gate R trailing the multiplexor. The advantage of the proposed construction is that the fixed gate D can be implemented using a single CNOT [combining the diagonal unitary matrix quantum circuit and a single bit quantum gate to obtain at least one uniformly controlled gate circuit], and in many applications the R gate can be eliminated by merging it with an adjacent gate.”).
and generating the quantum state preparation circuit based on the at least one uniformly controlled gate circuit. (Bergholm, abstract, “We illustrate the versatility of these gates by applying them to the decomposition of a general n-qubit gate and a local state preparation procedure [and generating the quantum state preparation circuit based on the at least one uniformly controlled gate circuit.].”).
Zhang, in view of Delfosse, and Bergholm are both in the same field of endeavor (i.e. quantum circuits). It would have been obvious for a person having ordinary skill in the art before the effective filing date of the claimed invention to combine Zhang, in view of Delfosse, and Bergholm to teach the above limitation(s). The motivation for doing so is that using a uniformly controlled gate circuit reduces computational overhead (cf. Bergholm, pg. 1 col. 2, “The obtained quantum circuits are quite compact; in terms of the number of CNOTs involved, the general gate decomposition is brought on par with the most efficient currently known general gate decomposition [9] and somewhat surpasses it in the number of one-qubit gates, whereas the gate counts required to implement the state preparation circuit are halved compared to the previous implementations [9, 10].”).
Regarding claim 2, Zhang in view of Delfosse and Bergholm teaches the method according to claim 1. Delfosse further teaches wherein: the quantum bit copy mode comprises column copying of quantum bits under the grid restriction condition to obtain a column copy result, and row copying based on the column copy result. (Delfosse, ⁋82, Using the bridge ancilla qubits discussed above with respect to FIGS. 7B and 8A, column-based and row-based measurement gadgets can be constructed and used to copy the total parity of a set of target data qubits to a readout qubit [wherein: the quantum bit copy mode comprises column copying of quantum bits under the grid restriction condition to obtain a column copy result, and row copying based on the column copy result.].”, and Delfosse, ⁋20, “As used herein, a quantum circuit is said to provide local 2D connectivity when the circuit includes a 2D grid of qubits that limits multi-qubit operations [under the grid restriction condition] (e.g., gates) to pairs of nearest-neighboring qubits.”).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the present application to combine the teachings of Delfosse with the teachings of Zhang and Bergholm for the same reasons disclosed in claim 1.
Regarding claim 11, the claim is similar to claim 1. Delfosse teaches the additional limitations the apparatus comprising: a memory storing instructions; and a processor in communication with the memory, wherein, when the processor executes the instructions, the processor is configured to cause the apparatus to perform: (Delfosse, ⁋110, “The classical computing system 901 further includes one or more storage devices 930 such as a hard disk drive for reading from and writing to a hard disk, a magnetic disk drive for reading from or writing to a removable magnetic disk, and an optical disk drive for reading from or writing to a removable optical disk (such as a CD-ROM or other optical media). Such storage devices can be connected to the system bus 906 by a hard disk drive interface, a magnetic disk drive interface, and an optical drive interface, respectively. The drives and their associated computer readable media provide nonvolatile storage of computer-readable instructions [the apparatus comprising: a memory storing instructions; and a processor in communication with the memory, wherein, when the processor executes the instructions, the processor is configured to cause the apparatus to perform:]”).
Zhang and Delfosse are both in the same field of endeavor (i.e. quantum circuits). It would have been obvious for a person having ordinary skill in the art before the effective filing date of the claimed invention to combine Zhang and Delfosse to teach the above limitation(s). The motivation for doing so is that a computer and its components are required in order to provide classical information to the quantum circuit.
Regarding claim 12, the claim is similar to claim 2 and rejected under the same rationales.
Regarding claim 17, the claim is similar to claim 1. Delfosse teaches the additional limitations A non-transitory computer-readable storage medium, storing computer-readable instructions, wherein, the computer-readable instructions, when executed by a processor, are configured to cause the processor to perform: (Delfosse, claim 15, “One or more tangible computer-readable storage media storing computer-executable instructions for executing a computer process, the computer process comprising: [A non-transitory computer-readable storage medium, storing computer-readable instructions, wherein, the computer-readable instructions, when executed by a processor, are configured to cause the processor to perform:]”).
Zhang and Delfosse are both in the same field of endeavor (i.e. quantum circuits). It would have been obvious for a person having ordinary skill in the art before the effective filing date of the claimed invention to combine Zhang and Delfosse to teach the above limitation(s). The motivation for doing so is that a computer and its components are required in order to provide classical information to the quantum circuit.
Regarding claim 18, the claim is similar to claim 2 and rejected under the same rationales.
Allowable Subject Matter
Claims 3-10, 13-16, and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for indication of allowable subject matter:
Regarding claim 3, Below are the closest cited references, each of which disclose various aspects of the claimed invention:
Sawae, et al., “Gray Code and the Initialization Problem of NMR Quantum Computers” teaches a system that initializes quantum states for a quantum circuit using Gray codes to swap between varying quantum bit states. However, even though Sawae teaches a using Gray codes for quantum states, Sawae does not explicitly teach or mention any indication of splitting an input register into a prefix and suffix quantum bits and then performing Gray initialization on the prefix and suffix portions.
Matteo, et al., “Improving Hamiltonian encodings with the Gray code” teaches a system for encoding Hamiltonian quantum states using Gray code encodings. The Gray code encoding allows a variational quantum eigensolver to use fewer qubits during encoding Hamiltonians. However, even though Matteo teaches using Gray code for simplifying Hamiltonian encodings, Matteo does not explicitly teach or mention any indication of splitting an input register into a prefix and suffix quantum bits and then performing Gray initialization on the prefix and suffix portions.
Mottonen, et al., “Quantum Circuits for General Multiqubit Gates” teaches a system that synthesizes the gate sequence of a quantum circuit using cosine-sine decomposition and Gray codes. However, even though Mottonen teaches using binary Gray codes for bit flips, Mottonen does not explicitly teach or mention any indication of splitting an input register into a prefix and suffix quantum bits and then performing Gray initialization on the prefix and suffix portions.
While the above prior arts disclose the aforementioned concepts, however, none of the prior arts, individually or in reasonable combination, discloses all the limitations in the manner recited in claim 3. Specifically, the claim recites:
“input register comprises a prefix-part quantum bit and a suffix-part quantum bit; and the obtaining the diagonal unitary matrix quantum circuit by performing circuit construction through the input register, the copy register and the target register according to the quantum bit copy mode comprises: copying the suffix-part quantum bit in the input register according to the quantum bit copy mode to copy the suffix-part quantum bit into the copy register, so as to obtain a suffix copy stage circuit, obtaining a Gray initialization stage circuit by performing Gray initialization processing on the suffix-part quantum bit in the copy register and the target register, copying the prefix-part quantum bit in the input register according to the quantum bit copy mode to copy the prefix-part quantum bit into the copy register, so as to obtain a prefix copy stage circuit, obtaining a Gray path stage circuit by performing Gray path processing on the prefix-part quantum bit in the copy register and the target register, obtaining an inversion processing stage circuit by performing inversion processing based on the suffix copy stage circuit, the Gray initialization stage circuit, the prefix copy stage circuit, and the Gray path stage circuit, and obtaining the diagonal unitary matrix quantum circuit based on the suffix copy stage circuit, the Gray initialization stage circuit, the prefix copy stage circuit, the Gray path stage circuit and the inversion processing stage circuit.”
While the references cited above mention aspects of using Gray code initialization for quantum circuits, they do not recite the specific steps of creating separate prefix and suffix circuit stages for qubits as well as applying a Gray code algorithm on top of the separate circuit stages as required by claim 3. Therefore, claim 3 is allowable over the prior art.
Regarding claims 4-10, the claims are also considered allowable over the prior art at least by virtue of their dependence to claim 3.
Regarding claims 13-16, claim 13 is similar to claim 3 and allowable over the prior art for the same reasons as claim 3. Dependent claims 14-16 are also considered allowable over the prior art at least by virtue of their dependence to claim 13.
Regarding claims 19-20, claim 19 is similar to claim 3 and allowable over the prior art for the same reasons as claim 3. Dependent claim 20 is also considered allowable over the prior art at least by virtue of its dependence to claim 19.
Conclusion
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/N.S.W./Examiner, Art Unit 2148 /MICHELLE T BECHTOLD/Supervisory Patent Examiner, Art Unit 2148