Prosecution Insights
Last updated: April 19, 2026
Application No. 18/200,314

GRAPHENE INTEGRATED CORE AND ASSOCIATED METHODS FOR THERMAL MANAGEMENT WITHIN PRINTED CIRCUIT BOARDS

Non-Final OA §103§112
Filed
May 22, 2023
Examiner
PATEL, RONAK C
Art Unit
1788
Tech Center
1700 — Chemical & Materials Engineering
Assignee
BAR ILAN UNIVERSITY
OA Round
1 (Non-Final)
50%
Grant Probability
Moderate
1-2
OA Rounds
3y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allow Rate
326 granted / 645 resolved
-14.5% vs TC avg
Strong +57% interview lift
Without
With
+56.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
56 currently pending
Career history
701
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
70.1%
+30.1% vs TC avg
§102
6.9%
-33.1% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 645 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of Group I claims 11-20 in the reply filed on 12/10/2025 is acknowledged. The traversal is on the ground(s) that the method of Group I recites "applying a graphene multi-layer to the core body to form a laminated stack, wherein the graphene multi-layer has a graphene multi-layer length that is shorter than the core body length." (Emphasis added.) Respectfully, applying a graphene multi-layer to the core body cannot result in a carbon nanotube integrated core. This is not found persuasive because carbon nanotube integrated core can be made from the same method with instead of graphene multi-layer it is made with multi-walled carbon nanotube and applying it to core body forming carbon nanotube integrated core as both graphene and carbon nanotube have similar properties and are equivalent and interchangeable. The requirement is still deemed proper and is therefore made FINAL. Claims 1-10 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected claims, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/10/2025. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 20 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 20 which recites, thickness to be “approximately” one nanometer and two microns, however, the term “approximately” is indefinite because the claim does not specify acceptable degree of variation from stated values. It is unclear what range of thicknesses would be considered “approximately” 1 nm or two microns. Clarification is requested. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 11-13, 15-16, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Chang et al. (US 2021/0100090). Regarding claims 11-13, 19 Chang discloses heat dissipating device is provided with a first glue layer, a first graphene composite heat dissipating layer, a second glue layer, a second graphene composite heat dissipating layer, and a resin layer in this order from bottom to top (abstract). The first glue layer corresponds to the core body having a core body length of the present invention. The first glue layer 202 and the second glue layer 206 can be a silica gel double-sided adhesive, a PET double-sided adhesive (para 0029). Chang discloses the first glue layer 202 is disposed on the circuit board 10. The first graphene composite heat dissipating layer 204 is jointed to the first glue layer 202. The second glue layer 206 is jointed to the first graphene composite heat dissipating layer 204. The second graphene composite heat dissipating layer 208 is jointed to the second glue layer 206 (para 0023), where graphene layers 204 and 208 corresponds graphene multilayer whose length is shorter than the core body length (see figure 1). Chang discloses a metal layer 212 further covers the first graphene composite heat dissipating layer 204 and the second graphene composite heat dissipating layer 208, respectively. The material of the metal layer 212 can be selected from various metals such as copper or aluminum (para 0023), where the metal layer 212 made of copper or aluminum corresponds to conductive layer of the present invention. As Chang discloses graphene multilayer integrated in the core body having a conductive metal layer and a glue layer comprising silica gel as presently claimed, it therefore would be obvious that graphene multilayer would be electrically insulated from at least one conductive layer as silica gel is well known insulating material. With respect to the process limitation of laminated stack, Although Chang does not disclose multilayer graphene bonded to core body by lamination, it is noted that “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process”, In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) . Further, “although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product”, In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir.1983). See MPEP 2113. Therefore, absent evidence of criticality regarding the presently claimed process and given that Chang meets the requirements of the claimed product, Chang clearly meet the requirements of present claim graphene integrated core comprising graphene multi-layer applied to core body. Regarding claims 15-16, Chang discloses in FIG. 4, which shows a schematic diagram of installing the heat dissipating device according an embodiment of the present invention. A heat dissipating member 302 is disposed on the motherboard 30. When the heat dissipating device 20 is disposed on the circuit board 10 and the circuit board 10 is installed on the motherboard 30, the heat dissipating member 302 is attached to the heat dissipating device 20 (para 0028), as seen in figure 4, there is a connecting layer between 2 heat dissipating member 20, where both heat dissipating device 20 comprises graphene-dielectric structures. Claim(s) 11-12, 14, 17-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al. (KR 2012/0047107). Regarding claims 11-12 and 14, Hwang discloses first conductive semiconductor layer (20) is formed on a substrate (10). An active layer (30) is formed on the first conductive semiconductor layer. A graphene layer (40) having a photonic crystal structure is formed on the active layer. The photonic crystal structure includes a plurality of graphene posts which is periodically arranged. A second conductive semiconductor layer (50) is formed on the graphene layer (abstract, see figure 1), where graphene multilayer 40 applied to the core body active layer 30 would meet the limitation of graphene integrated core, where the graphene multilayer length is shorter than the core body length (see figure 1). The second conductive semiconductor layer (50) is formed on the graphene layer which corresponds to the conductive layer of present invention. The active layer 30 can be multi-quantum well layer in which a quantum barrier layer and a quantum well layer is stacked (page 2-3). As Hwang discloses graphene multilayer integrated in the core body having a conductive layer and an quantum well layer as an active layer as presently claimed, it therefore would be obvious that graphene multilayer would electrically insulated from at least one conductive layer as quantum materials are known to have insulation properties. With respect to the process limitation of laminated stack, Although Hwang does not disclose multilayer graphene bonded to core body by lamination, it is noted that “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process”, In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) . Further, “although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product”, In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir.1983). See MPEP 2113. Therefore, absent evidence of criticality regarding the presently claimed process and given that Hwang meets the requirements of the claimed product, Hwang clearly meet the requirements of present claim graphene integrated core comprising graphene multi-layer applied to core body. Regarding claims 17-18, Hwang discloses first conductive semiconductor layer (20) is formed on a substrate (10). An active layer (30) is formed on the first conductive semiconductor layer. A graphene layer (40) having a photonic crystal structure is formed on the active layer. The photonic crystal structure includes a plurality of graphene posts which is periodically arranged. A second conductive semiconductor layer (50) is formed on the graphene layer (abstract, see figure 1), where graphene multilayer 40 applied to the core body active layer 30 would meet the limitation of graphene integrated core, where the graphene multilayer length is shorter than the core body length (see figure 1). The second conductive semiconductor layer (50) is formed on the graphene layer which corresponds to the conductive layer disposed on the outer surface of the core and first conductive layer 20 corresponds to conductive layer disposed on an inner surface of via formed through graphene integrated core. Regarding claim 20, Hwang discloses graphene (graphene) forming the graphene layer 40 is a conductive material having a thickness of, for example, about 0.34 nm (page 3, para 3), where 0.34 nm meets the limitation of thickness of approximately 1 nm. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RONAK C PATEL whose telephone number is (571)270-1142. The examiner can normally be reached M-F 8:30AM-6:30PM (FLEX). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALICIA CHEVALIER can be reached at 5712721490. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RONAK C PATEL/ Primary Examiner, Art Unit 1788
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Prosecution Timeline

May 22, 2023
Application Filed
Jan 10, 2026
Non-Final Rejection — §103, §112
Apr 07, 2026
Applicant Interview (Telephonic)
Apr 13, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
50%
Grant Probability
99%
With Interview (+56.7%)
3y 8m
Median Time to Grant
Low
PTA Risk
Based on 645 resolved cases by this examiner. Grant probability derived from career allow rate.

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