Prosecution Insights
Last updated: April 19, 2026
Application No. 18/200,446

BATTERY MONITORING TECHNIQUES

Final Rejection §103§112
Filed
May 22, 2023
Examiner
EDWARDS, ETHAN WESLEY
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Analog Devices International Unlimited Company
OA Round
2 (Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
3y 1m
To Grant
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
10 granted / 13 resolved
+8.9% vs TC avg
Strong +30% interview lift
Without
With
+30.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
33 currently pending
Career history
46
Total Applications
across all art units

Statute-Specific Performance

§101
24.9%
-15.1% vs TC avg
§103
41.8%
+1.8% vs TC avg
§102
4.1%
-35.9% vs TC avg
§112
26.6%
-13.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 13 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments filed 20 December 2025 have been fully considered. Claims 1-20 remain pending. Claims 9, 12, and 18-20 have been amended. Applicant’s efforts to amend the specification are persuasive, therefore all objections to the specification are withdrawn. Applicant’s efforts to amend the claims to address claim objections are persuasive, therefore all claim objections are withdrawn. Applicant’s arguments regarding the eligibility of the claims under 35 U.S.C. 101 have been considered and are persuasive, therefore all 101 rejections are withdrawn. In particular, the examiner agrees that determining self-discharge rate is a particular and practical application of the recited judicial exceptions. Applicant’s efforts to amend the claims to address rejections under 35 U.S.C. 112(b) are persuasive. However, the applicant’s arguments regarding the rejection of claims 3 and 20 are not persuasive. Under broadest reasonable interpretation, the language of claim 1 can be interpreted as requiring that only one length of time be determined. While the specification suggests determining multiple lengths of time, the examiner should not unduly narrow the scope of the claims by giving improper weight to the specification. (See MPEP § 2111.) See 112(b) rejections below. Applicant’s arguments regarding the rejection of claims 1-7, 9, and 11-20 under 35 U.S.C. 103 over the prior art have been considered. Applicant argues that the Office action has not cited any reference which discloses or suggests a processor which is configured to “determine a length of time at which corresponding ones of the digital codes remain" and "determine the self-discharge rate of the at least one battery cell using the determined length of time.” The examiner agrees that no reference cited discloses this but disagrees that the combination of references would not suggest this. Reeder teaches that ADC outputs a discretized signal while Zhang teaches that measuring a battery’s self-discharge rate may take a long time (see page 10 of the Office action). In the context of Fasching using an ADC to measure a battery’s self-discharge rate, one of ordinary skill in the art would recognize in these teachings that ADC outputs would decrease in step-wise fashion over periods of time larger than the sampling rate of the battery’s open circuit voltage (OCV). One would also be motivated to estimate how long measurements need to be taken to estimate self-discharge rate with some level of certainty. To do so, one would be motivated to determine how long a particular code remains (e.g. 10 hours), then extrapolate to an estimated amount of time required for the OCV values to drop appreciably and enable one to make a measurement of self-discharge rate with a desired amount of certainty. The examiner relied upon Reeder and Fasching because they explicitly teach the basic information necessary for this reasoning, although the examiner believes that a person of ordinary skill in the art would already understand these teachings. The examiner disagrees that the motivation for modifying the combination of references to fit the claim language relies on hindsight reasoning. In particular, the examiner’s argument motivates a scenario in which one of ordinary skill in the art determines the persistence of a particular code in order to extrapolate how long a measurement process will need to take using conventional methods. This scenario does not require the person to recognize or perform the inventive concept. The examiner understands the inventive concept to be a recognition of the value of estimating the mean time for which a particular code stays up, accounting for fluctuations in ADC output, in order to estimate a time at which the true OCV of a battery is equal to the ADC’s output, and to perform such an estimation for two or more unique code values to determine a battery’s self-discharge rate more quickly and accurately than would be possible using the same technology and conventional measurement methods. However, satisfying the claim language does not require one to perform all of the steps of the inventive concept. For example, claim 1 requires only that a processor “determine a length of time at which corresponding ones of the digital codes remain.” Nothing in the claim language requires one to e.g. determine a length of time for which an ADC code is output accounting for fluctuations in output. Therefore, one of ordinary skill in the art performing the scenario given above would meet the claim language. Applicant argues that the Office’s scenario would require one of ordinary skill to: conceive of measuring code persistence duration; recognize that this measurement could be used to predict required sampling time; and further recognize that this information could be used to improve discharge rate determination. Again, referring to the scenario and combination of references described above, the examiner considers that one of ordinary skill in the art would be capable of 1. and 2. (though not 3.), though not for the same reasons which the applicant’s specification would suggest. Applicant further argues that simpler alternatives expose the hindsight nature of the rejection, then proposes an alternative which fairly aligns with the examiner’s scenario above. As explained above, the prior art referenced and the rationale given by the examiner for combining the references would satisfy the claim language without requiring one to recognize the inventive concept as described above. Therefore the rejection does not rely upon hindsight reasoning. Finally, Applicant has argued that the Office has not explained why one of ordinary skill would look to temporal code persistence patterns as a solution to measurement challenges. The examiner disagrees; in the scenario above, one of ordinary skill would determine a temporal code persistence in order to estimate how much time will be required for OCV measurements to enable one to calculate self-discharge rate with a desired level of certainty. This is not the same method of or reason for obtaining temporal code persistence as Applicant’s, but as previously argued the scenario meets the claim language. See 103 rejections below. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3, 9-10, and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 3 and 20 recite “the determined lengths of time,” however there is no antecedent basis for plural “lengths” of time. For examination purposes it will be assumed that “lengths” should be replaced with “length”. Claim 12 recites “the determined length of time for the first battery cell” and “the determined length of time for the second battery cell,” neither of which have antecedent basis. For examination purposes it will be assumed that “the determined length of time” should be replaced with “a determined length of time” in both instances. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 3, 11, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Fasching (US 11131717 B1) in view of Reeder (“Breaking down accuracy errors in a precision high-speed ADC signal chain”) and Zhang (US 20230366942 A1; provisional application 63/236,023, filed 23 August, 2021, discloses all the features of the patent application publication relied upon in the rejection below). Regarding claim 1, Fasching discloses a battery management system (Fig. 1B, battery pack controller 150 and node controllers 112, 122, 132) configured to determine a self-discharge rate of at least one battery cell (Column 17, lines 12-16: “battery pack controller 150 is configured to perform cell degradation analysis. This analysis may involve an estimate of the leakage current (or a rate of self-discharge) by monitoring the evolution of the cell voltage under open-circuit conditions over a period of time.”), the battery management system comprising: a processor (Fig. 1E, Battery pack controller 150 comprises a processor 155) configured to: receive digital codes representing voltage of the at least one battery cell; and determine the self-discharge rate of the at least one battery cell (Column 16, lines 1-2: “Processor 155 is also configured to determine leakage current, e.g., based on multiple OCV data points over time”). Fasching does not explicitly disclose an analog-to-digital converter (ADC) circuit coupled to the at least one battery cell and configured to receive an analog input signal representing a voltage of the at least one battery cell and generate digital codes representing the analog input signal at corresponding time intervals. However, Fasching does disclose an ADC (Column 15, lines 8-11: node controller 160 may comprise an ADC; Column 14, lines 59-63: the node controller 160 may represent one of those depicted in Fig. 1B). Since ADCs are common generic circuit elements for obtaining analog voltage signals and converting them into digital code to be processed by a processor, it would have been obvious to one of ordinary skill in the art to include an ADC coupled to the at least one battery cell and functioning to provide the digital codes to the processor. Noting the above, Fasching still does not explicitly disclose that the processor determines a length of time at which corresponding ones of the digital codes remain; and determines the self-discharge rate of the at least one battery cell using the determined length of time. Reeder teaches that an ADC outputs a discretized signal (see Fig. 4). Additionally, Zhang teaches that measuring a battery’s self-discharge rate may take a long time (¶5: “To determine the self-discharge rate, a battery's open-circuit voltage is measured, and then the battery is stored or aged for a period of time, which can be a period of days or weeks, after which the open-circuit voltage is measured again.”). Noting these teachings, measuring the rate of decay may take a long time. If the sampling rate is much smaller than the rate at which the voltage drops by at least one bit of the ADC, it would be important to let the ADC values drop by more than a couple of bits before calculating the rate of decay in order to reduce uncertainty in the rate of decay calculation. In order to do this, one would be motivated to determine a length of time at which a particular code remains, then multiply that time by some number so that the ADC values drop at least some minimum desired number of bits. This would ensure that the calculated rate of decay has an acceptable level of uncertainty. Since the determined length of time would be used to decide how much data should be taken to determine self-discharge rate, the determination of self-discharge rate which included this calculation would use the determined length of time as recited. For the above reasons, then, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Reeder and Zhang with the invention of Fasching by causing the processor to determine a length of time at which corresponding ones of the digital codes remain, and to determine the self-discharge rate of the at least one battery cell using the determined length of time. Regarding claim 13, claim 13 recites the same limitations contained in claim 1 and is rejected for the same reasons. Regarding claim 3, Fasching in view of Reeder and Zhang teaches the limitations of claim 1. Furthermore, Reeder discloses performing a linear regression technique to determine the self-discharge rate (Column 27, lines 51-54: “The OCV data is analyzed by battery pack controller 150. For example, a linear regression of the OCV data, which may be referred to as OCV(t), is performed.”), and it would have been obvious to one of ordinary skill in the art practicing the invention of Fasching in view of Reeder and Zhang to perform a linear regression technique of the received digital codes and the determined length of time in order to determine self-discharge rate. Regarding claim 11, Fasching in view of Reeder and Zhang teaches the limitations of claim 1. Fasching further discloses that the processor is configured to determine a leakage rate of the at least one battery cell (Column 1: lines 13-14: “Specifically, self-discharge is caused by an internal leakage current”). Claims 5-7 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Fasching (US 11131717 B1) in view of Reeder (“Breaking down accuracy errors in a precision high-speed ADC signal chain”) and Zhang (US 20230366942 A1), and further in view of Nonaka (JP 2003017139 A). Regarding claim 5, Fasching in view of Reeder and Zhang teaches the limitations of 1, but does not explicitly teach the limitations of claim 5. Nonaka teaches that the rate of self-discharge depends the state of charge (SOC) of a battery, which is the amount of charge remaining in a battery (¶9: “The remaining capacity of a lithium ion battery decreases even when the battery is left unused. This is a phenomenon called self-discharge, and the magnitude of this discharge depends on the remaining capacity, temperature, and the length of time the battery has been left unused”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Nonaka with the invention of Fasching in view of Reeder and Zhang by causing the battery management system to comprise a resistor coupled in series with a switching element, the resistor and switching element coupled in parallel across one of the battery cells, wherein the processor is configured to control operation of the switching element to increase a rate at which the battery cell discharges. By doing so, one might discharge a battery to different SOCs to determine how self-discharge rate varies with SOC. Regarding claim 18, claim 18 recites the limitations of claims 1 and 5, save that a battery management control circuit is described instead of a processor. This difference is not significant, since a processor which manages a battery can be described as a battery management control circuit. Therefore claim 18 is rejected for the reasoning used in the rejection of claims 1 and 5. Regarding claims 6 and 19, Fasching in view of Reeder and Zhang and Nonaka teaches the limitations of claims 5 and 18. Following the arguments for rejecting claim 5, it would have been obvious to one of ordinary skill in the art practicing the invention of Fasching in view of Reeder and Zhang and Nonaka to control the switching element using a pulsed pattern to switch between an open state and a closed state. This just describes the process of testing the self-discharge rate of a cell at different SOCs, where the circuit must be closed to bleed current from the cell to reach a new SOC. Regarding claim 7, Fasching in view of Reeder and Zhang and Nonaka teaches the limitations of claim 6. Following the reasoning for the rejection of claim 6, it would have been obvious to one of ordinary skill in the art practicing the invention of Fasching in view of Reeder and Zhang and Nonaka to cause the switching element to be in the open state while the processor performs the steps of receiving the digital codes; determining the length of time at which corresponding ones of the digital codes remain; and determining the self-discharge rate of the at least one battery cell using the determined length of time. This just describes determining self-discharge rate in the way described in claim 1 at some particular SOC. Regarding claim 20, claim 20 recites the same limitations as claim 3 and is rejected for the same reasons. Claims 2, 4, 9, and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Fasching (US 11131717 B1) in view of Reeder (“Breaking down accuracy errors in a precision high-speed ADC signal chain”) and Zhang (US 20230366942 A1), and further in view of Murakami (US 20160045141 A1). Regarding claims 2 and 14, Fasching in view of Reeder and Zhang teaches the limitations of claims 1 and 13 but does not explicitly teach the limitations of claims 2 and 14. Murakami teaches that time-averaging data is useful to remove noise (¶53: “to remove a noise component, the CPU 21 calculates an average value for a predetermined time, for example, an average value of data for several seconds”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Murakami with the invention of Fasching in view of Reeder and Zhang by causing the processor to perform, before determining the length of time at which corresponding ones of the digital codes remain, time averaging of the received digital codes to determine an average time at which corresponding ones of the digital codes were received. Doing so would enable one to reduce noise and have more confidence in one’s signal. Regarding claim 4, Fasching in view of Reeder and Zhang and Murakami teaches the limitations of claim 2. Consider the situation of measuring a slowly decaying voltage, where the measurement rate is much higher than the rate at which the ADC values change. One would be interested in determining Δ V / Δ t between any two adjacent ADC values. The average rate of change of a function f ( x ) over some interval [ a , b ] in x is defined as: f b - f a b - a Here, the function of interest is V ( t ) , and one would be interested in calculating ( V t b - V t a ) / ( t b - t a ) . The question arises of which values t b and t a should be chosen when calculating the rate of voltage decay between two stepwise decreases in voltage. Some natural choices would include times representing the start, middle, or end of each “step” of the initial and final ADC values used in the calculation. Therefore it would have been obvious to try representing each ADC “step” with the “middle” or “average” time representing each step. Then in the above calculation, the rate of self-discharge incorporates the duration between mean times of adjacent steps (i.e. t b - t a ). For the reasons above, then, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention practicing the invention of Fasching in view of Reeder and Zhang and Murakami to configure the processor to: for the plurality of digital codes, determine a mean or median time at which each digital code was received; and determine a duration between corresponding mean or median times of consecutive codes, wherein the processor configured to determine the self-discharge rate of the at least one battery cell using the determined length of time is configured to: determine the self-discharge rate of the at least one battery cell using the determined duration between the corresponding mean or median times of the consecutive codes. Regarding claims 15 and 16, these claims repeat limitations found in claim 4 and are therefore rejected for the same reasons. Regarding claim 9, Fasching in view of Reeder and Zhang and Murakami teaches the limitations of claim 4. Reeder further teaches that ADC measurements may deviate from ideal measurements due to gain, offset, and nonlinearity (pg. 5, paragraph under Fig. 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Reeder with the invention of Fasching in view of Reeder and Zhang and Murakami by configuring the processor to determine the self-discharge rate of the at least one battery cell using the determined duration between the mean or median times of the consecutive codes from a result of an outlier rejection technique. Doing so would enable one to remove unreliable data values before calculating self-discharge rate. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Fasching (US 11131717 B1) in view of Reeder (“Breaking down accuracy errors in a precision high-speed ADC signal chain”) and Zhang (US 20230366942 A1), and further in view of Hom (US 11217833 B1). Regarding claim 12, Fasching in view of Reeder and Zhang teaches the limitations of claim 1, but does not explicitly teach the limitations of claim 12. Note however that Fasching does disclose a battery with multiple cells (Abstract). Hom teaches a method of estimating self-discharge rate of cells of a battery (Abstract). As part of the invention, Hom teaches determining the self-discharge rates of multiple cells (see Fig. 9) and comparing the relative self-discharge rates between cells (Column 8, lines 27-29: “FIG. 9 shows that two cells—the cell at 410 and the cell at 465—have higher self-discharge rates (I.sub.SD) than the others.” Column 8, lines 33-34: “cell 410 appears to be only slightly higher than the general cell population.”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Hom with the invention of Fasching in view of Reeder and Zhang by causing the at least one battery cell to include a first battery cell and a second battery cell, and by configuring the processor to: determine a first self-discharge rate of the first battery cell and a second self- discharge rate of the second battery cell based on a determined length of time for the first battery cell and a determined length of time of the second battery cell (that is, using the method of claim 1 for each cell); and determine a relative self-discharge rate between the first battery cell and the second battery cell by comparing the first discharge rate and the second discharge rate. Doing so would enable one to compare the self-discharge rates of various cells to test which ones self-discharge the fastest and how quickly they discharge compared to a normal cell. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Fasching (US 11131717 B1) in view of Reeder (“Breaking down accuracy errors in a precision high-speed ADC signal chain”) and Zhang (US 20230366942 A1) and Murakami (US 20160045141 A1), and further in view of Nonaka (JP 2003017139 A). Regarding claim 17, Fasching in view of Reeder and Zhang and Murakami teaches the limitations of claim 14 but does not teach the limitations of claim 17. Nonaka teaches that the rate of self-discharge depends the state of charge (SOC) of a battery, which is the amount of charge remaining in a battery (¶9: “The remaining capacity of a lithium ion battery decreases even when the battery is left unused. This is a phenomenon called self-discharge, and the magnitude of this discharge depends on the remaining capacity, temperature, and the length of time the battery has been left unused”). Following the reasoning in the rejection of claims 5 and 6, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Nonaka with the invention of Fasching in view of Reeder and Zhang and Murakami by causing the battery management system to comprise a resistor coupled in series with a switching element, the resistor and switching element coupled in parallel across one of the battery cells, wherein the processor is configured to control operation of the switching element to increase a rate at which the battery cell discharges. By doing so, one might discharge a battery to different SOCs to determine how self-discharge rate varies with SOC. Furthermore, it would have been obvious to control the switching element using a pulsed pattern to switch between an open state and a closed state. This just describes the process of testing the self-discharge rate of a cell at different SOCs, where the circuit must be closed to bleed current from the cell to reach a new SOC. Examiner’s Note Claim 10 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Regarding claim 10, Fasching in view of Reeder and Zhang and Murakami teaches the limitations of claim 9. However, the prior art does not fairly suggest that the outlier rejection technique should include ignoring specific digital codes. Rather, the prior art suggests rejecting data values by comparison to other values received at other times and to an expected value (such as, for example, checking if a value is an outlier compared to other values collected in the same neighborhood of time). Therefore, claim 10 is distinguishable over the prior art of record. Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 8, Fasching in view of Reeder and Zhang and Nonaka teaches the limitations of claim 6. However, the prior art does not fairly suggest performing the steps performed by the processor as recited in claim 1 while the switching element is in the closed state, because self-discharge is typically considered the rate of discharge while a battery cell is disconnected from an external circuit. Therefore, claim 8 is distinguishable over the prior art of record. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ETHAN WESLEY EDWARDS whose telephone number is (571)272-0266. The examiner can normally be reached Monday - Friday, 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached at (571) 272-2302. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ETHAN WESLEY EDWARDS Examiner Art Unit 2857 /E.W.E./ Examiner, Art Unit 2857 /ANDREW SCHECHTER/ Supervisory Patent Examiner, Art Unit 2857
Read full office action

Prosecution Timeline

May 22, 2023
Application Filed
Sep 29, 2025
Non-Final Rejection — §103, §112
Dec 20, 2025
Response Filed
Feb 20, 2026
Final Rejection — §103, §112 (current)

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Expected OA Rounds
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Grant Probability
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3y 1m
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