Prosecution Insights
Last updated: April 19, 2026
Application No. 18/202,403

DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE

Non-Final OA §102§103
Filed
May 26, 2023
Examiner
AUTORE JR, MARIO ANDRES
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
1 (Non-Final)
58%
Grant Probability
Moderate
1-2
OA Rounds
3y 8m
To Grant
84%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allow Rate
21 granted / 36 resolved
-9.7% vs TC avg
Strong +26% interview lift
Without
With
+25.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
44 currently pending
Career history
80
Total Applications
across all art units

Statute-Specific Performance

§103
62.0%
+22.0% vs TC avg
§102
21.2%
-18.8% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 36 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on May 26th, 2023 has been received. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Election/Restrictions Applicant’s election without traverse of claims 1 – 14, drawn to a display device structure, in the reply filed on 09/08/2025 is acknowledged. Claim 15 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected method of making a display device structure, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 09/08/2025. Claim Objections Claims 4 – 5, 9, and 11 – 12 are objected to because of the following informalities: These claims include multiple instance of grammatical errors and misspelled words, e.g., “conntact”, “achiving”, “opverlapping”, and “the the first openging”. Appropriate correction is required. Rejections Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 8 and 13 – 14 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Kim et al. (US 20170243898 A1). Regarding independent claim 8, Kim teaches a display device comprising: an oxide semiconductor layer (Fig. 2; semiconductor layer SM and [0068] – [0069]); a gate electrode (Fig. 2; gate electrode GE) facing the oxide semiconductor layer (Fig. 2); a gate insulating layer (Fig. 2; second insulating layer 140) between the oxide semiconductor layer and the gate electrode (Fig. 2); a light-shielding layer (Fig. 2; light blocking pattern 120) overlapping part of the oxide semiconductor layer in a plan view (Fig. 1); a first insulating layer (Fig. 2; third insulating layer 150) covering the oxide semiconductor layer (Fig. 2), the gate electrode (Fig. 2), the first insulating layer including a first opening (Fig. 2; opening wherein connection electrode CNE is disposed) overlapping the light- shielding layer in a plan view (Figs. 1, 2, and 7); and a transparent conductive layer (Fig. 2; connection electrode CNE. See [0081]) arranged above the first insulating layer and connected to the oxide semiconductor layer via the first opening (Fig. 2), wherein the transparent conductive layer extends in a first direction from an area overlapping the light-shielding layer in a plan view beyond an end portion of the light-shielding layer and is separated from the end portion of the light-shielding layer (Figs. 1, 2, and 7), and an end portion of the first opening is positioned from the end portion of the light-shielding layer in the first direction side with respect to an end portion of the transparent conductive layer in a plan view (Figs. 1 and 2). Regarding dependent claim 13, Kim teaches the display device according to claim 8, wherein the first opening overlaps the light-shielding layer in an area larger than half of the first opening in a plan view (Kim: Fig. 7). Regarding dependent claim 14, teaches the display device according to claim 8, wherein the light-shielding layer protrudes in the first direction in an area overlapping the first opening in a plan view (Kim: Fig. 7). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1 – 2, 5 – 7, 9, and 12 and are rejected under 35 U.S.C. 103 as being unpatentable over by Kim et al. (US 20170243898 A1), further in view of Na et al. (US 20140138772 A1). Regarding independent claim 1, Kim teaches a display device comprising: an oxide semiconductor layer (Fig. 2; semiconductor layer SM and [0068] – [0069]); a gate electrode (Fig. 2; gate electrode GE) facing the oxide semiconductor layer (Fig. 2); a gate insulating layer (Fig. 2; second insulating layer 140) between the oxide semiconductor layer and the gate electrode (Fig. 2); a light-shielding layer (Fig. 2; light blocking pattern 120) overlapping part of the oxide semiconductor layer in a plan view (Fig. 1); a first insulating layer (Fig. 2; third insulating layer 150) covering the oxide semiconductor layer (Fig. 2), the gate electrode (Fig. 2), and the gate insulating layer (Fig. 2), the first insulating layer including a first opening (Fig. 2; opening wherein connection electrode CNE is disposed) including a first side wall overlapping the light-shielding layer and … a transparent conductive layer (Fig. 2; connection electrode CNE. See [0081]) arranged above the first insulating layer and connected to the oxide semiconductor layer via the first opening (Fig. 2), wherein the transparent conductive layer is arranged in an area overlapping the first side wall in a plan view (Fig. 2), and the transparent conductive layer is not arranged in at least part in an area overlapping the second side wall in a plan view (Fig. 2). However, Kim remains silent regarding the display device wherein the first insulating layer includes: … a second side wall not overlapping the light-shielding layer in a plan view; and … However, in the same field of endeavor, Na teaches a drain electrode 174 connected to a pixel electrode, similar to the instant transparent conductive layer and Kim’s connection electrode CNE. Further, Na teaches that the contact hole 168, wherein Na’s drain electrode 174 is disposed, includes a sidewall overlapping the light blocking member 124 (Fig. 1; light blocking member 124 and [0038]. Examiner is considering the light blocking member 124 to be analogous to the instant light-shielding layer), and a sidewalls not overlapping the light blocking member 124 (Fig. 1). Thus, examiner asserts that it would be trivial to modify Kim’s display device in a way such that Na’s feature wherein the first opening including a second side wall not overlapping the light-shielding layer in a plan view may be implemented. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify Kim’s transistor structure to include Na’s structure of a via including a second side wall not overlapping the light-shielding layer in a plan view, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s opening is comparable to Na’s opening because they both permit a transparent electrode to connect a pixel electrode to a transistor structure. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Kim’s transistor structure to include Na’s structure of a via including a second side wall not overlapping the light-shielding layer in a plan view with the predictable result of having the opening only partially overlap the light shielding structure. As an additional comment, examiner understands the meaning of “cover” to include the meaning of either over a top portion, a bottom portion, and/or a side portion. Regarding dependent claim 2, Kim, further in view of Na, teach the display device according to claim 1; further comprising … the transparent conductive layer is in connect with the first side wall (Fig. 2), … However, Kim remains silent regarding the display device further comprising: a second insulating layer covering a top surface of the first insulating layer and the first opening, wherein … and the second insulating layer covers the transparent conductive layer and the second side wall. However, in the same field of endeavor, Na teaches upper gate insulation film 146 (analogous to Kim’s third insulating layer 150); wherein Na teaches a second insulating layer (Na: Fig. 1; passivation film 164) covering a top surface of the first insulating layer (Na: Fig. 1) and the first opening (Na: Fig. 1) and the second insulating layer covers the transparent conductive layer (Na: Fig. 1) and the second side wall (Na: Fig. 1). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify Kim’s display structure to include Na’s second insulation layer, because such a modification is the result of combining prior art elements according to known methods to yield predictable results. More specifically, Kim’s display structure as modified by Na’s second insulation layer can yield a predictable result of providing a passivation layer, as disclosed by Na, since passivation layers are known structures in the art to protect semiconductor devices from damage by providing a durable insulation layer. Since the claimed invention is merely a combination of old elements, and in the combination each element merely would have performed the same function as it did separately, one of ordinary skill in the art would have recognized that the results of the combination were predictable before the effective filing date of the instant invention. Regarding dependent claim 5, Kim, further in view of Na, teach the display device according to claim 2, further comprising a pixel electrode (Kim: Fig. 2; pixel electrode PE) arranged above the second insulating layer (Yielded through the combination of Kim and Na), wherein the second insulating layer has a second opening (Yielded through the combination of Kim and Na) achiving the transparent conductive layer (Yielded through the combination of Kim and Na), and the pixel electrode is connected to the transparent conductive layer via the second opening (Yielded through the combination of Kim and Na). Regarding dependent claim 6, Kim, further in view of Na, teach the display device according to claim 1, wherein the first opening overlaps the light-shielding layer in an area larger than half of the first opening in a plan view (Kim: Fig. 7). Regarding dependent claim 7, Kim, further in view of Na, teach the display device according to claim 1, wherein the light-shielding layer protrudes in a direction from the first side wall toward the second side wall in an area overlapping the first opening in a plan view (yielded through the combination of Kim and Na. See Fig. 1 of Na). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the display device of Kim, further in view of Na, to include the structure wherein the light-shielding layer protrudes in a direction from the first side wall toward the second side wall in an area overlapping the first opening in a plan view, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, the light shielding layer’s placement relative to the transistor structure in Na’s disclosure is comparable to Kim’s light shielding layer’s placement relative to the transistor structure because the via connecting the pixel electrode and transistor, which overlaps the light shielding layer. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the display device of Kim, further in view of Na, to include the structure wherein the light-shielding layer protrudes in a direction from the first side wall toward the second side wall in an area overlapping the first opening in a plan view with the predictable result of having the light shielding layer cover other portions of the transistor. Regarding dependent claim 9, Kim teaches the display device according to claim 8, further comprising … the transparent conductive layer is in contact with a side wall of the first opening in an area opverlapping the light-shielding layer in a plan view (Figs. 1, 2, and 7), … However, Kim remains silent regarding the display device including: a second insulating layer covering a top surface of the first insulating layer and the the first openging, wherein … and the second insulating layer covers the transparent conductive layer in an area overlapping the light-shielding layer and covers the side wall of the first opening in an area not overlapping the light-shielding layer in a plan view. However, in the same field of endeavor, Na teaches upper gate insulation film 146 (analogous to Kim’s third insulating layer 150); wherein Na teaches a second insulating layer (Na: Fig. 1; passivation film 164) covering a top surface of the first insulating layer (Na: Fig. 1) and the first opening (Na: Fig. 1) and the second insulating layer covers the transparent conductive layer in an area overlapping the light-shielding layer (Na: Fig. 1) and covers the side wall of the first opening in an area not overlapping the light-shielding layer in a plan view (Na: Fig. 1). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify Kim’s display structure to include Na’s second insulation layer, because such a modification is the result of combining prior art elements according to known methods to yield predictable results. More specifically, Kim’s display structure as modified by Na’s second insulation layer can yield a predictable result of providing a passivation layer, as disclosed by Na, since passivation layers are known structures in the art to protect semiconductor devices from damage by providing a durable insulation layer. Since the claimed invention is merely a combination of old elements, and in the combination each element merely would have performed the same function as it did separately, one of ordinary skill in the art would have recognized that the results of the combination were predictable before the effective filing date of the instant invention. Regarding dependent claim 12, Kim, further in view of Na, teach the display device according to claim 9, further comprising a pixel electrode (Kim: Fig. 2; pixel electrode PE) arranged above the second insulating layer (Yielded through the combination of Kim and Na), wherein the second insulating layer has a second opening (Yielded through the combination of Kim and Na) achiving the transparent conductive layer (Yielded through the combination of Kim and Na), and the pixel electrode is connected to the transparent conductive layer via the second opening (Yielded through the combination of Kim and Na). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over by Kim et al. (US 20170243898 A1), further in view of Na et al. (US 20140138772 A1), and Kim et al. (US 6407782 B1). Regarding dependent claim 3, Kim, further in view of Na, teach the display device according to claim 1; however, Kim remains silent wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. However, in the same field of endeavor, Kim teaches a thin film transistor structure wherein active layer 207 extends past the light shielding layer 203 such that connection electrodes may be in contact with the active layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. This thin film transistor structure (TFT) may be readily used to modify the display structure of Kim, further in view of Na, to yield the display device wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the display device of Kim, further in view of Na, to include Kim’s transistor structure wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s transistor structure is comparable to the transistor structure yielded through the combination of Kim and Na because both disclose a connective via for a transistor structure opening at the active layer wherein the opening partially overlaps a light shielding layer below the transistor structure. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the display device of Kim, further in view of Na, to include Kim’s transistor structure wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view with the predictable result of forming the light shielding layer only partially covering the active layer of the transistor structure. Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over by Kim et al. (US 20170243898 A1), further in view of Na et al. (US 20140138772 A1), and Kawabuchi et al. (US 20170329176 A1). Regarding dependent claim 4, Kim, further in view of Na, teach the display device according to claim 2, wherein … the transparent conductive layer is in conntact with the first side wall ( Kim: Fig. 2), … However, Na remains silent wherein the second insulating layer comprises: a barrier layer having a moisture barrier property; and a resin insulating layer arranged above the barrier layer, … and the barrier layer covers the transparent conductive layer and the second side wall However, Na does disclose their second insulating layer to be a passivation layer; wherein passivation layers are known in the art to help aid in the prevention of corrosion, oxidation, and material breakdown due to exposure to an outside environment. Further, in the same field of endeavor, Kawabuchi teaches a similar transistor structure for a display device wherein Kawabuchi teaches a second insulating layer (Fig. 1; insulating film 20). Kawabuchi teaches their insulating film 20 including a protective insulating film 5 and a flattening film 6. Kawabuchi’s protective insulating film 5is taught to protect against moisture ([0044]), and the flattening film is made from a resin material ([0045]). It would have been obvious to modify the second insulating layer of Kim, further in view of Na, to form the second insulating layer such that the second insulating layer further comprises a barrier layer having a moisture barrier property (Kawabuchi: Fig. 5; protective insulating film 5); and a resin insulating layer (Kawabuchi: Fig. 5; flattening film 6) arranged above the barrier layer (Kawabuchi: Fig. 5), and the barrier layer covers the transparent conductive layer and the second side wall (Kawabuchi: Fig. 5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the second insulating layer of Kim, further in view of Na, to include Kawabuchi’s barrier and resin layer structure, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kawabuchi’s barrier and resin layer structure is comparable to Na’s second insulating layer because of the relative placement of Na’s second insulating layer and Kawabuchi’s second insulating layer; and further, Na’s passivation layer is implied, by name, to have the same function as Kawabuchi’s second insulating layer. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the second insulating layer of Kim, further in view of Na, to include Kawabuchi’s barrier and resin layer structure with the predictable result of insulating the display device from moisture. Regarding dependent claim 11, Kim, further in view of Na, teach the display device according to claim 9, wherein … the transparent conductive layer is in contact with the side wall of the first openging in the area overlapping the light-shielding layer in a plan view (Kim: Fig. 2), … However, Na remain silent wherein the second insulating layer comprises: a barrier layer having a moisture barrier property; and a resin insulating layer arranged above the barrier layer, … the barrier layer covers the transparent conductive layer in the area overlapping the light-shielding layer in a plan view, and covers the side wall of the first opening in the area not overlapping the light-shielding layer in a plan view. However, Na does disclose their second insulating layer to be a passivation layer; wherein passivation layers are known in the art to help aid in the prevention of corrosion, oxidation, and material breakdown due to exposure to an outside environment. Further, in the same field of endeavor, Kawabuchi teaches a similar transistor structure for a display device wherein Kawabuchi teaches a second insulating layer (Fig. 1; insulating film 20). Kawabuchi teaches their insulating film 20 including a protective insulating film 5 and a flattening film 6. Kawabuchi’s protective insulating film 5is taught to protect against moisture ([0044]), and the flattening film is made from a resin material ([0045]). It would have been obvious to modify the second insulating layer of Kim, further in view of Na, to form the second insulating layer such that the second insulating layer further comprises a barrier layer having a moisture barrier property (Kawabuchi: Fig. 5; protective insulating film 5); and a resin insulating layer (Kawabuchi: Fig. 5; flattening film 6) arranged above the barrier layer (Kawabuchi: Fig. 5), the barrier layer covers the transparent conductive layer in the area overlapping the light-shielding layer in a plan view (yielded through the combination of Kim, Na, and Kawabuchi) , and covers the side wall of the first opening in the area not overlapping the light-shielding layer in a plan view (yielded through the combination of Kim, Na, and Kawabuchi. Also see Kawabuchi’s Fig. 5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the second insulating layer of Kim, further in view of Na, to include Kawabuchi’s barrier and resin layer structure, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kawabuchi’s barrier and resin layer structure is comparable to Na’s second insulating layer because of the relative placement of Na’s second insulating layer and Kawabuchi’s second insulating layer; and further, Na’s passivation layer is implied, by name, to have the same function as Kawabuchi’s second insulating layer. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the second insulating layer of Kim, further in view of Na, to include Kawabuchi’s barrier and resin layer structure with the predictable result of insulating the display device from moisture. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over by Kim et al. (US 20170243898 A1), further in view of Kim et al. (US 6407782 B1). Regarding dependent claim 10, Kim teaches the display device according to claim 8; however, Kim remains silent wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. However, in the same field of endeavor, Kim teaches a thin film transistor structure wherein active layer 207 extends past the light shielding layer 203 such that connection electrodes may be in contact with the active layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. This thin film transistor structure (TFT) may be readily used to modify the display structure of Kim to yield the display device wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the display device of Kim, further in view of Na, to include Kim’s transistor structure wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s transistor structure is comparable to the transistor structure yielded through the combination of Kim and Na because both disclose a connective via for a transistor structure opening at the active layer wherein the opening partially overlaps a light shielding layer below the transistor structure. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the display device of Kim, further in view of Na, to include Kim’s transistor structure wherein the transparent conductive layer is in contact with the oxide semiconductor layer exposed in a bottom portion of the first opening in an area not overlapping the light-shielding layer in a plan view with the predictable result of forming the light shielding layer only partially covering the active layer of the transistor structure. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 20230168550 A1 teaches a similar transistor (Fig. 6B) for a display device. US 20230161210 A1 teaches similar transistor structure embodiments for a display device (Figs. 3, 15, 17, and 19. Also see [0159]). US 20140061632 A1 teaches a similar opening wherein a sidewall only partially overlaps a light blocking layer. US 20140042429 A1 teaches a similar opening wherein a sidewall only partially overlaps a light blocking layer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARIO A AUTORE whose telephone number is (571)270-0059. The examiner can normally be reached Monday - Friday, 8 am - 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARIO A. AUTORE JR. Examiner Art Unit 2897 /MARIO ANDRES AUTORE JR/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

May 26, 2023
Application Filed
Dec 09, 2025
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12593560
LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12543442
DISPLAY PANEL
2y 5m to grant Granted Feb 03, 2026
Patent 12532544
SPLIT N-WELL CELLS HAVING A MERGED N-WELL DESIGN
2y 5m to grant Granted Jan 20, 2026
Patent 12526553
SOLID-STATE IMAGING ELEMENT, METHOD OF MANUFACTURING SOLID-STATE IMAGING ELEMENT, AND ELECTRONIC DEVICE
2y 5m to grant Granted Jan 13, 2026
Patent 12495640
LIGHT DETECTION DEVICE, SUPERCONDUCTING NANOWIRE SINGLE PHOTON DETECTOR COMPRISING THE SAME AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Dec 09, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
58%
Grant Probability
84%
With Interview (+25.9%)
3y 8m
Median Time to Grant
Low
PTA Risk
Based on 36 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month