DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed on 10/22/2025 have been fully considered but they are not persuasive.
Examiner notes that the reasons for rejection of the newly amended language below. Examiner recommends clarifying the claim terms as discussed in the reasons for rejection below, particularly with respect to providing a definite scope of limitations for claimed hardware elements.
Applicant argues: “The Office Action alleged that the cited reference Kim teaches the limitation of "double register circuit." However, Kim merely teaches (See abstract of Kim) that a first buffer in the double register circuit is to store incoming data (i.e., image data for one row of the block is written into this buffer), and a second buffer in the double register circuit is to output data (i.e., image data for another row of the block is read out from this buffer). Kim did not teach that the first buffer is to output frame parameter data, and the second buffer is to store a control bit for determining whether the data in the first buff er is allowed to be read out by the scaler circuit.”
Examiner notes that Kim accurately describes the structure of a double register circuit which is the structure being claimed. The argument is directed to a double buffer register circuit which is described in Specification but was not claimed.
Applicant argues: “2. Claim 1 now contain a duplicate register circuit hardware to store values for the second video data stream and uses a control bit in order for the hardware to know which register circuit to use for the presently displayed video.”
Examiner notes that the claim is not clear with respect to “duplicate register circuit hardware.” The claim describes a double register which is a specific circuit known in the art and not a duplication of registers. Applicant argues: “Schulze merely teaches using two video players to decode the video file concurrently to achieve quick movement between clips or frames. Paragraph [0038] or other passages of Schulze makes no mention whatsoever of a vertical synchronization signal. Therefore, paragraph [0038] or other passages of Schulze does not disclose the claimed feature of "the Attorney Docket No. 16313-617 13 Application No. 18/206,300 vertical front porch period corresponds to a period between a vertical synchronization signal and a previous frame, and the vertical back porch period corresponds to a period between the vertical synchronization signal and a next frame", nor does Schulze provide any technical teaching in this regard.”
Examiner notes that the claim does not process the described signals, but rather refers to them to describe the timing of the operation as being between frames, which is taught in Schulze as noted in the updated reasons for rejection below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 7, 9-10, 16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1, 7, 9-10, 16 recite “a double register circuit comprising a first buffer and a second buffer” however Specification does not support this definition. For example, Specification, Paragraph 20 describes: “the input register circuit 136 may be a double buffer register circuit, in which one buffer BFl is configured to … and another one buffer BF2 is configured to …”
Use of the word “means” (or “step for”) in a claim with functional language creates a rebuttable presumption that the claim element is to be treated in accordance with 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is invoked is rebutted when the function is recited with sufficient structure, material, or acts within the claim itself to entirely perform the recited function.
Absence of the word “means” (or “step for”) in a claim creates a rebuttable presumption that the claim element is not to be treated in accordance with 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is not invoked is rebutted when the claim element recites function but fails to recite sufficiently definite structure, material or acts to perform that function. M.P.E.P. 2181(I), Williamson v. Citrix Online, LLC, 792 F.3d 1339, 1348, 115 USPQ2d 1105, 1111 (Fed. Cir. 2015) (en banc, quoting Watts v. XL Systems, Inc., 232 F.3d 877, 880 (Fed. Cir. 2000); Personalized Media Communications, LLC v. International Trade Commission, 161 F. 3d 696, 704 (Fed. Cir. 1998). A substitute term acts as a generic placeholder for the term "means" and would not be recognized by one of ordinary skill in the art as being sufficiently definite structure for performing the claimed function. "The standard is whether the words of the claim are understood by persons of ordinary skill in the art to have a sufficiently definite meaning as the name for structure." Williamson at 1349; see also Greenberg v. Ethicon Endo-Surgery, Inc., 91 F.3d 1580, 1583 (Fed. Cir. 1996). Specification must disclose adequate structure for each of the claimed functions, and the structure for special purpose functions must be more than simply a general purpose computer or microprocessor, specification must also disclose an algorithm for performing these claimed functions. Williamson at 1351.
Claims 1, 7, 9-10, 16 recite “a scaler circuit … the scaler circuit comprises a memory …” and “an input register circuit that is a double register circuit comprising a first buffer and a second buffer” generic terms (circuit) that are modified by a structure and thus do not invoke 35 U.S.C. 112(f). Claims 1, 7, 9-10, 16 also recite “processor circuit” which is interpreted to name to a general-purpose processor, a circuit well known in the art.
Claims 1, 7, 9-10, 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 7, 9-10, 16 are similarly rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1, 7, recite “an access circuit … a first buffer and a second buffer …” a generic term (circuit, buffer) modified by functional language but not modified by structure or a structural term and not naming a structure readily recognized by persons of skill in the art to perform the claimed function. The limitation invokes 35 U.S.C. 112(f) or 35 U.S.C. 112 (pre-AIA ), sixth paragraph, and shall be construed to cover the corresponding structure described in the specification and equivalents thereof. However, the written description fails to disclose the corresponding differentiated structure for each claimed function. As described in Specification Paragraph 38 and Fig. 1, circuits are differentiated from processors: “circuits ( either dedicated circuits, or general purpose circuits, which operate under the control of one or more processors and coded instructions).” Further, claims explicitly claim a processor as part of the scaler circuit but not the other circuits, which further raises questions of indefiniteness of these other elements.
Claims 9-10, 16 recite “a first decoder circuit configured to decode first video data … a second decoder circuit configured to decode second video data … an access circuit configured to selectively output … a first buffer and a second buffer … configured to receive … a direct memory access controller circuit …” a generic term (circuit, buffer) modified by functional language but not modified by structure or a structural term and not naming a structure readily recognized by persons of skill in the art to perform the claimed function. The limitations invoke 35 U.S.C. 112(f) or 35 U.S.C. 112 (pre-AIA ), sixth paragraph, and shall be construed to cover the corresponding structure described in the specification and equivalents thereof. However, the written description fails to disclose the corresponding differentiated structure for each claimed function. As described in Specification Paragraph 38 and Fig. 1, circuits are differentiated from processors: “circuits ( either dedicated circuits, or general purpose circuits, which operate under the control of one or more processors and coded instructions).” Further, claims explicitly claim a processor as part of the scaler circuit but not the other circuits, which further raises questions of indefiniteness of these other elements.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or 35 U.S.C. 112 (pre-AIA ), sixth paragraph; or
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the claimed function, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 7, 9, 10, 16 are rejected under 35 U.S.C. 103 as being unpatentable over US 20200074741 to Schulze (“Schulze”) in view of US 20080101462 to Kim (“Kim”).
Regarding Claim 1: “A video switching method, comprising:
decoding first video data to output first frame parameter data and first image data; (For example, to “Player A, may locate and play a particular frame of the video [image data] with a particular camera position [parameter data] ( e.g., the frame or clip is selected based on meta data [parameter data] as described elsewhere herein),” which corresponds to data claimed as second video data. Schulze, Paragraph 37. Also note that “Clip meta data may refer to, but not be limited to, a field of view ( e.g., may be dependent on lens used to shoot video) of the video clip, an angle (e.g., close-up, wide, etc.) of the video clip, a depth of field of the video clip, a movement (e.g., static, panning, zooming, etc.) of the camera in the video clip, …” Schulze, Paragraphs 48, 51.)
decoding second video data to output second frame parameter data and second image data; (“The system then switches to the second video player, shown in FIG. 4 as Player B, which is ready with a new frame of video, when a new camera location or position is requested” Schulze, Paragraph 37.)
in response to a control command, outputting, by an access circuit, one of the first frame parameter data and the second frame parameter data as a corresponding frame parameter data, and outputting, by the access circuit, one of the first image data and the second image data as a corresponding image data; and (“The system then switches to the second video player, shown in FIG. 4 as Player B, which is ready with a new frame of video, when a new camera location or position is requested based, at least in part on, user input, and in some embodiments, additional meta data. Schulze, Paragraph 37. Note the subsystem functions can be implemented by circuits. Schulze, Paragraph 57. In this example the subsystem performs the function of the access circuit that switches the data accessed and the user input or the meta data exemplify the control command.)
processing, by a scaler circuit, the corresponding image data according to the corresponding frame parameter data to generate output data, and (For example, “Player A, may locate and play a particular frame of the video with a particular camera position ( e.g., the frame or clip is selected based on meta data [stored frame parameter data] as described elsewhere herein),” Schulze, Paragraph 37.)
wherein the scaler circuit comprises a memory, a processor circuit, and an input [register circuit that is a double register] circuit comprising a first buffer and a second buffer, and (Note that while this element provides structural definitions of some of the circuits under section 112, the details of the circuit structure do not limit the claimed method to performing particular steps.
Cumulatively note that Schulze teaches “Memory subsystem 312 includes one or more devices for storing data and/or instructions for processing subsystem 310.” Schulze, Paragraph 58, 63.
Cumulatively, Schulze also teaches: that any type of memory can be used for this operation in Paragraph 58. Kim further teaches “using a double register array buffer instead of a synchronous random access memory (SRAM)” in Kim, Paragraph 9 and Fig. 1. This indicates that a double register was a known substitute for other types of memory such as SRAM, with known tradeoff benefits. Therefore, before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to supplement the teachings of Schulze to use “a double register circuit” as taught in Kim, in order to reduce the size of processing hardware or to increase the speed of processing hardware required for video processing in comparison to using SRAM and other block-based memory circuits. See Kim, Paragraphs 7, and 9.)
transmitting the output data to a panel, so as to drive the panel to display image content corresponding to the corresponding image data, (The display can be a panel display as noted in Schulze, Paragraph 64. The video and display metadata are transmitted to display where “Display subsystem 326 may be controlled by processing subsystem 310 to display information to a user” Schulze, Paragraphs 64-65.)
processing, by the scaler circuit, the corresponding image data according to the corresponding frame parameter data to generate the output data comprises: … storing, by the memory, the corresponding image data; (The decoder passes frame information into the system memory: “A first or second video decoder or video player may provide or send up a frame of video [image data]. Then, the video decoder may indicate what frame it is [frame parameter] at (uncoupled or unrelated to the audio stream). Using information that specifies a camera position, as shown in Block 130, relative to this frame [another frame parameter] …” Schulze, Paragraph 28.)
receiving, by the first buffer, and storing the corresponding frame parameter data from the access circuit; (As noted above “Memory subsystem 312 includes one or more devices for storing data and/or instructions” where different devices can store different types of data. Schulze, Paragraph 58, 60. The one or more memory devices can be double register buffers as in Kim, Paragraph 9. And, the data can be either video or metadata as noted in Schulze, Paragraph 44.)
storing, by the second buffer, a control bit; and … setting, by the processor circuit, the control bit (For example, “it updates a signal End-Of-Write (EOW) indicating a data write complete state of a buffer as a value indicating a data write operation for a row of a block has been completed, and outputs the updated signal EOW to the buffer control FSM 113.” Kim, Paragraph 37. See statement of motivation above.)
and determining whether the corresponding frame parameter data in the first buffer is valid according to the control bit, (For example, “a signal End-Of-Write (EOW) indicating a data write complete state of a buffer as a value indicating a data write operation for a row of a block has been completed, and outputs the updated signal EOW to the buffer control FSM 113,” which indicates that the stored data is valid for reading as further noted below. Kim, Paragraph 37. See statement of motivation above.)
wherein if the control bit has a specific logic value, the corresponding frame parameter data in the first buffer is valid, such that the processor circuit is allowed to read the corresponding frame parameter data in the first buffer and process the corresponding image data according to the corresponding frame parameter data to generate the output data; (“a signal End-Of-Write (EOW) indicating a data write complete state of a buffer as a value indicating a data write operation for a row of a block has been completed, and outputs the updated signal EOW to the buffer control FSM 113.” Kim, Paragraph 37. See statement of motivation above.)
wherein decoding the second video data to output the second frame parameter data and the second image data comprises: … decoding the second video data to output the second frame parameter data and the second image data during a period when the scaler circuit drives the panel to display image content corresponding to the first video data, (“a first video player, shown as Player A, may locate and play a particular frame of the video … The system then switches to the second video player, shown in FIG. 4 as Player B, which is ready with a new frame of video,” which was thus decoded while Player A video was played. Schulze, Paragraph 37.)
wherein the scaler circuit is configured to set the control bit to have the specific logic value to indicate that the second frame parameter data is valid during a vertical front porch period or a vertical back porch period, … the vertical front porch period corresponds to a period between a vertical synchronization signal and a previous frame, and the vertical back porch period corresponds to a period between the vertical synchronization signal and a next frame.” (Under the broadest reasonable interpretation consistent with the specification and ordinary skill in the art, the claim requires the read bit for data of the second player to be set in the period between the last fame of the player A and the next frame of the player B. As noted above “a first video player, shown as Player A, may locate and play a particular frame of the video … The system then switches to the second video player, shown in FIG. 4 as Player B, which is ready with a new frame of video,” Schulze, Paragraph 37. This indicates that “a signal End-Of-Write (EOW) indicating a data write complete state of a buffer” must be set (as ready to read) before the new frame of Player B is switched, and thus it must have the set condition “during” the back porch of the previous frame or the front porch of the new frame. See Kim, Paragraph 37. And statement of motivation above.)
such that the scaler circuit processes the second image data according to the second frame parameter data after the second frame parameter data is generated, so as to drive the panel to display image content corresponding to the second video data, and (As noted above “a first video player, shown as Player A, may locate and play a particular frame of the video … The system then switches to the second video player, shown in FIG. 4 as Player B, which is ready with a new frame of video, when a new camera location or position is requested based, at least in part on, user input, and in some embodiments, additional meta data” exemplifying second frame parameter data. Schulze, Paragraph 37.)
To the extent Schulze teaches the display panel in different parts of the disclosure from generating frame parameter data and image data and processing the image data: It is well understood from Schulze in the ordinary operation of video decoding and display, the various video switching and decoding steps are performed by corresponding processing circuits for the purpose of transmitting and displaying the results of the selected decoded video on the display panel.
Therefore, before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art that the example elements of video processing are applied to the examples of displays and display circuitry.
Finally, in reviewing the present application, there does not seem to be objective evidence that the claim limitations are particularly directed to: addressing a particular problem which was recognized but unsolved in the art, producing unexpected results at the level of the ordinary skill in the art, or any other objective indicators of non-obviousness.
Regarding Claim 7: “The video switching method of claim 1, wherein the scaler circuit starts processing the second image data without changing hardware settings.” (Note that operation of a circuit and hardware do not limit the method to performing particular steps. Cumulatively, in Schulze, the second video player processes the second video sequence while the first video player is playing as noted in Paragraph 37. As noted in Schulze Paragraph 74, these functions can be implemented in hardware or software which does not require changing hardware settings.to process the second video.)
Regarding Claim 9: “A video processing system,” is rejected for reasons stated for Claim 1, and because prior art teaches:
“a first decoder circuit configured to decode first video data (“shown as Player A,” Schulze, Paragraph 37.)
a second decoder circuit configured to decode second video data (“Player B” Schulze, Paragraph 37.)
an access circuit configured to selectively output (“The system then switches to the second video player, shown in FIG. 4 as Player B,” where the switching can be implemented in circuit hardware or software. See Schulze Paragraphs 37, 74)
a scaler circuit configured to process the corresponding image data … wherein the scaler circuit comprises: a memory configured to store the corresponding image data; an input register circuit, wherein the input register circuit is a double register circuit that comprises a first buffer and a second buffer, (See reasons for rejection in Claim 1, citing hardware in Schulze, Paragraph 58, 63 and Kim, Paragraph 9 and Fig. 1.)
a processor circuit configured to set the control bit …” (For example, “it updates a signal End-Of-Write (EOW) indicating a data write complete state of a buffer as a value indicating a data write operation for a row of a block has been completed, and outputs the updated signal EOW to the buffer control FSM 113.” Kim, Paragraph 37. See use or processor circuits in Schulze Paragraphs 74, 76, and see statement of motivation in Claim 1.)
Regarding Claim 10 “The video processing system of claim 9, wherein the access circuit is a direct memory access controller circuit.” (“memory subsystem 312 can include mechanisms for controlling access to the memory” Schulze, Paragraphs 59, 60.)
Regarding Claim 16: “The video processing system of claim 2, wherein the scaler circuit starts processing the second image data without changing hardware settings.” (In Schulze, the second video player processes the second video sequence while the first video player is playing as noted in Paragraph 37. As noted in Schulze Paragraph 74, these functions can be implemented in hardware or software which does not require changing hardware settings.to process the second video.)
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MIKHAIL ITSKOVICH whose telephone number is (571)270-7940. The examiner can normally be reached Mon. - Thu. 9am - 8pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joseph Ustaris can be reached at (571)272-7383. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MIKHAIL ITSKOVICH/Primary Examiner, Art Unit 2483