DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, a first region consists of two internal electrode layers: one of the first internal electrode layers; one of the second internal electrode layers; and a second region, being adjacent to the first region, consists of two internal electrode layers: one of the first internal electrode layers; and one of the second internal electrode layers features of claim 1 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-4 and 6-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The idea of first region and second region recited in claim 1 is not found within the original filed drawing or the original filed specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-4, 6-8 and 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Yamato et al. (US20210366658) in view of Masuda et al. (JP2000124057).
With respect to claim 1, Yamato teaches a multilayered capacitor, comprising (see FIG. 1, element 100): a capacitor body (see FIG. 2, element 10) including dielectric layers (see FIG. 2, element 11) and first internal electrode layers (see FIG. 2, element 12a) with a first one of the dielectric layers interposed therebetween and second internal electrode layers (see FIG. 2, element 12b) stacked with a second one of the dielectric layers interposed therebetween, and a first external electrode (see FIG. 2, element 20a) and a second external electrode (see FIG. 2, element 20b) on both sides of the capacitor body in a longitudinal direction (see FIG. 2, paragraph 40, noting a third direction) of the capacitor body, wherein the first internal electrode layers (see FIG. 2, element 12a) connected to the first external electrode (see FIG. 2, element 20a) and the other of the first internal electrode layers is connected to the second external electrode, (see FIG. 2, element 20b) and the second internal electrode layers (see FIG. 2, element 12b) connected to the first external electrode (see FIG. 2, element 20a), and the other of the second internal electrode layers is connected to the second external electrode (see FIG. 2, element 20b), an average length, in a width direction (see FIG. 2, paragraph 40, noting a first direction) of the capacitor body, of the first internal electrode layers (see FIG. 3B, element W1) and an average length, in the width direction of the capacitor body, of the second internal electrode layers (see FIG. 3B, element W2) are different (see paragraph 40, noting the width W2 of the second internal electrode layer 12b is less than the width of W1 of the internal electrode layer 12a in the orthogonal direction), and the first internal electrode layers and the second internal electrode layers are alternately stacked with a third one of the dielectric layers interposed therebetween (see FIG. 2, elements 12a, 12b and 11, paragraph 39).
Yamato does not expressly teach that a first region consists of two internal electrode layers: one of the first internal electrode layers; one of the second internal electrode layers; and a second region, being adjacent to the first region, consists of two internal electrode layers: one of the first internal electrode layers; and one of the second internal electrode layers.
Masuda, on the other hand, teaches a first region consists of two internal electrode layers: one of the first internal electrode layers; one of the second internal electrode layers (see FIG. 2(e), element 5e, also see below picture); and a second region, being adjacent to the first region, consists of two internal electrode layers: one of the first internal electrode layers; and one of the second internal electrode layers (see FIG. 2(e), element 5e, also see below picture).
Accordingly, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teachings of Yamato and Masuda to form the claimed invention in order to suppress occurrence of cracks and improve the reliability of the chip of the multilayer ceramic capacitor (see Masuda paragraph 48).
With respect to claim 2, the combined teachings of Yamato and Masuda teach that the capacitor body includes a first surface (see Yamato FIG. 1, top face) and a second surface (see Yamato FIG. 1, bottom face) facing each other in a stacking direction (see Yamato FIG. 1, paragraph 40, noting a second direction) of the first internal electrode layers and the second internal electrode layers; a third surface and a fourth surface (see Yamato FIG. 1, paragraph 9, noting two edge faces) connected to the first surface and second surface and facing each other in the longitudinal direction (see Yamato FIG. 1, a third direction); and a fifth surface and a sixth surface (see Yamato FIG. 1, paragraph 38, noting side faces) connected to the first surface and the second surface, connected to the third surface and the fourth surface, and facing each other in the width direction (see Yamato FIG. 1, a first direction), the first external electrode (see Yamato FIG. 2, element 20a) is disposed on the third surface (see Yamato FIG. 1, one of side faces) of the capacitor body, and the second external electrode (see Yamato FIG. 2, element 20b) is disposed on the fourth surface (see Yamato FIG. 1, one of side faces) of the capacitor body.
With respect to claim 3, the combined teachings of Yamato and Masuda teach that the first internal electrode layers include a 1-1 internal electrode layer connected to the first external electrode and a 1-2 internal electrode layer connected to the second external electrode (see Yamato FIG. 2, noting one of element 12a is connected to a first external element 20a and the other element 12a is connected to the second external element 20b).
With respect to claim 4, the combined teachings of Yamato and Masuda teach that the second internal electrode layers include a 2-1 internal electrode layer connected to the first external electrode and a 2-2 internal electrode layer connected to the second external electrode (see Yamato FIG. 2, noting one of element 12b is connected to a first external element 20a and the other element 12b is connected to the second external element 20b).
With respect to claim 6, the combined teachings of Yamato and Masuda teach that the 1-1 internal electrode layer, the 1-2 internal electrode layer, the 2-1 internal electrode layer, and the 2-2 internal electrode layer are sequentially stacked with a respective one of the dielectric layers interposed therebetween (see Yamato FIG. 2, elements 12a, 12b and 11, paragraph 39).
With respect to claim 7, the combined teachings of Yamato and Masuda teach that the average length in the width direction of the first internal electrode layers is longer than the average length in the width direction of the second internal electrode layers (see Yamato FIG. 3B, elements W1 and W2, paragraph 40, noting the width W2 of the second internal electrode layer 12b is less than the width of W1 of the internal electrode layer 12a).
With respect to claim 8, the combined teachings of Yamato and Masuda teach that a ratio of the average length in the width direction of the first internal electrode layers to the average length in the width direction of the second internal electrode layers is about 0.7:1 to less than about 1:1 (see Yamato paragraph 10).
With respect to claim 10, the combined teachings of Yamato and Masuda teach that an end portion closer to the fifth surface of the first internal electrode layers is closer to the fifth surface than an end portion closer to the fifth surface of the second internal electrode layers, and an end portion closer to the sixth surface of the first internal electrode layers is closer to the sixth surface than an end portion closer to the sixth surface of the second internal electrode layers (see Yamato FIG. 3B, paragraph 40, noting the width W2 of the second internal electrode layer 12b is less than the width of W1 of the internal electrode layer 12a in the orthogonal direction).
With respect to claim 11, the combined teachings of Yamato and Masuda teach that an average shortest distance from an end closer to the fifth surface to the fifth surface of the first internal electrode layers is smaller than an average shortest distance from an end closer to the fifth surface to the fifth surface of the second internal electrode layers (see Yamato FIG. 3B, paragraph 40, noting the width W2 of the second internal electrode layer 12b is less than the width of W1 of the internal electrode layer 12a in the orthogonal direction).
With respect to claim 12, the combined teachings of Yamato and Masuda teach that an average shortest distance from an end closer to the sixth surface to the sixth surface of the first internal electrode layers is smaller than an average shortest distance from an end closer to the sixth surface to the sixth surface of the second internal electrode layers (see Yamato FIG. 3B, paragraph 40, noting the width W2 of the second internal electrode layer 12b is less than the width of W1 of the internal electrode layer 12a in the orthogonal direction).
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Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Yamato and Masuda, as applied to claim 6 above, and further in view of Yoshida et al. (US20210257161).
With respect to claim 9, the combined teachings of Yamato and Masuda teach that the multilayered capacitor (see FIG. 1, element 100) of claim 6, wherein an average length in the width direction of one end of the 1-1 internal electrode layer connected to the first external electrode is the same as an average length in the width direction of the other end of the 1-1 internal electrode layer not connected to the first external electrode, an average length in the width direction of one end of the 1-2 internal electrode layer connected to the second external electrode is the same as an average length in the width direction of the other end of the 1-2 internal electrode layer not connected to the second external electrode, an average length in the width direction of one end of the 2-1 internal electrode layer connected to the first external electrode is the same as an average length in the width direction of the other end of the 2-1 internal electrode layer not connected to the first external electrode, and an average length in the width direction of one end of the 2-2 internal electrode layer connected to the second external electrode is the same as an average length in the width direction of the other end of the 2-2 internal electrode layer not connected to the second external electrode.
Yamato and Masuda do not teach wherein an average length in the width direction of one end of the 1-1 internal electrode layer connected to the first external electrode is shorter than an average length in the width direction of the other end of the 1-1 internal electrode layer not connected to the first external electrode an average length in the width direction of one end of the 1-2 internal electrode layer connected to the second external electrode is shorter than an average length in the width direction of the other end of the 1-2 internal electrode layer not connected to the second external electrode, an average length in the width direction of one end of the 2-1 internal electrode layer connected to the first external electrode is shorter than an average length in the width direction of the other end of the 2-1 internal electrode layer not connected to the first external electrode, and an average length in the width direction of one end of the 2-2 internal electrode layer connected to the second external electrode is shorter than an average length in the width direction of the other end of the 2-2 internal electrode layer not connected to the second external electrode.
Yoshida, on the other hand, teaches the know technique of wherein an average length in the width direction of one end of the 1-1 internal electrode layer connected to the first external electrode is shorter than an average length in the width direction of the other end of the 1-1 internal electrode layer not connected to the first external electrode (see FIG. 5, paragraph 43, noting the width W2 of the connecting portion is smaller than the width W1 of the electrode portion).
Accordingly, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention would have recognized that applying the known technique (having the relative shorter dimension dimensions) as taught by Yoshida to the base product (the internal electrode layer and the external electrode) as taught by Yamato would have yielded the predictable result of the width of the connecting portion is smaller than the width of the electrode portion and resulted in an improved product. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the known relative dimensioning technique of Yoshida to the electrode components of Yamato in order to improve reliability and increase in capacitance of the capacitor.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ESTHER N LIAN whose telephone number is (571)272-5726. The examiner can normally be reached Monday-Friday 8:00 - 5:00 ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ESTHER N LIAN/Examiner, Art Unit 2848
/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2848