Prosecution Insights
Last updated: August 17, 2026
Application No. 18/207,842

Systems And Methods For Selecting Decoupling Capacitance Using A Power Jumper Circuit

Non-Final OA §102
Filed
Jun 09, 2023
Examiner
CHANG, JOSEPH
Art Unit
Tech Center
Assignee
Intel Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1062 granted / 1183 resolved
+29.8% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
21 currently pending
Career history
1199
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
33.4%
-6.6% vs TC avg
§102
37.0%
-3.0% vs TC avg
§112
14.7%
-25.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1183 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1,5,15 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by McNeil (US 2009/0040857). Regarding claim 1, McNeil discloses an integrated circuit package (¶[0002], 100) comprising: a support device (100, ¶[0013]); first (102, ¶[0015]) and second (106 ¶[0016]) integrated circuits mounted on the support device (100); and a first power jumper circuit (124a, 132a) selectable (a - n) to couple a first decoupling capacitor (128a) to one of a first power supply input of the first integrated circuit or a second power supply input (122) of the second integrated circuit (106). Regarding claim 5|1, McNeil discloses the integrated circuit package wherein the first decoupling capacitor is an on-package decoupling capacitor (FIG 3). Regarding claim 15, McNeil discloses a method for selecting (a - n) decoupling capacitance (128a-n) in an integrated circuit package (100), the method comprising: mounting first (102) and second (106) integrated circuits on a support device (substrate or circuit board, 100) in the integrated circuit package; and coupling a first decoupling capacitor (128a) to one of a first power supply input of the first integrated circuit or a second power supply input (122) of the second integrated circuit through a first power jumper circuit (124a, 132a). Regarding claim 20|15, McNeil discloses the method wherein the support device is a package substrate. Allowable Subject Matter Claims 10-14 are allowed. Claims 2-4, 6-9 and 16-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: none of the cited references discloses nor suggests the claimed invention including “resistor” recited in claims 2-3 and 9; “external terminal” recited in claims 4, 16 and 19; “second power jumper circuit” as set forth in claims 6-8 and 17-18. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chun (US 2013/0161788) discloses a semiconductor package including stacked memory chips and a redistribution layer showing external terminals and data and power pads and logic chip and decoupling capacitor. Sundareswaran (US 2014/0282340) discloses decoupling capacitor in an integrated circuit. Bartley (US 2009/0179669) discloses switchable decoupling capacitors for an integrated circuit. Vidhani (US 6,694,499) discloses an integrated circuit selectively establishing connections between decoupling capacitors and driver elements. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joseph Chang whose telephone number is (571)272-1759. The examiner can normally be reached M-F 7:00- 17:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah M Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH CHANG/Primary Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Jun 09, 2023
Application Filed
Oct 11, 2023
Response after Non-Final Action
Jul 23, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
94%
With Interview (+3.9%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1183 resolved cases by this examiner. Grant probability derived from career allowance rate.

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