DETAILED ACTION
Claims 1-20 are pending in the application, with claims 1, 9, and 17 being written in independent form.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 6/15/2023 and 8/26/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-3, 5-6, 9-11, 13-14, 17-19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1:
Claims 1-3, 5-6, 9-11, 13-14, 17-19 are directed towards a method, system, and computer readable storage medium and therefore are directed towards one of the statutory categories of invention.
Step 2A, Prong 1:
Claims 1, 9, and 17 recite the limitation of “determine that a performance of the host system, network, or other system parameters has changed” which is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind, but for the recitation of generic computer components as a tool. That is, other than reciting generic computing apparatuses, nothing in the claim elements preclude the step from being practically performed in the human mind.
If a claim limitation, under its BRI, covers performance of the limitation in the mind, then it falls within the “Mental Processes” grouping of abstract ideas (concepts performed in the human mind including an observation, evaluation, judgment, and opinion).
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application. The claims recite the additional elements of “a host system,” “target systems,” “processor,” and “loading threads” which merely amount to generic computer components performing generic computer functions (See MPEP 2106.05(b)). As such, the claims are directed to an abstract idea.
Step 2B:
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. The elements of a host system, target system, processor, and loading threads are merely generic computer components.
The limitations “send messages from a host system to one or more target systems at a constant rate” and “load the messages from one or more source systems” are merely insignificant extra-solution activity relating to data transmission/gathering (See MPEP 2106.05(g)).
The limitations of “maintain the constant rate of messages from the host system to the one or more target systems based on the determination” and “dynamically modify one or more loading threads of the host system to maintain the constant rate” merely recite insignificant extra solution activity by providing mere instructions to apply the judicial exception (See MPEP 2106.05(f)).
Dependent claims 2, 10, and 18 recite the limitation of “wherein the processor is further configured to load the messages from a storage system into a cache of the host system via execution of the one or more loading threads of the host system” which amounts to mere data transmission/gathering (See MPEP 2106.05(g)).
Dependent claims 3, 11, and 19 recite the limitation of “wherein the processor is further configured to spawn one or more secondary loading threads to load additional messages from the one or more source systems into a cache of the host system in response to the determination” which amounts to mere instructions to apply the judicial exception (See MPEP 2106.05(f)).
Dependent claims 5 and 13 recite the limitation of “wherein the processor is further configured to send the messages from a cache of the host system to the one or more target systems via execution of one or more sending threads” which amounts to mere data transmission/gathering (See MPEP 2106.05(g)).
Dependent claims 6 and 14 recite the limitation of “wherein the processor is further configured to spawn one or more secondary sending threads to send additional messages from a cache of the host system to the one or more target systems in response to the determination” which amounts to mere instructions to apply the judicial exception (See MPEP 2106.05(f)).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7, 9-15, and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lingamneni (US 20180210804) in view of Lazzaro (US 10506061).
Regarding claims 1, 9, and 17, Lingamneni teaches: wherein the processor is configured to load the messages from one or more source systems (thread controller may be in communication with controller queue, process queue, and/or thread controller database in order to retrieve stored messages par. 0020 – 0021), determine that a performance of the host system, network or other system parameters has changed (capability to dynamically scale up/down the total number of processing threads is based on various performance indicating factors encompassing an overall performance of the system par. 0013), maintain the constant rate of messages from the host system to the one or more target systems based on the determination (based on the final system performance score, the master controller may increase, decrease, or skip processing threads, the skipping of processing threads would lead to the maintaining of number of threads, thereby maintaining message flow/performance of the system par. 0036, 0017, and 0052), and dynamically modify one or more loading threads of the host system to maintain the constant rate (master controller may increase processing threads, decrease processing threads, skip (e.g. leave the number of processing threads the same), and/or generate an exception based on the final system performance score par. 0036).
Lingamneni does not explicitly teach a processor configured to send messages from a host system to one or more target systems at a constant rate
However, Lazzaro teaches: a processor configured to send messages from a host system to one or more target systems at a constant rate (with message flow, when the rate function of consumption and the rate-function of production are in equilibrium, the transport has a normal differential and there is an optimum transport of messages Col. 2 Lines 28 – 37 wherein messages are sent through to an appropriate endpoint Col. 1 Lines 23 - 32)
Both Lingamneni and Lazzaro are in the same field of endeavor that includes dynamic scaling of message rates within a system, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni with the teachings of Lazzaro in order to use an explicit optimum for message rates as the optimal goal for the system to achieve in terms of constant message flow.
Modification would allow for the system of Lingamneni to dynamically scale processing threads to maintain/further improve system performance toward the optimum value of Lazzaro to achieve a constant optimal message flow (Lazzaro Col. 2 Lines 59 – 67).
Regarding claims 2, 10, and 18, Lazzaro teaches: wherein the processor is further configured to load the messages from a storage system into a cache of the host system via execution of the one or more loading threads of the host system (messages are ingested by the transport 101 and placed into the cache 104, which is read at fixed intervals based on configuration parameters, within an address space of the transport 101 Col. 3 Lines 39 – 67).
Both Lingamneni and Lazzaro are in the same field of endeavor that includes dynamic scaling of message rates within a system, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni with the teachings of Lazzaro in order to use an explicit optimum for message rates as the optimal goal for the system to achieve in terms of constant message flow.
Modification would allow for the system of Lingamneni to dynamically scale processing threads to maintain/further improve system performance toward the optimum value of Lazzaro to achieve a constant optimal message flow (Lazzaro Col. 2 Lines 59 – 67).
Regarding claims 3, 11, and 19, Lingamneni teaches: wherein the processor is further configured to spawn one or more secondary loading threads to load additional messages from the one or more source systems into a cache of the host system in response to the determination (master controller may increase processing threads based on the final system performance score par. 0036).
Regarding claims 4, 12, and 20, Lingamneni teaches: wherein the processor is further configured to detect that the performance of the host system has returned to a previous performance, and in response, terminate execution of the one or more secondary loading threads (based on the final system performance score comprising a “low” score, master controller may be configured to decrease the processing threads by deactivating them par. 0037).
Regarding claims 5 and 13, Lazzaro teaches: wherein the processor is further configured to send the messages from a cache of the host system to the one or more target systems via execution of one or more sending threads (producer threads send messages Col. 5 Lines 39 – 50, that it receives from the cache to the endpoint Col. 4 Lines 17 - 43).
Both Lingamneni and Lazzaro are in the same field of endeavor that includes dynamic scaling of message rates within a system, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni with the teachings of Lazzaro in order to use an explicit optimum for message rates as the optimal goal for the system to achieve in terms of constant message flow.
Modification would allow for the system of Lingamneni to dynamically scale processing threads to maintain/further improve system performance toward the optimum value of Lazzaro to achieve a constant optimal message flow (Lazzaro Col. 2 Lines 59 – 67).
Regarding claims 6 and 14, Lazzaro teaches: wherein the processor is further configured to spawn one or more secondary sending threads to send additional messages from a cache of the host system to the one or more target systems in response to the determination (new producer threads can be spawned via a cached thread pool mechanism or the thread scheduler allowing threads greater than the optimum number to be constructed Col. 4 Lines 17 – 43).
Both Lingamneni and Lazzaro are in the same field of endeavor that includes dynamic scaling of message rates within a system, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni with the teachings of Lazzaro in order to use an explicit optimum for message rates as the optimal goal for the system to achieve in terms of constant message flow.
Modification would allow for the system of Lingamneni to dynamically scale processing threads to maintain/further improve system performance toward the optimum value of Lazzaro to achieve a constant optimal message flow (Lazzaro Col. 2 Lines 59 – 67).
Regarding claims 7 and 15, Lazzaro teaches: wherein the processor is further configured to detect that the performance of the host system has returned to a previous performance, and in response, terminate execution of the one or more secondary sending threads (producer threads are adjusted to increase or decrease in number based on draining rate/pressure differential of the cache Col. 5 Lines 29 – 48).
Both Lingamneni and Lazzaro are in the same field of endeavor that includes dynamic scaling of message rates within a system, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni with the teachings of Lazzaro in order to use an explicit optimum for message rates as the optimal goal for the system to achieve in terms of constant message flow.
Modification would allow for the system of Lingamneni to dynamically scale processing threads to maintain/further improve system performance toward the optimum value of Lazzaro to achieve a constant optimal message flow (Lazzaro Col. 2 Lines 59 – 67).
Claim(s) 8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lingamneni and Lazzaro in view of He (US 20120324093).
Regarding claims 8 and 16, He teaches: wherein the one or more target systems comprise a rate- sensitive application that depends on a predetermined amount of messages per second (application metrics can be monitored by the server as the client is sending the data and metrics using periodic data push. In one example, in which the client is a game application, the client can send a multitude of game variables using periodic data push, in this situation, the game application is bandwidth-sensitive and time-critical par. 0021 – 0024, thereby the application within a target system may depend on a certain amount of message packets sent across the data push).
He, Lingamneni, and Lazzaro are all in a similar field of endeavor that relates to optimizing package/messaging bandwidth and monitoring rates of messages, therefore they are combinable/modifiable.
It would have been prima facie obvious to one of ordinary skill in the art prior to the effective filing date of the application to combine the teachings of Lingamneni and Lazzaro with the teachings of He since the teachings of He would provide data/application metrics that can be useful for managing bandwidth-sensitive time-critical applications.
Modification would allow for the system of the prior combination to be able to monitor data/application metrics as a client is sending the data/metrics, providing big savings in overhead and bandwidth (He par. 0022).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Nikolov (US 7519669) outlines configuring priorities of receiving and delivery threads such that the rates of delivering and receiving are equivalent.
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/J.S.M./Examiner, Art Unit 2198
/PIERRE VITAL/Supervisory Patent Examiner, Art Unit 2198
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