Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 11 objected to because of the following informalities:
See amendment to claim 11 has a period “.” in the wrong place and it does not have a period at the end of the claim. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 11 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 11 recites a new limitation “barrier height between conductive layer and semiconductor layer is lower than barrier height between second conductive layer and the semiconductor layer” which is outside the period “.”, see parent claim 9 conductive includes first conductive and in claim 10 second conductive is added, thus it is assumed that the new limitation is referring to an effective barrier height thus the claim should be clarified to explain this and also explain that it is further limiting on the previous limitation in claim 11, also this wording of the new limitation is not explained in the specification, thus the Examiner requests the Applicant to state which paragraph of the specification teaches this.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 8, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (see PTO-892 “Photosensing by Edge Schottky ...”) hereafter referred to as Lin in view of Wann et al. (US 20140183645 A1) hereafter referred to as Wann
In regard to claim 1 Lin teaches a photodetector [see Fig. 1, Fig. 4] comprising:
a semiconductor layer [“3-in boron doped (100) p-type silicon wafer with a resistivity of 1–10 Ω·cm”];
a conductive layer [“99.99% pure aluminum film with 2500 Å was thermally evaporated as the gate electrode”] forming a Schottky junction [“Due to more electrons accumulating at the edge of depletion region, the voltage turns to drop in oxide, resulting in great amount of holes injecting into silicon substrate because of lower Schottky barrier height of holes, as shown in Fig. 4. This phenomenon is referred as Schottky barrier height modulation [18]. In Fig. 1, before saturation (gate bias is small), Schottky barrier height modulation is not sufficient to allow great quantity of holes to inject into silicon, and both electrons and holes are blocked by oxide. Hence, the light current of device with thin oxide is larger than that with thick oxide. When the gate bias is sufficiently large, the light current begins to saturate. This is because large amount of electrons tunnel through the oxide, resulting in lack of electrons in the edge depletion region. Furthermore, the voltage almost fully drops in the silicon, and the edge Schottky barrier height is pinned. Thus, the saturated current occurs. The thicker oxide can prevent more electrons from tunneling, and thus it needs less band bending of silicon (silicon voltage) to maintain the charge neutrality in silicon and more voltage will drop on the oxide. Therefore, the device with thicker oxide has stronger Schottky barrier height modulation, i.e., larger hole current or light current (Fig. 4)”] with the semiconductor layer; and
a tunneling barrier layer [“the ultrathin silicon dioxide was grown”] between the semiconductor layer and the conductive layer, wherein the tunneling barrier layer is configured to block [see dark current in Fig. 8 “The large variation of dark current and the small variation of light current with different dox lead to large sensitivity in a MOS photodiode with thin oxide” “Finally, the sensitivity of MOS photodiode with thin oxide is higher than that with thick oxide due to lower dark current”] a dark current between the semiconductor layer and the conductive layer,
but does not teach and wherein the tunneling barrier layer comprises a metal oxide semiconductor material.
However see the band diagram in Fig. 4 electrons accumulating for the thicker oxide, see Fig. 8 see dark current is lowest for thinnest oxide.
Wann teaches how to increase electron current in Fig. 4 of Lin for a given oxide thickness, see Wann Fig. 2 see instead of SiO2, Wann uses TiO2 see paragraph 0022 “Referring now to FIG. 2, a diagram 44 is provided to illustrate that titanium dioxide (TiO.sub.2) is an effective interfacial layer for Schottky barrier height reduction for materials with an electron affinity of about four (4) electron Volts (eV). As shown in the diagram 44, the conduction band 46 of the silicon (Si) is similar to that of the titanium dioxide (TiO.sub.2) and the aluminum (Al) contact. Therefore, only a small amount of energy is needed for conduction to occur when the titanium dioxide (TiO.sub.2) is disposed between silicon (Si) and an aluminum (Al) contact”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Lin to include and wherein the tunneling barrier layer comprises a metal oxide semiconductor material.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to increase electron current in Fig. 4 of Lin for a given oxide thickness.
In regard to claim 2 Lin and Wann as combined teaches wherein the tunneling barrier layer is configured to increase a thickness [see combination Wann it is titanium dioxide (TiO.sub.2), see that the barrier increases the thickness of the Schottky barrier and at the same time adjusts the electron current] of a Schottky barrier formed between the conductive layer and the semiconductor layer.
In regard to claim 3 Lin and Wann as combined teaches wherein a difference between a conduction energy level of the tunneling barrier layer with respect to a vacuum level and [see combination Wann it is TiO2] an electron affinity of the semiconductor layer is less than or equal to 0.5 electron volts (eV).
In regard to claim 4 Lin and Wann as combined teaches wherein a bandgap energy of the tunneling barrier layer is higher [see materials used are titanium dioxide (TiO.sub.2) and Si] than a bandgap energy of the semiconductor layer.
In regard to claim 5 Lin and Wann as combined teaches wherein a bandgap energy of the tunneling barrier layer is greater than [see combination Wann it is titanium dioxide (TiO.sub.2)] or equal to 2 electron volts (eV).
In regard to claim 6 Lin and Wann as combined teaches wherein a thickness [see Lin Fig. 8 shows oxide thickness, see combination Wann it is titanium dioxide (TiO.sub.2)] of the tunneling barrier layer is less than or equal to 30 nanometers (nm).
In regard to claim 8 Lin and Wann as combined teaches wherein the tunneling barrier layer comprises at least one of [see combination Wann it is titanium dioxide (TiO.sub.2)] TiO2, SnO2, ZnO, W03, Nb20s, BaSnO3, Zn2SnO4, SrTiO3, BaTiO3, Zn2Ti3O8, Al203, HfO2, MgO, M003, Fe2O3, Ta2O3, TaON, and In203.
In regard to claim 9 Lin and Wann as combined teaches wherein the conductive layer includes a first conductive layer forming the Schottky junction [“99.99% pure aluminum film with 2500 Å was thermally evaporated as the gate electrode”, see claim 1 it forms a Schottky junction with Si] with the semiconductor layer.
Claim(s) 10-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin and Wann as combined and further in view of Chen et al. (CN 114497266 A) hereafter referred to as Chen
In regard to claim 10 Lin and Wann as combined does not teach further comprising a second conductive layer on the first conductive layer, wherein the second conductive layer is configured to transmit light.
See Chen teaches see Fig. 1, Fig. 2 see “an contact electrode layer; Substrate material, a Schottky semiconductor material layer (n-Si); an ultra-thin metal transparent layer (Au); a Schottky contact conductive layer (ITO)” “The photoelectric detector of the invention forms a large Schottky barrier between the high work function metal Au (0.51eV) and the n-Si, which greatly inhibits the dark current of the device in the reverse bias. combining the performance advantages of each of the ITO and Au in the silicon-based Schottky photoelectric device, the structure can reduce the influence of the light absorption while increasing the Schottky barrier to suppress the dark current”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Lin to include further comprising a second conductive layer on the first conductive layer, wherein the second conductive layer is configured to transmit light.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that using multilayer Schottky electrodes gives better control of Schottky junction and good electrical conductivity of electrode.
In regard to claim 11 Lin, Wann and Chen as combined teaches wherein a work function of the first conductive layer [see combination Chen work function of Au] is set such that a barrier height of a Schottky barrier corresponding to the Schottky junction is lower than a barrier height of a Schottky barrier corresponding to a Schottky junction formed by [see combination, see by ITO] the second conductive layer and the semiconductor layer, and see new limitation barrier height between conductive layer and semiconductor layer is lower [see combination Chen, this is because see barrier is adjusted by two layers Au and ITO ] than barrier height between second conductive layer and the semiconductor layer.
In regard to claim 12 Lin, Wann and Chen as combined does not teach wherein the semiconductor layer includes a n-type semiconductor, and the work function of the first conductive layer satisfies a following expression: (QM >> Xs, where OM represents a work function of the second conductive layer, (IMi represents the work function of the first conductive layer, and Xs represents an electron affinity of the semiconductor layer, .
However see Chen uses n-type semiconductor for detection.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Lin to include wherein the semiconductor layer includes a n-type semiconductor, and the work function of the first conductive layer satisfies a following expression: (QM >> Xs, where OM represents a work function of the second conductive layer, (IMi represents the work function of the first conductive layer, and Xs represents an electron affinity of the semiconductor layer .
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that both n-type and p-type semiconductor are known to give good results for use in photodetector.
In regard to claim 13 Lin, Wann and Chen as combined teaches [see that this is true because of the band gap of the absorber, all that is needed to absorb is that energy of photon greater than the band gap] wherein the photodetector is configured to sense visible light in a visible band and infrared light in an infrared band.
In regard to claim 14 Lin, Wann and Chen as combined teaches wherein the semiconductor layer comprises [see Lin uses p-type Si] a p-type semiconductor.
In regard to claim 15 Lin, Wann and Chen as combined teaches [see that this is true because of the band gap of the absorber, all that is needed to absorb is that energy of photon greater than the band gap] wherein the photodetector is configured to sense visible light in a visible band and ultraviolet light in an ultraviolet band.
In regard to claim 16 Lin, Wann and Chen as combined teaches wherein the first conductive layer [see combination Chen, see Au then ITO] comprises at least one of a metal, an alloy, a metal oxide, a metal nitride, and silicide.
In regard to claim 17 Lin, Wann and Chen as combined teaches wherein the second conductive layer [see combination Chen, see Au then ITO] comprises at least one of ITO, IWO, IZO, GZO, GIZO, and AZO.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (see PTO-892 “Photosensing by Edge Schottky ...”) hereafter referred to as Lin in view of Nam et al. (US 20160156882 A1) hereafter referred to as Nam and further in view of Wann et al. (US 20140183645 A1) hereafter referred to as Wann
In regard to claim 18 Lin teaches an sensor [see Fig. 1, Fig. 4] comprising:
a light-sensing element [see Fig. 1, Fig. 4] which comprises a photodetector [see Fig. 1, Fig. 4]
a photoelectric signal [see light current “the more electron–hole pairs will be generated at the edge of MOS photodiode with thinner oxide, resulting in larger light current”] generated at the light-sensing element, wherein the photodetector comprises:
a semiconductor layer [“3-in boron doped (100) p-type silicon wafer with a resistivity of 1–10 Ω·cm”];
a conductive layer [“99.99% pure aluminum film with 2500 Å was thermally evaporated as the gate electrode”] configured to form a Schottky junction [“Due to more electrons accumulating at the edge of depletion region, the voltage turns to drop in oxide, resulting in great amount of holes injecting into silicon substrate because of lower Schottky barrier height of holes, as shown in Fig. 4. This phenomenon is referred as Schottky barrier height modulation [18]. In Fig. 1, before saturation (gate bias is small), Schottky barrier height modulation is not sufficient to allow great quantity of holes to inject into silicon, and both electrons and holes are blocked by oxide. Hence, the light current of device with thin oxide is larger than that with thick oxide. When the gate bias is sufficiently large, the light current begins to saturate. This is because large amount of electrons tunnel through the oxide, resulting in lack of electrons in the edge depletion region. Furthermore, the voltage almost fully drops in the silicon, and the edge Schottky barrier height is pinned. Thus, the saturated current occurs. The thicker oxide can prevent more electrons from tunneling, and thus it needs less band bending of silicon (silicon voltage) to maintain the charge neutrality in silicon and more voltage will drop on the oxide. Therefore, the device with thicker oxide has stronger Schottky barrier height modulation, i.e., larger hole current or light current (Fig. 4)”] with the semiconductor layer; and
a tunneling barrier layer [“the ultrathin silicon dioxide was grown”] arranged between the semiconductor layer and the conductive layer, wherein the tunneling barrier layer is configured to block [see dark current in Fig. 8 “The large variation of dark current and the small variation of light current with different dox lead to large sensitivity in a MOS photodiode with thin oxide” “Finally, the sensitivity of MOS photodiode with thin oxide is higher than that with thick oxide due to lower dark current”] a dark current between the semiconductor layer and the conductive layer,
see also “CMOS image sensor [8]”,
but does not teach sensor is an image sensor comprising:
a sensor array comprising a plurality of light-sensing elements, wherein each light-sensing element of the plurality of light-sensing elements comprises the photodetector; and
a processor configured to decode the photoelectric signal of each light-sensing element
and does not teach and wherein the tunneling barrier layer comprises a metal oxide semiconductor material.
However this is common in the art, see Nam teaches see paragraph 0020 “an apparatus for acquiring an image includes an image sensor including a color filter comprising a plurality of types of color filter elements arranged as an array, where each of the color filter elements transmits visible light in a certain wavelength band, and blocks visible light in other wavelength bands; a photoelectric conversion cell array that detects light that has been transmitted through the color filter; and a modulator that is disposed on an upper portion or a lower portion of the photoelectric conversion cell array and changes a rate of light transmitted to the photoelectric conversion cell array according to an applied voltage; a driver which turns on and off a voltage applied to the modulator; and a signal processor which calculates a visible light image and an infrared image by using a first image obtained by the image sensor when the voltage is not applied to the modulator and a second image obtained by the image sensor when the voltage is applied to the modulator”
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Lin to include sensor is an image sensor comprising: a sensor array comprising a plurality of light-sensing elements, wherein each light-sensing element of the plurality of light-sensing elements comprises the photodetector; and a processor configured to decode the photoelectric signal of each light-sensing element.
The motivation is that array can generate more information such as image and to perform work such as detecting an image based on received light.
Lin and Nam as combined does not teach and wherein the tunneling barrier layer comprises a metal oxide semiconductor material.
However see the band diagram in Fig. 4 electrons accumulating for the thicker oxide, see Fig. 8 see dark current is lowest for thinnest oxide.
Wann teaches how to increase electron current in Fig. 4 of Lin for a given oxide thickness, see Wann Fig. 2 see instead of SiO2, Wann uses TiO2 see paragraph 0022 “Referring now to FIG. 2, a diagram 44 is provided to illustrate that titanium dioxide (TiO.sub.2) is an effective interfacial layer for Schottky barrier height reduction for materials with an electron affinity of about four (4) electron Volts (eV). As shown in the diagram 44, the conduction band 46 of the silicon (Si) is similar to that of the titanium dioxide (TiO.sub.2) and the aluminum (Al) contact. Therefore, only a small amount of energy is needed for conduction to occur when the titanium dioxide (TiO.sub.2) is disposed between silicon (Si) and an aluminum (Al) contact”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Lin to include and wherein the tunneling barrier layer comprises a metal oxide semiconductor material.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to increase electron current in Fig. 4 of Lin for a given oxide thickness.
Response to Arguments
Applicant's arguments filed 12/24/2025 have been fully considered but they are not persuasive.
On pages 3-5 the Applicant argues that “the cited references fail to disclose "a tunneling barrier layer between the semiconductor layer and the conductive layer, wherein the tunneling barrier layer is configured to block a dark current between the semiconductor layer and the conductive layer, and wherein the tunneling barrier layer comprises a metal oxide semiconductor material," as claimed ”.
The Examiner responds that Lin teaches “Finally, the sensitivity of MOS photodiode with thin oxide is higher than that with thick oxide due to lower dark current” i.e. Lin “is configured to block a dark current” and see combination Wann see use of titanium dioxide (TiO.sub.2) which is a metal oxide semiconductor material, thus the combination shows the limitations to be obvious.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Miyoshi et al. (US 20100078679 A1) teaches see Fig. 1 see paragraph 0034 “the Schottky electrode 5 may be formed as a multi-layer metal film of each of the above-mentioned metal and Al or the like” “in the light-receiving device 10, since light which has passed through the Schottky electrode 5 and the Schottky contact layer 4 is received in the light-receiving layer 3, the Schottky electrode 5 is formed so as to have optical transparency for causing light to pass therethrough to an extent that light-receiving sensitivity in the light-receiving layer 3 can be secured” “such conditions can be satisfied by forming the Schottky electrode 5 to have thickness of several nm to ten several nm” “it is possible to realize the light-receiving device in which the dark current is remarkably suppressed and the photocurrent is increased”.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt D Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893