DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/21/2025 and 02/23/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hak (KR 20150002113 A, please see the machine translation attached in the office action mailed on 9/24/2025) in view of Kim et al. (US 2020/0287080 A1).
Regarding claim 1, Hak teaches a light emitting diode (LED) array (Fig. 6) comprising: a first light emitting stack (A; Fig. 6, [0156]) on a second light emitting stack (B; Fig. 6, [0156]), the second light emitting stack (B) on a third light emitting stack (C; Fig. 6, [0156]), the third light emitting stack (C) on a reflective p-contact electrode (57; Fig. 6, [0166]) bonded to a backplane (53/51; Fig. 6, [0173]), wherein the first light emitting stack (A) comprises a first electrical contact (61; Fig. 6, [0157]) on a first n-type layer (5; Fig. 6, [0050]) on a first color active region (33; Fig. 6, [0129]), the first color active region (33) on a first p-type layer (the upper half of 9; Fig. 6, [0057]), the second light emitting stack (B) comprises a second electrical contact (23; Fig. 6, [0073]), a second p-type layer (the lower half of 9; Fig. 6, [0057]), and the second p-type layer (the lower half of 9) on a second color active region (35; Fig. 6, [0130]), and the third light emitting stack (C) comprises a third electrical contact (25) on a third n-type layer (13; Fig. 6, [0057]) in contact with the second color active region (35) and on a third p-type layer (17; Fig. 6, [0064]).
Hak does not teach the first p-type layer on a first tunnel junction, the second light emitting stack comprises a second electrical contact on a second n-type layer in contact with the first tunnel junction and on a second tunnel junction, the second tunnel junction on a second p-type layer.
In the same field of endeavor of light emitting devices, Kim et al. teach the first p-type layer (23; Fig. 1) on a first tunnel junction (33; Fig. 1), the second light emitting stack (11/12/13/32/31/40) comprises a second electrical contact (40, Fig. 1) on a second n-type layer (31; Fig. 1) in contact with the first tunnel junction (33) and on a second tunnel junction (32; Fig. 1), the second tunnel junction (32) on a second p-type layer (13; Fig. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Hak and Kim et al., and to replace the layers 9 and 23 of Fig. 6 of Hak by the layers of 13/32/31/33/23/40 of Fig. 1 of Kim et al., because the structure of Kim et al. can enhance current spreading and improve light emitting efficiency as taught by Kim et al. ([0023]).
Regarding claim 2, Hak teaches the LED array of claim 1, further comprising a dielectric layer (59) surrounding the first light emitting stack (A), the second light emitting stack (B), and the third light emitting stack (C; see Fig. 6).
Regarding claim 3, Hak teaches the LED array of claim 2, further comprising a reflective metal layer (25, which can be Ag, a reflective metal; Fig. 6, [0078]) on the dielectric layer (59; see Fig. 6).
Regarding claim 4, Hak teaches the LED array of claim 1, wherein the first light emitting stack (A) and the second light emitting stack (B).
Hak does not teach the first light emitting stack and the second light emitting stack share the second n-type layer connected to the second electrical contact.
In the same field of endeavor of light emitting devices, Kim et al. teach the first light emitting stack (21/22/23/33/31; Fig. 1) and the second light emitting stack (11/12/13/32/31/40; Fig. 1) share the second n-type layer (31) connected to the second electrical contact (40; see Fig. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Hak and Kim et al., and to replace the layers 9 and 23 of Fig. 6 of Hak by the layers of 13/32/31/33/23/40 of Fig. 1 of Kim et al., because the structure of Kim et al. can enhance current spreading and improve light emitting efficiency as taught by Kim et al. ([0023]).
Regarding claim 5, Hak teaches the LED array of claim 4, wherein when the first light emitting stack (A) and the second light emitting stack (B) are driven in parallel (see Fig. 2), an aggregate color of emission is controlled by voltage (see Fig. 2, the voltages are used to control the light emitting stack to emit different colors; [0136]).
Regarding claim 6, Hak teaches the LED array of claim 1, further comprising an electrode grid (electrodes 61, 23, 25 and 57 forms an electrode grid, i.e. “a network of conductors for distribution of electric power” define by https://www.merriam-webster.com/dictionary/grid, as shown in Fig. 6).
Regarding claim 7, Hak teaches the LED array of claim 1, wherein the first n-type layer (5), and the third n-type layer (13) independently comprise one or more of gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), gallium aluminum nitride (GaAIN), gallium indium nitride (GalnN), aluminum gallium nitride (AIGaN), aluminum indium nitride (AIInN), indium gallium nitride (InGaN), or indium aluminum nitride (InAIN) (GaN; [0030]).
Hak does not teach the second n-type layer independently comprise one or more of gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), gallium aluminum nitride (GaAIN), gallium indium nitride (GalnN), aluminum gallium nitride (AIGaN), aluminum indium nitride (AIInN), indium gallium nitride (InGaN), or indium aluminum nitride (InAIN).
In the same field of endeavor of light emitting devices, Kim et al. teach the second n-type layer (31) independently comprise one or more of gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), gallium aluminum nitride (GaAIN), gallium indium nitride (GalnN), aluminum gallium nitride (AIGaN), aluminum indium nitride (AIInN), indium gallium nitride (InGaN), or indium aluminum nitride (InAIN) (GaN; [0033]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Hak and Kim et al., and to replace the layers 9 and 23 of Fig. 6 of Hak by the layers of 13/32/31/33/23/40 of Fig. 1 of Kim et al., because the structure of Kim et al. can enhance current spreading and improve light emitting efficiency as taught by Kim et al. ([0023]).
Regarding claim 8, Hak teaches the LED array of claim 7, wherein the first n-type layer (5), and the third n-type layer (13) comprise gallium nitride (GaN) ([0030]).
Hak does not teach the second n-type layer comprise gallium nitride (GaN).
In the same field of endeavor of light emitting devices, Kim et al. teach the second n-type layer (31) comprise gallium nitride (GaN) ([0033]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Hak and Kim et al., and to replace the layers 9 and 23 of Fig. 6 of Hak by the layers of 13/32/31/33/23/40 of Fig. 1 of Kim et al., because the structure of Kim et al. can enhance current spreading and improve light emitting efficiency as taught by Kim et al. ([0023]).
Regarding claim 9, Hak teaches the LED array of claim 1, wherein the first electrical contact (61), the second electrical contact (23), and the third electrical contact (25) independently comprise aluminum ([0165, 0078]).
Regarding claim 10, Hak teaches the LED array of claim 1, wherein the reflective p-contact electrode (57) comprises one or more of aluminum (Al), platinum (Pt), silver (Ag) (Ag, [0166, 0143]).
Regarding claim 11, Hak teaches the LED array of claim 1, wherein the reflective p-contact electrode (57) comprises a bilayer (an ohmic film and a reflective film; [0167]) comprising indium tin oxide (ITO) (ITO for the ohmic film; [0088-0089]) and one or more of aluminum (Al), platinum (Pt), and silver (Ag) (Ag for the reflective film, [0143]).
Response to Arguments
Applicant’s amendments, filed 12/09/2025, overcome the rejections to claims 7-8 under 35 U.S.C. 112. The rejections to claims 7-8 under 35 U.S.C. 112 have been withdrawn.
On pages 6-10 of Applicant’s Response, Applicant argues that the light emitting diodes of Hak and Kim provide very different issues with respect to electrical connection between light emitting elements. One skilled in the art would not be motivated to look to Kim for a suggestion of a tunnel junction structure.
The Examiner respectfully disagrees with Applicant’s argument, because the light emitting diodes of Hak and Kim both provide an common electrode connection between two stacked light emitting elements. Hak teaches an electrode 23 connected to the shared p type semiconductor layer 9 as the common electrode connection between two stacked light emitting elements A and B (see Fig. 6 of Hak). Kim teach an electrode 40 connected to the shared tunnel junction structure 13/32/31/33/23 as the common electrode connection between two stacked light emitting elements (the light emitting element having the QW layer of 22 and the light emitting element having the QW layer 12; see Fig. 1 of Kim). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Hak and Kim et al., and to replace the layers 9 and 23 of Fig. 6 of Hak by the layers of 13/32/31/33/23/40 of Fig. 1 of Kim et al. to provide the common electrode connection between two stacked light emitting elements, because the structure of Kim et al. can enhance current spreading and improve light emitting efficiency as taught by Kim et al. ([0023]).
On page 10 of Applicant’s Response, Applicant argues that the result of the combination of Hak and Kim would not be a device having 6 separate conductive-type layers - three n-type 104a, 104b, 104c and three p-type 108a, 108b, 108c, where at least one p-type layer is grown before the quantum wells 106. At best, the combination of Hak and Kim would result in a device having only 5 separate conductive type layers. Thus, the combination of Hak and Kim does not render the claimed invention obvious and claimed invention is patentable over the combination of Hak and Kim.
The Examiner respectfully disagrees with Applicant’s argument, because the combination of Hak and Kim teaches a device having at least 6 separate conductive type layers such as the layers 5 (n-type), 13 (n-type), 17 (p-type) of Hak (see Fig. 6 of Hak), and the layers 23 (p-type), 31 (n-type), 13 (p-type) of Kim (see Fig. 1 of Kim). Furthermore, in response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “at least one p-type layer is grown before the quantum wells 106”) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chae et al. (US 20190164945 A1) teach a light emitting diode having tunnel junction layers.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HSIN YI HSIEH whose telephone number is (571)270-3043. The examiner can normally be reached 8:30 - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra V Smith can be reached on 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HSIN YI HSIEH/Primary Examiner, Art Unit 2899 4/21/2026