DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale , or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and claims bellow are rejected under 35 U.S.C. 102(a)(1) as being anticipated by D1 US 2018 0 180470 A 1 . Regarding claims bellow D1 teaches Claim 1 A laser receiving circuit ( [ 0001], [0078], Fig. 11 ), comprising: a controller ( [ 0078] - 26), a voltage switching circuit ( Fig. 11, [0117] - 74), n voltage sources ( Fig. 11, [0117] - 80) and a receiving sensor ( Fig. 11, [0117] - 72), n being an integer greater than 1 ( Fig. 11 ), wherein the voltage switching circuit is provided with a control terminal, n power source input terminals and a power source output terminal ( Fig. 11, [0117] – the switches 74 are shown to have a control terminal, power input terminal 70 and output terminal), the n voltage sources generate reverse bias signals of different voltage values ( [ 0117]), respectively; the n voltage sources are connected to the n power source input terminals in a one-to-one manner ( Fig. 11 ), the controller is connected to the control terminal of the voltage switching circuit ( Fig. 11 ), the power source output terminal is connected to a cathode of the receiving sensor ( [ 0111], Fig. 11 ); the controller is configured to send voltage switching signals to the voltage switching circuit via the control terminal ([0035], [0109)); the voltage switching circuit is configured to select one power source input terminal from the n power source input terminals to be turned on, in response to the voltage switching signals, so that a corresponding voltage source loads the reverse bias signals to the receiving sensor via the selected power source input terminal and the power source output terminal ( [ 0117)). Claim 2 The laser receiving circuit according to claim 1, wherein the number of control terminals provided in the voltage switching circuit is related to n ( Fig. 11 ). Claim3 The laser receiving circuit according to claim 1, wherein n=2, the n voltage sources are a first voltage source and a second voltage source, the control terminal provided by the voltage switching circuit comprises a first control terminal and a second control terminal ( Fig. 11 shows three voltage sources. ) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4-8 are rejected under 35 U.S.C. 103 as being unpatentable over D1 in view of D2 US 2007 0 152731 A1. Regarding claims bellow D1 does not teach but D2 teaches Claim4 The voltage switching circuit comprises a first driving circuit ( Fig. 1 - INV2, INV4), a first switch circuit ( Fig. 1 - SW1 ), a second driving circuit ( Fig. 1 - INV1, INV3), and a second switch circuit ( Fig. 1 - SW2), wherein: the first switch circuit and the second switch circuit comprise one or more switch transistors, the switch transistor is a triode or a MOS transistor ( Fig. 1 -MOSFETs M9 to M12); the first driving circuit and the second driving circuit are provided with an auxiliary power source terminal, and the auxiliary power source terminals of the first driving circuit and the second driving circuit are configured to input high voltage operating signals ( Fig. 1 - V00); the first driving circuit is connected to the first control terminal of the controller ( Fig. 1 - IN), the first driving circuit is connected to the first switch circuit ( Fig. 1 - SW1 ), the first switch circuit is connected to the first voltage source ( Fig. 1 - V1) and the cathode of the receiving sensor ( Fig. 1 - V3 is the output voltage ) ; the second driving circuit is connected to the second control terminal of the controller ( Fig. 1 - IN), the second driving circuit is connected to the second switch circuit ( Fig. 1 - SW2), the second switch circuit is connected to the second voltage source ( Fig. 1 - V2) and the cathode of the receiving sensor ( Fig. 1 - V3 is the output voltage) . Claims 5 The laser receiving circuit according to claim 4, wherein the first switch circuit ( Fig. 1 - Sw1) comprises a first MOS transistor ( Fig. 1 - M10), a second MOS transistor ( Fig. 1 - M9), a first diode ( Fig. 1 - 01 ), and a second diode ( Fig. 1 - 02); and the second switch circuit ( Fig. 1 - Sw2) comprises a third MOS transistor ( Fig. 1 - M11 ), a fourth MOS transistor ( Fig. 1 - M12), a third diode ( Fig. 1 - 03), and a fourth diode ( Fig. 1 - 04); the first driving circuit is further provided with a first terminal, a second terminal and a third terminal, and the second driving circuit is further provided with a first terminal, a second terminal, and a third terminal ( Fig. 1 - INV1 to INV4); the auxiliary power source terminal of the first driving circuit is connected to a high-voltage power source ( Fig. 1 - V00), the first terminal of the first driving circuit is connected to the first control terminal ( Fig. 1 - IN), the second terminal of the first driving circuit is connected to a gate of the first MOS transistor ( Fig. 1 - connection to M9), the third terminal of the first driving circuit is connected to a gate of the second MOS transistor ( Fig. 1 - connection to M10), a drain of the first MOS transistor is connected to the first voltage source, a source of the first MOS transistor is connected to a source of the second MOS transistor ( Fig. 1 - connecting the source to the voltage source and the drain to the other transistor is equivalent), a cathode of the first diode is connected to the drain of the first MOS transistor, an anode of the first diode is connected to the source of the first MOS transistor ( Fig. 1 - 02), a drain of the second MOS transistor is connected to a drain of the third MOS transistor ( Fig. 1 - e quivalently, the sources of M9 and M11 are connected) and connected to a cathode of the receiving sensor ( Fig. 1 - the output voltage V3 would be connected to the receiving sensor in 01 ), an anode of the second diode is connected to the source of the second MOS transistor, and the cathode of the second diode is connected to the drain of the second MOS transistor ( Fig. 1 - 01 ); the auxiliary power source terminal of the second driving circuit is connected to the high-voltage power source ( Fig. 1 - V00), the first terminal of the second driving circuit is connected to the second control terminal ( Fig. 1 - IN), the second terminal of the second driving circuit is connected to a gate of the third MOS transistor ( Fig. 1 - connection to M11 ), the third terminal of the second driving circuit is connected to a gate of the fourth MOS transistor ( Fig. 1 - connection to M12), a source of the third MOS transistor is connected to a source of the fourth MOS transistor ( Fig. 1 - connecting the source to the voltage source and the drain to the other transistor is equivalent), a cathode of the third diode is connected to the drain of the third MOS transistor, an anode of the third diode is connected to the source of the third MOS transistor ( Fig. 1 - 03), a drain of the fourth MOS transistor is connected to the second voltage source ( Fig. 1 - connecting the source to the voltage source and the drain to the other transistor is equivalent), an anode of the fourth diode is connected to the source of the fourth MOS transistor, and a cathode of the fourth diode is connected to the drain of the fourth MOS transistor ( Fig. 1 - 04). Claim 6 The laser receiving circuit according to claim 5, wherein the first diode is an internal parasitic diode of the first switch transistor, the second diode is an internal parasitic diode of the second switch transistor, the third diode is an internal parasitic diode of the third switch transistor, and the fourth diode is an internal parasitic diode of the fourth switch transistor ( [ 0044)). Claim7 While it is not clear if the applicants refer to a triode vacuum tube or to simply a semiconductor element having three terminals, it is assumed that any three-terminal semiconductor element such as the MOSFETs of fall within the scope of the claim. Therefore, D2 discloses also the additional features of this claim. Furthermore, in case it is desired to refer to a bipolar transistor, such an element is also well known as switching element. Claims 8 As shown for claim 5, the first switch circuit comprises a first MOS transistor, a first diode, and a second diode, and the second switch circuit comprises a second MOS transistor, a third diode, and a fourth diode. The scope of claim 8 is only broader than the scope of claim 5, as it does not specify two MOS transistors per switch circuit. It would be obvious to one of ordinary skills in the art at the time of filing to modify teachings by D1 with teaching by D2 in order to stably output the voltage equivalent to the first input voltage or the second input voltage as the output voltage [ 0033]. Claim(s) 9 are rejected under 35 U.S.C. 103 as being unpatentable over D1 and D2 as applied to claim 4 above, and further in view of D 3 US 4595847 A . Although D1 , as modified in view of D2, does not teach D3 teaches 9. The laser receiving circuit according to claim 4, wherein the auxiliary power source terminal of the first driving circuit comprises a positive auxiliary power source terminal for inputting positive voltage signals and a negative auxiliary power source terminal for inputting negative voltage signals, and the auxiliary power source terminal of the second driving circuit comprises a positive auxiliary power source terminal for inputting the positive voltage signals and a negative auxiliary power source terminal for inputting the negative voltage signals. (fig. 1) It would be obvious to one of ordinary skills in the art at the time of filing to modify teachings by D1 with teaching by D3 in order to provide switching circuit which allows reversing the voltage as required in D1. Allowable Subject Matter Claim 10-12 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT HOVHANNES BAGHDASARYAN whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-7845 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT Mon-Fri 7am - 5 pm . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HOVHANNES BAGHDASARYAN/ Examiner, Art Unit 3645