DETAILED ACTION
This action is in response to an application filed with the US on 06/21/2023 and having an Effective Filing Date of 06/21/2021, in which claims 1-22 are pending, claims 1-8 and 16-17 are withdrawn as directed to anon-elected invention and claims 9-15 and 18-22 are ready for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 05 SEPTEMBER 2023, 02 OCTOBER 2023, 12 JUNE 2025, 13 JUNE 2025, 23 DECEMBER 2025, 22 JANUARY 2026 and 15 MAY 2026 are in compliance with the provisions of 37 CFR 1.97 and has/have been considered. An initialed copy of Form 1449 is enclosed herewith.
Election/Restrictions
Restriction to one of the following inventions is required under 35 U.S.C. 121:
I. Claims 1-8, drawn to a membrane nanofiltration system, classified in B01D 61/42.
II. Claims 9-15 and 18-22, drawn to a method of making a conductive membrane filter, classified in B01D 67/0062.
III. Claims 16-17, drawn to a method of making a surface roughened conductive membrane filter, classified in B01D 67/0088.
The inventions are distinct, each from the other because of the following reasons:
Inventions I and II are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case the process as claimed can be used to make another and materially different product, such as a membrane which does not comprise an electrical contact or counter electrode.
Inventions I and III are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case the process as claimed can be used to make another and materially different product, such as a membrane which does not comprise an electrical contact or counter electrode.
Inventions II and III are directed to related processes. The related inventions are distinct if: (A) the inventions as claimed do not overlap in scope, i.e., are mutually exclusive; (B) the inventions as claimed are not obvious variants; and (C) the inventions as claimed are either not capable of use together or can have a materially different design, mode of operation, function, or effect. See MPEP § 806.05(j). In the instant case, the inventions as claimed can have a materially different design, mode of operation, function, or effect due to the Invention III requiring a surface which has had noble metal nanoparticles deposited and been chemically etched to create roughened surface, which is not present in Invention II. Furthermore, the inventions as claimed do not encompass overlapping subject matter and there is nothing of record to show them to be obvious variants.
Restriction for examination purposes as indicated is proper because all the inventions listed in this action are independent or distinct for the reasons given above and there would be a serious search and/or examination burden if restriction were not required because one or more of the following reasons apply:
Inventions I, II, and III have acquired a separate status in the art in view of their different classification
Inventions I, II, and III have acquired a separate status in the art due to their recognized divergent subject matter
Inventions I, II, and III require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search strategies or search queries).
Applicant is advised that the reply to this requirement to be complete must include (i) an election of an invention to be examined even though the requirement may be traversed (37 CFR 1.143) and (ii) identification of the claims encompassing the elected invention.
The election of an invention may be made with or without traverse. To reserve a right to petition, the election must be made with traverse. If the reply does not distinctly and specifically point out supposed errors in the restriction requirement, the election shall be treated as an election without traverse. Traversal must be presented at the time of election in order to be considered timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are added after the election, applicant must indicate which of these claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
During a telephone conversation with Allison Krepel on 29 April 2026 a provisional election was made to prosecute the invention of Group II, Claims 9-15 and 18-22. Affirmation of this election must be made by applicant in replying to this Office action. Claims 1-8 and 16-17 are withdrawn from further consideration by the examiner, 37 CFR 1.142(b), as being drawn to a non-elected invention.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-15 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites the limitations “wherein the pores in the silicon wafer have a size ranging from 100 nm to 1 mm” and then “wherein the pores in the silicon wafer have a size ranging from 1 nm to 5 µm.” It is therefore not clear which range is the correct range for the pores in the silicon wafer. For Examination purposes the limitations will be interpreted as follows: “wherein the pores in the silicon wafer have a size ranging from 100 nm to 1 mm” and then “wherein the pores in the silicon layer have a size ranging from 1 nm to 5 µm.”
Claims 10-15 are rejected for depending from an indefinite claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2017/0030890 A1 (hereinafter “Holweg”).
Regarding Claim 18 Holweg discloses a method of making a conductive membrane filter, the method comprising:
etching holes 120 into a conductive surface (which may be of a silicon wafer [0053]-[0055]), wherein the holes do not extend the entire thickness of the membrane; and
etching pores 152 from the opposite surface of the wafer to meet the previously etched holes, producing a selective membrane layer 150 between the end of the holes and an opposite surface of the wafer,
wherein the pores in the selective membrane layer are smaller than the size of the holes in the silicon wafer; Figs. 10A-11, [0109]-[0117], multiple holes shown in Fig. 27-29.
Regarding Claim 19 Holweg discloses the method of claim 18, wherein the holes in the silicon wafer are etched using deep reactive ion etching [0113].
Regarding Claim 20 Holweg discloses the method of claim 18, further comprising using an etching mask in the deep reactive ion etching to control a geometry (and therefore also the density) of the holes in the silicon wafer [0113], wherein the masking layer may be SiO2 [0095].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 9-11 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over US 2017/0030890 A1 (hereinafter “Holweg”).
Regarding Claim 9 Holweg discloses a method of making a conductive membrane filter, the method comprising
depositing a layer of silicon 132 on a surface of a silicon wafer 110 (Figs. 3A-B),
etching pores 21 in the silicon wafer from a first surface of the silicon wafer (Fig. 3E); and
fine etching pores in the silicon layer from a second surface of the silicon wafer (Fig. 3F), [0072]-[0078]
wherein the pores in the silicon wafer are disclosed to be rectangular and have a length from 10-1000 microns [0152], and are thus seen to have a size ranging from 10-1000 microns;
wherein the pores in the silicon layer, in one embodiment, have a diameter of 1-10 micron [0136], claims 11-12.
Since the range disclosed overlaps the range claimed, the range recited in the claim is considered prima facie obvious. Overlapping ranges are prima facie evidence of obviousness. It would have been obvious to one having ordinary skill in the art to have selected the portion of the disclosed range that corresponds to the claimed range. See MPEP 2144.05(I).
Regarding Claim 14 Holweg discloses the method of claim 9, further comprising adding a protective layer of etch protectant on top of the silicon layer before etching pores in the silicon wafer (i.e. where layer 134 is applied to the on top of the silicon layer (Fig. 3C) before etching pores in the silicon wafer (Fig. 3E), where the layer 134 is an insulating material such as silicon dioxide and thus may be considered a protective layer of etch protectant).
Regarding Claim 15 Holweg discloses the method of claim 14, further comprising removing the protective layer after etching the pores in the silicon wafer and before fine etching pores in the silicon layer (i.e. where the layer 134 is used as an etching mask to form the pores 152 in the layer 132 [0077] and thus must be removed in-part, to form the mask before fine etching the pores in the silicon layer).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Holweg in view of B. Kloeck, S. D. Collins, N. F. de Rooij and R. L. Smith, "Study of electrochemical etch-stop for high-precision thickness control of silicon membranes," in IEEE Transactions on Electron Devices, vol. 36, no. 4, pp. 663-669, April 1989 (hereinafter “Kloeck”).
Regarding Claim 10 Holweg discloses the method of claim 9, but does not disclose wherein the deposited silicon layer acts as an etch stop for the etched pores from the first surface
However, Holweg does disclose that the substrate 110 is etched to form holes which stop at layer 132 (Figs. 3D-3E), and that the substrate 110 and layer 132 are different types of silicone, p-type vs n-type, such that “the substrate 110 of a second conductivity type can be electrically insulated from the first layer 132 of a first conductivity type by generating a junction barrier between the substrate 110 and the first layer 132, if respective voltages are applied between the contact area 138 and the substrate contact area 139 ([0068], [0072]).
Further Kloeck discloses a method to control the thickness of single crystal silicone membranes fabricated by wet anisotropic etching using the technique of an electrochemical etch stop, wherein “[t]he etch-stop technique combines the well known anodic passivation characteristics of silicon [6]-[9] with a reverse-bias p-n junction to provide a large etching selectivity of p-type silicon over n-type in anisotropic etches such as KOH and ethylenediamine/pyrocatechol (EDP)”, such that “etching can be stopped at a well defined p-n junction.”
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by using the electrochemical etch stop technique of Kloeck to etch the holes 120 in the substrate 110 (i.e. from the first surface) such that the etching stops at the junction with the layer 132, by using the deposited silicon layer 132 to act as an etch stop because this is a known means to provide control of etching to stop at a well-defined p-n junction.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Holweg in view of US 2019/0225930 A1 (hereinafter “Chen”).
Regarding Claim 11 Holweg discloses the method of claim 9, but does not disclose wherein the silicon wafer is flipped 180° before each of the etching steps.
However Chen discloses microfluidic filer devices including a filter structure with through holes which is formed by etching a silicon wafer substrate, wherein the wafer is flipped 180° when transitioning to working on (i.e. depositing layers and etching) an opposite side of the wafer [0157], [0163]-[0165].
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by flipping the silicon wafer 180° between working on different sides of the wafer, i.e. including each of the etching steps, as disclosed by Chen because this allows the side being worked on to be in contact with deposition, patterning and etching equipment set up to treat one surface orientation; and because Holweg discloses first depositing silicone layer, i.e. on a top surface, then working on and etching the back surface, before then going back to work on and etch the top surface.
Claims 12 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Holweg in view of US 2019/0312112 A1 (hereinafter “Smith”).
Regarding Claim 12 Holweg discloses the method of claim 9, but does not disclose wherein the pores in the silicon wafer and the silicon layer are etched using MACE.
However Smith discloses a method of forming pores in a semiconductor (silicon) material using metal-assisted chemical etching (MACE), wherein the semiconductor (such as a silicon wafer) is sputtered with metal catalyst nanoparticles in order to direct etching of pores from the nanoparticles [0131]-[0132], [0141], [0145], [0163]-[0168].
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by forming the pores in the membrane, i.e. including pores in the silicon wafer and the silicon layer, via the MACE process of Smith which involves sputtering the silicon wafer with metal catalyst nanoparticles, because this involves the simple substitution of known means for forming pores in a silicon membrane via etching to obtain the predictable result of forming pores in silicon to create a membrane.
Regarding Claim 21 Holweg discloses the method of claim 18, but does not disclose wherein the pores in the selective membrane layer are etched using MACE.
However Smith discloses a method of forming pores in a semiconductor (silicon) material using metal-assisted chemical etching (MACE), wherein the semiconductor (such as a silicon wafer) is sputtered with metal catalyst nanoparticles in order to direct etching of pores from the nanoparticles [0131]-[0132], [0141], [0145], [0163]-[0168].
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by forming the pores in the membrane via the MACE process of Smith which involves sputtering the silicon wafer with metal catalyst nanoparticles, because this involves the simple substitution of known means for forming pores in a silicon membrane via etching to obtain the predictable result of forming pores in silicon to create a membrane.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Holweg in view of US 20150376804 A1 (hereinafter “Gorokhovsky”).
Regarding Claim 13 Holweg discloses the method of claim 9, wherein the silicon layer 132 is formed by epitaxial growth or deposition [0073]; but does not disclose wherein the silicon layer is deposited using plasma-enhanced chemical vapor deposition
However Gorokhovsky discloses it is known to form doped silicone layers (i.e. like that of Holweg) on a substrate by deposition using plasma-enhanced chemical vapor deposition; [0051].
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by forming the silicon layer by deposited using plasma-enhanced chemical vapor deposition as disclosed by Gorokhovsky because this is a known means to form a layer of doped silicone on a substrate.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Holweg in view of US 2016/0158706 A1 (hereinafter “Wang”).
Regarding Claim 22 Holweg discloses a method of making a conductive membrane filter, the method comprising etching pores in a silicon wafer; Figs. 10A-11, [0109]-[0117.
Holweg does not disclose vapor-depositing a thin layer on a surface of the silicon wafer, wherein the thin layer narrows the pores at the surface of the silicon wafer and does not completely cover the pores, while providing a dielectric surface that allows a counter electrode to contact the silicon membrane.
However Wang discloses a method for forming a membrane having a silicon substrate formed via etching, the method including adjusting the size of openings in the membrane by depositing a thin film on the membrane using a technique selected from the group consisting of atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), and a combination thereof; wherein the thin layer comprise the metal oxides TiO2 or Al2O3[0007]-[0008], [0027]-[0028], [0045].
Therefore, before the effective filing date, it would have been prima facie obvious to one of ordinary skill in the art to modify the method of Holweg by including a thin film TiO2 or Al2O3 layer deposited on the membrane via ALD, CVD or PVD as disclosed by Wang in order to adjust the size of pores according to the application.
Thus disclosing, in combination, vapor-depositing a thin layer on a surface of the silicon wafer/membrane wherein the thin layer narrows the pores at the surface of the silicon wafer/membrane and does not completely cover the pores, while providing a dielectric surface that inherently would allow a counter electrode to contact the silicon membrane; See MPEP 2112.01. with regard to inherent properties. It is noted that the claims are not seen to positively claim a counter electrode that is in contact with the silicon membrane; merely a surface which allows such.
Double Patenting
Claims 18-22 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-5, 8-22 and 28-29 of copending Application No. 18/987855 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of 18/987855 anticipate the instant claims 18-22, as they disclose the same process of forming a conductive membrane. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eric J. McCullough whose telephone number is (571)272-8885. The examiner can normally be reached Monday-Friday 10:00-6:00.
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/ERIC J MCCULLOUGH/ Examiner, Art Unit 1773
/BENJAMIN L LEBRON/ Supervisory Patent Examiner, Art Unit 1773
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