DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 11 and 18 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 11 and 18 recite “encode the control signal for communication to at least one circuit within the Rx circuitry”. The specification describes controlling a multiplexor but nothing else. There is no other circuit that is described that one would attach to the control signal. Therefore, the written description is found to fail to comply.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 9-11 and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gasbarro et al. (US 5432823).
Regarding claim 1, Gasbarro teaches
An apparatus comprising:
a clock monitoring circuit comprising an output terminal, the clock monitoring circuit configured to generate a control signal based on monitoring a plurality of clock signals; and (Figs. 5 and 6, col. 2, lines 65-67, “ comparator, which generates a select signal by comparing the receive clock to the transmit clock.”)
a multiplexing circuit coupled to the output terminal of the clock monitoring circuit and configured to receive the control signal, the multiplexing circuit comprising: (col. 2, lines 65-67, “comparator, which generates a select signal by comparing the receive clock to the transmit clock. A multiplexer uses the select signal to select”)
a first input terminal to receive a first signal generated based on a first clock signal of the plurality of clock signals; (Fig. 6, (RDE/I1, 156 – mux), where this signal is based on both the Tclk and the Rclk)
a second input terminal to receive a second signal generated based on a second clock signal of the plurality of clock signals; and (Fig. 6, (RDO/I0, 156 – mux), where this signal is based on both the Tclk and the Rclk)
an output terminal to output one of the first signal or the second signal based on the control signal. (Fig. 6, (O, 156 – mux))
Regarding claim 2, Gasbarro teaches further comprising: a first register circuit comprising a data terminal and an output terminal, the output terminal of the first register circuit coupled to the second input terminal of the multiplexing circuit. (Fig. 6, (154 - delay element), (186 – latch), claim 2, “wherein the first delay element comprises a latch and the second delay element comprises a latch.”)
Regarding claim 3, Gasbarro teaches wherein the first register circuit comprises a clock terminal configured to receive the second clock signal, and wherein the first register is clocked by the second clock signal. (Figs. 5 and 6, (154 - delay element), (186 – latch), claim 2, “wherein the first delay element comprises a latch and the second delay element comprises a latch.” and the second clock is interpreted as Rclk/Rclkb)
Regarding claim 4, Gasbarro teaches wherein the data terminal of the first register circuit is coupled to an output terminal of a second register circuit. (Figs. 5 and 6, (154 - delay element), (184 – latch), claim 2, “wherein the first delay element comprises a latch and the second delay element comprises a latch.” and the second clock is interpreted as Rclk/Rclkb)
Regarding claim 5, Gasbarro teaches wherein the data terminal of the first register circuit receives the first signal from the output terminal of the second register circuit. (Figs. 5 and 6, (154 - delay element), (184 – latch), claim 2, “wherein the first delay element comprises a latch and the second delay element comprises a latch.” and the second clock is interpreted as Rclk/Rclkb)
Regarding claim 6, Gasbarro teaches wherein the second register circuit comprises a clock terminal configured to receive the second clock signal, and wherein the second register circuit is clocked by the second clock signal. (Figs. 5 and 6, (154 - delay element), (184 – latch), claim 2, “wherein the first delay element comprises a latch and the second delay element comprises a latch.” and the second clock is interpreted as Rclk/Rclkb)
Regarding claim 9, Gasbarro teaches wherein the apparatus comprises a processor, and wherein the processor includes the clock monitoring circuit and the multiplexing circuit. (Figs 2, 5, and 6, col. 4, line 10, “master 102 is a microprocessor” and col. 6, lines 42-44, “Synchronization circuitry 150 includes phase comparator 152, delay element 154, two to one (2:1) multiplexer 156, and latch 158.”)
Regarding claim 10, Gasbarro teaches further comprising one or more interconnects coupling the clock monitoring circuit and the multiplexing circuit. (Fig. 6, (164))
Regarding claim 11, Gasbarro teaches
A system comprising: memory; and at least one processor coupled to the memory, the at least one processor to: (col. 4, lines 10-14, “master 102 is a microprocessor … slave devices 104, 106, 108, and 110 are high speed memories.”)
receive a first clock signal, the first clock signal associated with a transmit (Tx) circuitry of a computing device; (Figs. 5 and 6, col. 2, lines 65-67, “comparator, which generates a select signal by comparing the receive clock to the transmit clock.”)
receive a second clock signal, the second clock signal associated with a receive (Rx) circuitry of the computing device; (Figs. 5 and 6, col. 2, lines 65-67, “ comparator, which generates a select signal by comparing the receive clock to the transmit clock.”)
perform a comparison of the first clock signal to the second clock signal; (Figs. 5 and 6, col. 2, lines 65-67, “ comparator, which generates a select signal by comparing the receive clock to the transmit clock.”)
generate a control signal based on the comparison; and encode the control signal for communication to at least one circuit within the Rx circuitry. (Figs. 5 and 6, col. 2, lines 65-67, “ comparator, which generates a select signal by comparing the receive clock to the transmit clock.”)
As to claims 18, Gasbarro teaches these claims according to the reasoning provided in claim 11.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7-8 12-17 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gasbarro in view of Murray et al. (US 6067629).
Regarding claim 7, Gasbarro does not teach a transmit token but Murray teaches wherein the first signal is a transmit token generated based on the first clock signal. (Fig. 2b, col. 4, lines 52-59, “component 201 includes two latches (211 and 221 clocked by TX 207) and logic block 240. Component 201 also includes output STROBE 226 and an acknowledge input, ACK 236. ACK 236 is coupled to latch 221, which in turn, is coupled to latch 211 and logic block 240. In particular, an acknowledge signal transition on line ACK 236 indicates that component 206 has received an acknowledge signal on STROBE 226.”)
Gasbarro and Murray both teach controlling clocks related to transmitting and receiving data in an electronic device. Murray is cited to teach using a transmit token to exchange information in a frequency independent way (i.e. two clocks are operating at different frequencies. Based on Murray, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Gasbarro to use a transmit token between its transmit and receive clocks. Furthermore, being able to use a transmit token improves on Gasbarro by being able to exchange information in a frequency independent manner. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “the exchange of acknowledge signals provides a hand shake mechanism that allows the exchange of pointer information in a frequency independent manner between component 200 and component 205.”, col. 7, lines 13-16
Regarding claim 8, Gasbarro does not teach but Murray teaches wherein the transmit token is generated based on transferring data from transmit circuitry associated with the first clock signal to receive circuitry associated with the second clock signal. (Fig. 2b, col. 6, lines 3-6, “The continuous acknowledge loop used to generate the strobed data between component 201 and component 206 includes line STROBE 226, latch 231, inverter 290, line ACK 236, and latch 221.”)
Gasbarro and Murray both teach controlling clocks related to transmitting and receiving data in an electronic device. Murray is cited to teach using a transmit token to exchange information in a frequency independent way (i.e. two clocks are operating at different frequencies. Based on Murray, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Gasbarro to use a transmit token between its transmit and receive clocks. Furthermore, being able to use a transmit token improves on Gasbarro by being able to exchange information in a frequency independent manner. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “the exchange of acknowledge signals provides a hand shake mechanism that allows the exchange of pointer information in a frequency independent manner between component 200 and component 205.”, col. 7, lines 13-16
Regarding claim 12, Gasbarro does not teach but Murray teaches further comprising: a first register circuit configured in the Tx circuitry, the first register circuit to generate a transmit token based on an inverted signal received from the Rx circuitry. (Fig. 2b, col. 5, lines 3-9, “The continuous acknowledge loop used to generate the strobed data between component 201 and component 206 includes line STROBE 226, latch 231, inverter 290, line ACK 236, and latch 221. For one embodiment, during the reset of components 201 and 206, latches 231 and 221 are set to a zero value and STROBE 226 is toggled. ”)
Gasbarro and Murray both teach controlling clocks related to transmitting and receiving data in an electronic device. Murray is cited to teach using a transmit token to exchange information in a frequency independent way (i.e. two clocks are operating at different frequencies. Based on Murray, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Gasbarro to use a transmit token between its transmit and receive clocks. Furthermore, being able to use a transmit token improves on Gasbarro by being able to exchange information in a frequency independent manner. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “the exchange of acknowledge signals provides a hand shake mechanism that allows the exchange of pointer information in a frequency independent manner between component 200 and component 205.”, col. 7, lines 13-16
Regarding claim 13, Gasbarro does not teach but Murray teaches further comprising: a second register circuit configured in the Rx circuitry, the second register circuit coupled to the first register circuit and configured to receive the transmit token. (Fig. 2b, col. 5, lines 3-9, “The continuous acknowledge loop used to generate the strobed data between component 201 and component 206 includes line STROBE 226, latch 231, inverter 290, line ACK 236, and latch 221. For one embodiment, during the reset of components 201 and 206, latches 231 and 221 are set to a zero value and STROBE 226 is toggled. ”)
Gasbarro and Murray both teach controlling clocks related to transmitting and receiving data in an electronic device. Murray is cited to teach using a transmit token to exchange information in a frequency independent way (i.e. two clocks are operating at different frequencies. Based on Murray, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Gasbarro to use a transmit token between its transmit and receive clocks. Furthermore, being able to use a transmit token improves on Gasbarro by being able to exchange information in a frequency independent manner. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “the exchange of acknowledge signals provides a hand shake mechanism that allows the exchange of pointer information in a frequency independent manner between component 200 and component 205.”, col. 7, lines 13-16
Regarding claim 15, Gasbarro does not teach but Murray teaches wherein the second register circuit is configured to generate a buffered signal based on the second clock signal, the buffered signal corresponding to the transmit token. (Fig. 2b, (231 – latch) where latch 231 both latches and buffers the transmit token)
Gasbarro and Murray both teach controlling clocks related to transmitting and receiving data in an electronic device. Murray is cited to teach using a transmit token to exchange information in a frequency independent way (i.e. two clocks are operating at different frequencies. Based on Murray, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Gasbarro to use a transmit token between its transmit and receive clocks. Furthermore, being able to use a transmit token improves on Gasbarro by being able to exchange information in a frequency independent manner. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “the exchange of acknowledge signals provides a hand shake mechanism that allows the exchange of pointer information in a frequency independent manner between component 200 and component 205.”, col. 7, lines 13-16
As to claim 14, Gasbarro and Murray teach this claim according to the reasoning provided in claim 6.
As to claim 16, Gasbarro and Murray teach this claim according to the reasoning provided in claims 1, 6, and 9.
As to claim 17, Gasbarro and Murray teach this claim according to the reasoning provided in claims 1, 2, 4, and 9.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Xavier et al. (US 20240113851) teaches a clock control structure which includes comparison circuitry, a multiplexor, and registers.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHERI L. HARRINGTON whose telephone number is (571)270-0468. The examiner can normally be reached Generally, M-F, 7:30a-4p.
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/CHERI L HARRINGTON/Examiner, Art Unit 2176 September 3, 2026
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176
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